Lee et al., 2015 - Google Patents
Design considerations of HBM stacked DRAM and the memory architecture extensionLee et al., 2015
- Document ID
- 15472172563724989457
- Author
- Lee D
- Lee K
- Lee Y
- Kim K
- Kang J
- Lee J
- Chun J
- Publication year
- Publication venue
- 2015 IEEE Custom Integrated Circuits Conference (CICC)
External Links
Snippet
Recently, the 3D stacked memory, which is known as HBM (high bandwidth memory), using TSV process has been developed. The stacked memory structure provides increased bandwidth, low power consumption, as well as small form factor. There are many design …
- 230000015654 memory 0 title abstract description 52
Classifications
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- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write (R-W) circuits
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