Then et al., 2019 - Google Patents
3D heterogeneous integration of high performance high-K metal gate GaN NMOS and Si PMOS transistors on 300mm high-resistivity Si substrate for energy-efficient …Then et al., 2019
- Document ID
- 14478065282038385648
- Author
- Then H
- Dasgupta S
- Radosavljevic M
- Agababov P
- Ban I
- Bristol R
- Chandhok M
- Chouksey S
- Holybee B
- Huang C
- Krist B
- Jun K
- Lin K
- Nidhi N
- Michaelos T
- Mueller B
- Paul R
- Peck J
- Rachmady W
- Staines D
- Talukdar T
- Thomas N
- Tronic T
- Fischer P
- Hafez W
- Publication year
- Publication venue
- 2019 IEEE International Electron Devices Meeting (IEDM)
External Links
Snippet
We have demonstrated industry's first 300mm 3D heterogeneous integration of high performance, low-leakage high-K dielectric metal gate enhancement-mode (e-mode) GaN NMOS and Si PMOS transistors on 300mm high-resistivity (HR) Si (111) substrate, enabled …
- 229910002601 GaN 0 title abstract description 95
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