Stollon et al., 2011 - Google Patents

EJTAG and Trace in Toshiba TX Cores

Stollon et al., 2011

Document ID
13295330243263935096
Author
Stollon N
Stollon N
Publication year
Publication venue
On-Chip Instrumentation: Design and Debug for Systems on Chip

External Links

Snippet

Toshiba supports debug using a version of EJTAG interface revision 1.5, which was released in the late 1990s. This diverges from the current MIPS-EJTAG interface revisions, so a MIPS EJTAG debugger to would not support Toshiba MIPS architecture based parts …
Continue reading at link.springer.com (other versions)

Classifications

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    • G06F11/3648—Software debugging using additional hardware
    • G06F11/3656—Software debugging using additional hardware using a specific debug interface
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    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode

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