Ochotta et al., 1994 - Google Patents

Analog circuit synthesis for large, realistic cells: Designing a pipelined A/D converter with ASTRX/OBLX

Ochotta et al., 1994

Document ID
11113567565224864698
Author
Ochotta E
Carley L
Rutenbar R
Publication year
Publication venue
Proceedings of IEEE Custom Integrated Circuits Conference-CICC'94

External Links

Snippet

ASTRX/OBLX are a pair of synthesis tools that together can size high-performance analog circuit topologies to meet user supplied performance constraints. Previous approaches to cell synthesis have focused almost exclusively on small linear textbook circuits, eg classical …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G06F17/5022—Logic simulation, e.g. for logic circuit operation
    • G06F17/5031—Timing analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5045—Circuit design
    • G06F17/505—Logic synthesis, e.g. technology mapping, optimisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • G06F17/5081—Layout analysis, e.g. layout verification, design rule check
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/11—Complex mathematical operations for solving equations, e.g. nonlinear equations, general mathematical optimization problems
    • G06F17/13—Differential equations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30—Information retrieval; Database structures therefor; File system structures therefor
    • G06F17/30286—Information retrieval; Database structures therefor; File system structures therefor in structured data stores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78—Power analysis and optimization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/70—Fault tolerant, i.e. transient fault suppression
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06N—COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N5/00—Computer systems utilising knowledge based models
    • G06N5/02—Knowledge representation
    • G06N5/022—Knowledge engineering, knowledge acquisition
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequence
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequence by preliminary fault modelling, e.g. analysis, simulation

Similar Documents

Publication Publication Date Title
Ochotta et al. Synthesis of high-performance analog circuits in ASTRX/OBLX
del Mar Hershenson Design of pipeline analog-to-digital converters via geometric programming
De Smedt et al. WATSON: Design space boundary exploration and model generation for analog and RFIC design
Krasnicki et al. MAELSTROM: Efficient simulation-based synthesis for custom analog cells
Chandrakasan et al. Optimizing power using transformations
Conn et al. JiffyTune: Circuit optimization using time-domain sensitivities
US7574342B2 (en) Methods of model compilation for models used in an electronic circuit simulator
Ochotta et al. Practical synthesis of high-performance analog circuits
Chang et al. Verification of complex analog and RF IC designs
Ochotta et al. Analog circuit synthesis for large, realistic cells: Designing a pipelined A/D converter with ASTRX/OBLX
Lasbouygues et al. Temperature-and voltage-aware timing analysis
Saleh et al. Multilevel and mixed-domain simulation of analog circuits and systems
Vlach Modeling and simulation with Saber
Fares et al. FPAD: A fuzzy nonlinear programming approach to analog circuit design
Mukherjee et al. Efficient handling of operating range and manufacturing line variations in analog cell synthesis
Shi et al. VHDL-A design objectives and rationale
Wu Circuit optimization via adjoint Lagrangians
Kao et al. Timing analysis for piecewise linear Rsim
Mukherjee et al. Synthesis of manufacturable analog circuits
Tennakoon et al. Nonconvex gate delay modeling and delay optimization
Gielen et al. Simulation and modeling for analog and mixed-signal integrated circuits
Hjalmarson Studies on design automation of analog circuits: The design flow
Hein et al. RASSP VHDL modeling terminology and taxonomy-revision 1.0
Dhanwada et al. Hierarchical constraint transformation based on genetic optimization for analog system synthesis
Miller et al. Behavioral modeling in industrial IC design experiences and observations