WO2018207956A1

WO2018207956A1 - Method and device for entropy-encoding and entropy-decoding video signal

Info

Publication number: WO2018207956A1
Application number: PCT/KR2017/004818
Authority: WO
Inventors: 구문모
Original assignee: 엘지전자(주)
Priority date: 2017-05-10
Filing date: 2017-05-10
Publication date: 2018-11-15

Abstract

The present invention provides a method for performing entropy-decoding a video signal, the method comprising the steps of: receiving a video signal including a plurality of bit streams; decoding a symbol of a syntax element for each bit stream of the video signal; and deriving information of the syntax element by using the decoded symbol, wherein the syntax element is alternately mapped to the plurality of bit streams on the basis of a function block unit indicating an area in which one or more syntax elements are independently processed within a current block.

Description

Method and apparatus for entropy encoding and decoding video signals

The present invention relates to a method and apparatus for entropy encoding and decoding video signals. More specifically, the present invention relates to a method and apparatus for entropy encoding and decoding a video signal using several bit streams.

Entropy coding is a process of generating a raw byte sequence payload (RWSP) by losslessly compressing syntax elements determined through an encoding process. Entropy coding uses syntax statistics to assign short bits to frequently occurring syntax and long bits to syntax that is not syntactically to express syntax elements as concise data.

Among them, CABAC (Context-based Adaptive Binary Arithmetic Coding) uses a context model that is adaptively updated based on the context of the syntax and previously generated symbols during binary arithmetic coding. However, this CABAC also has a high complexity and has a sequential structure, which makes it difficult to perform parallel execution.

Accordingly, in video compression technology, there is a need to compress and transmit syntax elements more efficiently, and to this end, it is necessary to improve the performance of entropy coding.

An object of the present invention is to propose a method of coding a syntax element by mapping a syntax element to a plurality of bit streams in a function block unit for parallelization of entropy coding.

It is also an object of the present invention to propose a method for performing synchronization between several bit streams on a functional block basis or on a syntax element basis.

The technical problems to be achieved in the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned above will be clearly understood by those skilled in the art from the following description. Could be.

An aspect of the present invention provides a method of performing entropy decoding on a video signal, comprising: receiving a video signal consisting of a plurality of bit streams; Decoding a symbol of a syntax element for each bit stream of the video signal; And deriving information of the syntax element using the decoded symbol, wherein the syntax element is a function block unit indicating an area in which one or more syntax elements are independently processed in a current block. The plurality of bit streams may be alternately mapped.

Preferably, the decoding of the symbol of the syntax element may further include performing the synchronization between the plurality of bit streams in units of the functional blocks.

Preferably, the decoding of the symbol of the syntax element may further include performing the synchronization between the plurality of bit streams in units of the syntax element.

Preferably, the performing of the synchronization between the plurality of bit streams further comprises acquiring a lock for starting decoding of a current syntax element in a current bit stream, and only when the lock is obtained. The symbol of the current syntax element can be decoded.

Preferably, the performing of the synchronization between the plurality of bit streams may further include returning the obtained lock when decoding of the current syntax element is terminated.

Preferably, the performing of the synchronization between the plurality of bit streams may include: checking lock state information indicating whether a lock on the current syntax element is obtained in a bit stream other than the current bit stream. It may further include.

Preferably, the performing of the synchronization between the plurality of bit streams may include performing the synchronization between the plurality of bit streams when a regular coding referencing a context is applied to a current syntax element. .

Preferably, the decoding of the symbol of the syntax element may further include converting a current bit stream after decoding the symbol of the syntax element in units of the functional blocks.

Preferably, generating a thread (thread) representing a unit of work to be processed independently for each functional block unit and registering in a thread queue for storing information of the thread; And decrypting a plurality of threads stored in the thread queue in parallel.

According to another aspect of the present invention, there is provided an apparatus for performing entropy decoding on a video signal, the apparatus comprising: a video signal receiver configured to receive a video signal including a plurality of bit streams; A symbol decoder for decoding a symbol of a syntax element for each bit stream of the video signal; And a syntax element deriving unit configured to decode information of the syntax element using the decoded symbol, wherein the syntax element indicates a region in which one or more syntax elements are independently processed in a current block. ) May be alternately mapped to the plurality of bit streams.

Preferably, the symbol decoding unit may include a synchronization unit for performing synchronization between the plurality of bit streams in units of the functional blocks.

Preferably, the symbol decoding unit may include a synchronization unit that performs synchronization between the plurality of bit streams in units of syntax elements.

Preferably, the synchronization unit may acquire a lock for starting decoding of the current syntax element in the current bit stream, and the symbol of the current syntax element may be decoded only when the lock is obtained.

Preferably, the synchronization unit may return the obtained lock when decoding of the current syntax element is terminated.

Preferably, the synchronization unit may check lock state information indicating whether a lock on the current syntax element is obtained in a bit stream other than the current bit stream.

Preferably, the synchronization unit may perform synchronization between the plurality of bit streams when regular coding that refers to a context is applied to a current syntax element.

Preferably, the symbol decoder may switch a current bit stream after decoding a symbol of a syntax element in units of the functional blocks.

Preferably, the thread generating unit for generating a thread (thread) indicating a unit of work to be processed independently for each functional block unit to register in a thread queue for storing the information of the thread; And a thread decoder configured to decode a plurality of threads stored in the thread queue in parallel.

According to an embodiment of the present invention, throughput of entropy coding may be improved by coding syntax elements in function block units and parallelizing them into multiple bit streams.

According to an embodiment of the present invention, by performing synchronization between several bit streams, syntax elements may be coded in parallel while keeping the coding order.

In addition, according to an embodiment of the present invention, the symbols with regular coding and the symbols with bypass coding are assigned to multiple bit streams in parallel to improve throughput and complexity. Can be improved.

In addition, according to an embodiment of the present invention, the throughput of entropy coding can be improved by configuring a symbol group so that data dependency is minimized.

The effects obtainable in the present invention are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. .

1 is a schematic block diagram of an encoder in which encoding of a video signal is performed as an embodiment to which the present invention is applied.

2 is a schematic block diagram of a decoder in which decoding of a video signal is performed as an embodiment to which the present invention is applied.

3 is a schematic block diagram of an entropy encoding unit to which CABAC (Context-based Adaptive Binary Arithmetic Coding) is applied according to an embodiment to which the present invention is applied.

4 is a schematic block diagram of an entropy decoding unit to which CABAC (Context-based Adaptive Binary Arithmetic Coding) is applied according to an embodiment to which the present invention is applied.

5 is an embodiment to which the present invention is applied and shows an encoding flowchart performed according to Context-based Adaptive Binary Arithmetic Coding (CABAC).

6 is an embodiment to which the present invention is applied and shows a decoding flowchart performed according to Context-based Adaptive Binary Arithmetic Coding (CABAC).

FIG. 7 is a diagram illustrating a method of mapping syntax elements of residual coding syntax to a plurality of bit streams in a function block unit according to an embodiment to which the present invention may be applied. to be.

FIG. 8 is a residual coding syntax illustrating a method of performing synchronization between several bit streams in units of syntax elements as an embodiment to which the present invention can be applied.

FIG. 9 is a syntax illustrating a method of coding a syntax element of residual coding in a function block unit in a function block unit according to an embodiment to which the present invention is applied.

FIG. 10 is a syntax illustrating a method of coding a syntax element of a coding unit in various bit streams as an embodiment to which the present invention may be applied.

FIG. 11 is a syntax illustrating a method of coding a syntax element of a prediction unit in several bit streams as an embodiment to which the present invention may be applied.

12 is a syntax illustrating a method of coding a syntax element of a prediction unit in several bit streams as an embodiment to which the present invention may be applied.

FIG. 13 is a diagram illustrating a method of coding syntax elements of a coding unit in various bit streams as an embodiment to which the present invention may be applied.

FIG. 14 is a coding unit syntax illustrating a method of performing synchronization between several bit streams in units of syntax elements as an embodiment to which the present invention may be applied.

FIG. 15 is a syntax illustrating a method of coding a syntax element of a prediction unit in several bit streams as an embodiment to which the present invention may be applied.

FIG. 16 is a diagram illustrating a method of coding a syntax element of a prediction unit (PU) in several bit streams as an embodiment to which the present invention may be applied.

FIG. 17 is a prediction unit syntax illustrating a method of performing synchronization between several bit streams in units of syntax elements according to an embodiment to which the present invention may be applied.

FIG. 18 is a diagram for describing a method of coding by mapping units divided hierarchically from a coding tree unit (CTU) to several bit streams as an embodiment to which the present invention may be applied.

FIG. 19 is a flowchart to describe a process of performing entropy decoding on a video signal composed of several bit streams as an embodiment to which the present invention may be applied.

Exemplary elements and operations in accordance with embodiments of the present invention are described below with reference to the accompanying drawings. However, it is to be noted that the elements and operations of the present invention described with reference to the drawings are provided only as embodiments, and thus the technical spirit of the present invention and its core configuration and operation are not limited thereto.

In addition, the terminology used in the present invention is selected as a general term widely used as possible now, in a specific case will be described using terms arbitrarily selected by the applicant. In that case, the meaning is clearly stated in the detailed description of the part. Therefore, it should be understood that the present invention should not be simply interpreted based on only the names of the terms used in the description of the present specification, and the meanings of the terms should be interpreted.

In addition, terms used in the present invention may be replaced for more appropriate interpretation when there are general terms selected to describe the invention or other terms having similar meanings. For example, signals, data, samples, pictures, frames, and blocks may be interpreted as appropriate in each coding process.

In addition, the concepts and methods of the embodiments described herein may be applicable to other embodiments, and combinations of the embodiments may be applicable within the technical scope of the present invention even if all of them are not explicitly described. .

Referring to FIG. 1, the encoder 100 may include an image splitter 110, a transformer 120, a quantizer 130, an inverse quantizer 140, an inverse transformer 150, a filter 160, and a decoder. It may include a decoded picture buffer (DPB) 170, an inter predictor 180, an intra predictor 185, and an entropy encoder 190.

The image divider 110 may divide the input image (or a picture or a frame) input to the encoder 100 into one or more processing units. For example, the processing unit may be a Coding Tree Unit (CTU), a Coding Unit (CU), a Prediction Unit (PU), or a Transform Unit (TU).

The encoder 100 may generate a residual signal by subtracting the prediction signal output from the inter prediction unit 180 or the intra prediction unit 185 from the input image signal, and the generated residual signal is converted into a conversion unit ( 120).

The transformer 120 may generate a transform coefficient by applying a transform technique to the residual signal. For example, the transformation technique may include at least one of a discrete cosine transform (DCT), a discrete sine transform (DST), a karhunen-loeve transform (KLT), a graph-based transform (GBT), or a conditionally non-linear transform (CNT). It may include. Here, GBT means a conversion obtained from this graph when the relationship information between pixels is represented by a graph. CNT refers to a transform that is generated based on and generates a prediction signal using all previously reconstructed pixels. In addition, the conversion process may be applied to pixel blocks having the same size as the square, or may be applied to blocks of variable size rather than square.

The quantization unit 130 may quantize the transform coefficients and transmit them to the entropy encoding unit 190, and the entropy encoding unit 190 may entropy code the quantized signal and output the bitstream.

The quantized signal output from the quantization unit 130 may be used to generate a prediction signal. For example, the quantized signal may reconstruct the residual signal by applying inverse quantization and inverse transformation through inverse quantization unit 140 and inverse transformation unit 150 in a loop. The reconstructed signal may be generated by adding the reconstructed residual signal to the prediction signal output from the inter predictor 180 or the intra predictor 185.

The filtering unit 160 applies filtering to the reconstruction signal and outputs it to the reproduction apparatus or transmits the decoded picture buffer to the decoding picture buffer 170. The filtered signal transmitted to the decoded picture buffer 170 may be used as the reference picture in the inter predictor 180. As such, by using the filtered picture as a reference picture in the inter prediction mode, not only image quality but also encoding efficiency may be improved.

The decoded picture buffer 170 may store the filtered picture for use as a reference picture in the inter prediction unit 180.

The inter prediction unit 180 performs temporal prediction and / or spatial prediction to remove temporal redundancy and / or spatial redundancy with reference to the reconstructed picture. In this case, in order to reduce the amount of motion information transmitted in the inter prediction mode, the motion information may be predicted based on the correlation of the motion information between the neighboring block and the current block.

The intra predictor 185 may predict the current block by referring to samples around the block to which current encoding is to be performed. The intra prediction unit 185 may perform the following process to perform intra prediction. First, reference samples necessary for generating a prediction signal may be prepared. The prediction signal may be generated using the prepared reference sample. Then, the prediction mode is encoded. In this case, the reference sample may be prepared through reference sample padding and / or reference sample filtering. Since the reference sample has been predicted and reconstructed, there may be a quantization error. Accordingly, the reference sample filtering process may be performed for each prediction mode used for intra prediction to reduce such an error.

The prediction signal generated by the inter predictor 180 or the intra predictor 185 may be used to generate a reconstruction signal or to generate a residual signal.

Referring to FIG. 2, the decoder 200 may include an entropy decoding unit 210, an inverse quantization unit 220, an inverse transform unit 230, a filtering unit 240, and a decoded picture buffer unit (DPB) 250. ), An inter predictor 260, and an intra predictor 265.

The reconstructed video signal output through the decoder 200 may be reproduced through the reproducing apparatus.

The decoder 200 may receive a signal output from the encoder 100 of FIG. 1, and the received signal may be entropy decoded through the entropy decoding unit 210.

The inverse quantization unit 220 obtains a transform coefficient from the entropy decoded signal using the quantization step size information.

The inverse transformer 230 inversely transforms a transform coefficient to obtain a residual signal.

The reconstruction signal is generated by adding the obtained residual signal to the prediction signal output from the inter prediction unit 260 or the intra prediction unit 265.

The filtering unit 240 applies filtering to the reconstruction signal and outputs it to the reproduction apparatus or transmits the decoded picture buffer unit 250 to the reproduction device. The filtered signal transmitted to the decoded picture buffer unit 250 may be used as the reference picture in the inter predictor 260.

In the present specification, the embodiments described by the filtering unit 160, the inter prediction unit 180, and the intra prediction unit 185 of the encoder 100 are respectively the filtering unit 240, the inter prediction unit 260, and the decoder. The same may be applied to the intra predictor 265.

The entropy encoding unit 300 to which the present invention is applied includes a binarization unit 310, a context modeling unit 320, a binary arithmetic encoding unit 330, and a memory 360, and the binary arithmetic encoding unit 330 includes: A regular binary encoding unit 340 and a bypass binary encoding unit 350. Here, the regular binary encoding unit 340 and the bypass binary encoding unit 350 may be referred to as a normal coding engine and a bypass coding engine, respectively.

The binarization unit 310 may output a binary symbol string composed of a binary value of 0 or 1 by receiving a sequence of data symbols and performing binarization. The binarization unit 310 may map syntax elements into binary symbols. Several different binarization processes, such as unary (U), truncated unary (TU), k-th order Exp-Golomb (EGk), and fixed length processes, support binarization. Can be used for The binarization process may be selected based on the type of syntax element.

The output binary symbol string is transmitted to the context modeling unit 320.

The context modeling unit 320 selects probability information necessary for coding a current block from a memory and transmits the probability information to the binary arithmetic encoding unit 330. For example, the context memory may be selected from the memory 360 based on the syntax element to be coded, and the probability information required for coding the current syntax element may be selected through the bin index binIdx. Here, context refers to information about a probability of occurrence of a symbol, and context modeling refers to a process of estimating a probability necessary for binary arithmetic coding of the next bin from information about previously coded bins. . The context may include a state representing a specific probability value and a Most Probable Symbol (MPS).

The context modeler 320 may provide accurate probability estimation necessary to achieve high coding efficiency. Accordingly, different context models may be used for different binary symbols and the probability of such context model may be updated based on the values of previously coded binary symbols.

Binary symbols with similar distributions can share the same context model. The context model for each of these binary symbols includes the syntax information of the bin, the bin index (binIdx) indicating the location of the bin in the bin string, the probability of the bin in the neighboring block of the block containing the bin, and the neighboring block for probability estimation. At least one of the decoding values of the specific syntax element of may be used.

The binary arithmetic encoding unit 330 includes a regular binary encoding unit 340 and a bypass binary encoding unit 350 to perform entropy encoding on the output string. And output compressed data bits.

The regular binary encoding unit 340 performs arithmetic coding based on recursive interval division.

First, an interval (or interval, range) having an initial value of 0 to 1 is divided into two lower intervals based on a probability of a binary symbol. When the encoded bits are converted to binary decimal numbers, they provide an offset from which one of intervals representing 0 or 1 can be selected in the course of successive decoding of binary symbol values.

After the binary symbol in the decoded mode, the interval can be updated to equalize the selected lower interval, and the interval division process itself is repeated. The spacing and offset have limited bit precision, so renormalization may be necessary to prevent overflow each time the spacing falls below a certain value. The renormalization may occur after each binary symbol is encoded or decoded.

The bypass binary encoding unit 350 performs encoding without a context model, and performs coding by fixing a probability of a bin currently coded to 0.5. This can be used when it is difficult to determine the probability of syntax or when you want to code at high speed.

The entropy decoding unit 400 to which the present invention is applied includes a context modeling unit 410, a binary arithmetic decoding unit 420, a memory 450, and an inverse binarization unit 460, and the binary arithmetic decoding unit 420. A regular binary decoding unit 430 and a bypass binary decoding unit 440 are included.

The entropy decoding unit 400 receives the bit stream and checks whether a bypass mode is applied to the current syntax element. In this case, the bypass mode means that the coding is performed by fixing the probability of the currently coded bin to 0.5 without using the context model. When the bypass mode is not applied, the regular binary decoding unit 430 performs binary arithmetic decoding according to a regular mode.

In this case, the context modeling unit 410 selects probability information necessary for decoding the current bitstream from the memory 450 and transmits the probability information to the regular binary decoding unit 430.

On the other hand, when a bypass mode is applied, the bypass binary decoding unit 440 performs binary arithmetic decoding according to the bypass mode.

The inverse binarization unit 460 receives a binary-type bin decoded by the binary arithmetic decoding unit 420 and converts it into an integer-type syntax element value. On the other hand, in the case of a syntax element in which a bin or a bin string of binary forms is mapped to a value of a syntax element, the debinarization unit 460 may output the binary bin as it is. have,

The encoder may perform binarization on the syntax element (S510).

The encoder may determine whether to perform binary arithmetic coding according to a normal mode or binary arithmetic coding according to a bypass mode (S520).

In the normal mode, the encoder may select a context model (S530) and perform binary arithmetic encoding based on the context model (S540). In addition, the encoder may update the context model (S550), and may select a suitable context model again based on the updated context model in operation S530.

In the bypass mode, the encoder may perform binary arithmetic encoding based on a probability of 0.5 (S560).

First, the decoder may receive a bitstream (S610).

The decoder may check whether a regular mode or a bypass mode is applied to the current syntax element (S620). Here, whether to apply the bypass mode may be determined in advance according to the type of syntax.

In addition, symbols applied with the normal mode and symbols applied with the bypass mode may be combined to form a syntax element. In this case, the decoder may check whether a bypass mode is applied to the symbols of the current syntax element.

When the normal mode is applied as a result of checking in step S620, the decoder may select a context model (S630) and perform binary arithmetic decoding based on the context model (S640). In addition, the decoder may update the context model (S650), and may select a suitable context model again based on the updated context model in operation S630.

On the other hand, when the bypass mode is applied as a result confirmed in step S620, the decoder may perform binary arithmetic decoding based on the probability 0.5 (S660).

The decoder may perform inverse binarization on the decoded bin string (S670). For example, a decoded binary type bin may be input and converted into an integer syntax element value.

In the case of coding high quality, high frame rate, and high resolution images in recent video standards, the entropy coding procedure is likely to be a bottleneck of overall performance due to data dependence inherent to arithmetic coding algorithms. When frames with many bit data are generated in a row, a large amount of buffer memory may be needed because several frames must be buffered for real-time processing. Therefore, an improvement in throughput of entropy coding is required.

As an entropy coding method which is widely applied at present, an arithmetic coding method may be mentioned. For example, in the case of H.264 and HEVC, CABAC (Context-Adaptive Binary Arithmetic Coding), in which the probability of a symbol is adaptively applied, is applied as an entropy coding method for binary symbols. Here, a binary symbol refers to a symbol having a value of 0 or 1. On the other hand, a multi-symbol (ie, a non-binary symbol) refers to a symbol that can have three or more values.

The set of all possible unit numbers finally input to the arithmetic coding engine may be referred to as alphabet. Accordingly, in the case of a binary symbol, the alphabet may be represented as being composed of 0 and 1, or may be represented as being 0 and 1 as alphabetical symbols.

In arithmetic coding, the interval (or interval) of [0, 1] is divided by a probability interval proportional to the probability of occurrence of each symbol. The length of each probability interval is determined in proportion to the probability value for the corresponding symbol. After dividing the interval proportionally to the probability interval of each symbol, the interval for the currently coded symbol is selected, and the selected interval is used when coding the next symbol. Since the length of the interval continues to get smaller as the symbols are coded, the interval length can be scaled through a renormalization procedure so that the length of the interval is always within a certain range.

Hereinafter, for convenience of explanation in the description of the present invention, for example, it will be described based on Context Adaptive Binary Arithmetic Coding (CABAC), but the present invention is not limited thereto. For example, non-binary arithmetic coding may be applied to the present invention instead of binary arithmetic coding.

In binary arithmetic coding, the probability interval is divided into two, and in multi-symbol (or multi-valued) arithmetic coding, the probability interval is divided by the number of symbols used (ie, the number of alphabet symbols). Except for the number of divided intervals, the arithmetic coding method does not have a difference between binary arithmetic coding and multi-symbol arithmetic coding. In other words, the same arithmetic coding method can be applied to binary arithmetic coding and multi-symbol arithmetic coding.

In addition, in the description of the present invention, for convenience of description, an example will be described based on a syntax or syntax element of HEVC, but the present invention is not limited thereto.

The present invention proposes a method of coding a syntax element by mapping a syntax element to a plurality of bit streams in a function block unit in order to improve throughput of entropy coding.

Here, a functional block represents an area or a block in which one or more syntax elements are mapped and processed (or coded), and the term of the functional block is not limited to the name. For example, the functional block may be referred to as a sub block, a functional unit, an area unit, a functional area, a sub area, a syntax element group, and the like.

In addition, the present invention proposes a method for performing synchronization between several bit streams in units of functional blocks or in syntax elements.

In the following description of the present invention, for convenience of description, the syntax of the HEVC is described as an example, but the present invention is not limited thereto.

Referring to FIG. 7, the encoder / decoder may split a residual coding routine (or residual coding syntax) into a plurality of subroutines (or stages), and map the divided subroutines to several bit streams to pipelining ( Can be coded in a pipelining fashion. Here, the coding routine represents a series of coding procedures that are performed on a specific syntax structure. At this time, the coding includes encoding and decoding. The subroutine represents an area obtained by dividing the coding routine into functional block units.

For example, if the residual coding routine of HEVC is divided into functional block units, it may be divided into seven subroutines. The first subroutine of the divided seven subroutines may be represented as shown in Table 1 below.

Referring to Table 1, the encoder / decoder may code syntax elements transform_skip_flag, last_sig_coeff_x_prefix, last_sig_coeff_y_prefix, last_sig_coeff_x_suffix, and last_sig_coeff_y_suffix in the first subroutine.

Here, transform_skip_flag means a syntax element indicating whether a transform is applied to the current transform block. last_sig_coeff_x_prefix may indicate the prefix of the column position of the last significant coefficient in the scan order within the transform block. last_sig_coeff_y_prefix may indicate the prefix of the row position of the last significant coefficient in the scan order within the transform block. last_sig_coeff_x_suffix may indicate the column position suffix of the last significant coefficient in the scan order within the transform block. last_sig_coeff_y_suffix may indicate the row position suffix of the last significant coefficient in the scan order within the transform block. And the meaningful coefficients represent non-zero quantized transform coefficients.

That is, the encoder / decoder may code a syntax element indicating whether a transform is applied to a current transform block in the first subroutine, and code a position of a last non-zero transform coefficient in the current transform block.

In addition, the second subroutine of the divided seven subroutines may be represented as shown in Table 2 below.

Referring to Table 2, the encoder / decoder may code the syntax element coded_sub_block_flag in the second subroutine.

Here, coded_sub_block_flag indicates whether a non-zero quantized transform coefficient exists in subblock units.

In addition, the third subroutine of the divided seven subroutines may be represented as shown in Table 3 below.

Referring to Table 3, the encoder / decoder may code the syntax element sig_coeff_flag in the third subroutine.

Here, sig_coeff_flag may indicate whether the quantized transform coefficient has a value greater than zero.

In addition, a fourth subroutine of the divided seven subroutines may be represented as shown in Table 4 below.

Referring to Table 4, the encoder / decoder may code the syntax element coeff_abs_level_greater1_flag in the fourth subroutine.

Here, coeff_abs_level_greater1_flag may indicate whether the absolute value of the quantized transform coefficient has a value greater than one.

In addition, the fifth subroutine of the divided seven subroutines may be represented as shown in Table 5 below.

Referring to Table 5, the encoder / decoder may code the syntax element coeff_abs_level_greater2_flag in the fifth subroutine.

Here, coeff_abs_level_greater2_flag may indicate whether the absolute value of the quantized transform coefficient has a value greater than two.

In addition, the sixth sub-routine of the divided seven sub-routines may be represented as shown in Table 6 below.

Referring to Table 6, the encoder / decoder may code the syntax element coeff_sign_flag in the sixth subroutine.

Here, coeff_sign_flag may indicate the sign of the quantized transform coefficient.

In addition, the seventh sub-routine of the divided seven sub-routines may be represented as shown in Table 7 below.

Referring to Table 7, the encoder / decoder may code a syntax element coeff_abs_level_remaining in the seventh subroutine.

Here, coeff_abs_level_remaining may represent an absolute value of the remaining values of the values of the quantized transform coefficients.

The encoder / decoder may code (or parse) whether a transform is applied to the TU in units of transform units (TUs) and positions of last non-zero transform coefficients in a first subroutine, and the encoder / decoder The syntax elements described in Tables 2 to 6 may be coded in units of coefficient groups (CGs) (or subgroups) in subsequent subroutines (ie, second to seventh subroutines).

Referring to FIG. 7, the encoder / decoder maps a first subroutine performed in TU units to a first bit stream (hereinafter referred to as BS1) 701, and the bit stream in CG units in a pipelining manner from the second subroutine. Can be coded alternately. In other words, the encoder / decoder may code each subroutine performed in CG units after the first subroutine in several bit streams.

Specifically, the encoder / decoder may perform the second subroutine of the first CG in BS1 701 and then perform the second subroutine of the next CG in a second bit stream (hereinafter BS2) 702. The encoder / decoder may perform the second subroutine of the second CG in BS2 702 and then perform the second subroutine of the next CG in third bit stream (BS3) 703.

In the above manner, the encoder / decoder may code the syntax elements of the subroutine by alternating bit streams in CG units from the second subroutine to the seventh subroutine.

In this case, the encoder / decoder may perform the synchronization between the bit streams at the time when the subroutine is switched (that is, the time indicated by the dotted line in FIG. 7) in consideration of the data dependency on previously coded information. have. In other words, the encoder / decoder may perform synchronization between several bit streams at intervals of subroutines (or functional block units).

Here, the case where the data dependency exists, for example, when using the same context model, may refer to previously coded information. By performing synchronization between bit streams when the subroutine is switched, the encoder / decoder can code (or perform) each subroutine in parallel while keeping the coding order.

On the other hand, the encoder / decoder may perform synchronization on a syntax element basis to code in parallel while keeping the coding order. It demonstrates with reference to the following drawings.

As described above, the encoder / decoder may divide the residual coding routine into a plurality of subroutines, and map the divided subroutines to multiple bit streams to code them in a pipelining manner.

In an embodiment of the present invention, the encoder / decoder may perform synchronization between several bit streams in units of syntax elements in consideration of data dependency.

In detail, the encoder / decoder may perform a procedure of acquiring and returning a lock on a current syntax element or a current processing region (or a current processing block) to perform synchronization between several bit streams.

Referring to FIG. 8A, the encoder / decoder may acquire and release a lock in order to exclusively code the syntax element coded_sub_block_flag in each CG (or functional block) (S801).

Here, '(LA)' refers to an operation of acquiring a lock in order to exclusively perform coding of a corresponding syntax element or processing region as a lock acquire. When obtaining a lock on the current CG in the current bit stream, other bit streams (or CG pipelines, CG threads, and CG CABACs) may stop coding without starting coding corresponding syntax elements or processing regions.

'(LR)' indicates an operation of releasing a lock acquired as a lock release so that a lock can be acquired in another bit stream.

In this case, the encoder / decoder may perform an operation of acquiring and returning a lock while keeping a processing order (or coding order) between CGs. For example, if the processing (or coding) of a syntax element or region in the i th CG is only possible after the processing of the syntax element or region in the i-1 th CG, the encoder / decoder identifies which CG has unlocked To acquire the lock on the next CG.

If subroutines performed in units of CG are coded alternately across several bit-streams, the encoder / decoder checks whether a lock has been obtained and returned from the previous bit stream (or CG) to obtain the lock for the current bit stream. You can try

Referring to FIG. 8B, the encoder / decoder may acquire a lock prior to the CG loop (or subroutine) coding the syntax element sig_coeff_flag for each CG (S802).

That is, the encoder / decoder may acquire a lock before coding the syntax element, release the lock after coding the syntax element, and perform synchronization between several bit streams, as in step S801, or as in step S802. For example, a lock may be acquired before performing a CG loop performed for each CG, and the lock may be released after the CG loop ends to perform synchronization between several bit streams.

When a lock is acquired / released for each syntax element, it may be coded in parallel while effectively considering data dependencies that may exist between syntax elements of each CG. In other words, by performing synchronization for each syntax element, the encoder / decoder can code while keeping the order between the syntax elements of each CG.

On the other hand, in the case of acquiring / releasing locks for each CG loop, synchronization between several bit streams may be performed by acquiring the lock before performing the corresponding CG loop, and the CG loop may be performed in parallel. In this case, the coding for each CG in the CG loop may be performed on a plurality of bit streams in a pipelining manner.

Referring to FIG. 8C, the encoder / decoder may code syntax elements coeff_sign_flag and coeff_abs_level_remaining without performing synchronization, that is, without performing a lock acquisition and return procedure (S803 and S804).

For example, when bypass coding is applied to the syntax elements coeff_sign_flag and coeff_abs_level_remaining, data dependency may not exist. In this case, when the encoder / decoder codes the coeff_sign_flag and the coeff_abs_level_remaining, the synchronization may not be applied, thereby improving parallelism of the subroutine performed in the CG unit (or functional block unit).

In one embodiment of the present invention, the encoder / decoder may code a syntax element of each functional block (or subroutine) and then bitstream switch to process multiple transform units simultaneously in multiple bitstreams.

For example, in the case of HEVC, the number of CGs in the TU is variable according to the size of the TU. 7 and 8, the throughput of entropy coding may be improved when the number of CGs is one or more, and the throughput of entropy coding may be maximized when the number of CGs is less than the number of bit streams. Can be.

On the other hand, when the number of CGs to which parallelization (or pipelining) can be applied according to the size of the TUs is small, the CGs belonging to multiple TUs or multiple TUs by switching bit streams into CG units (or subroutine units). Can be processed in parallel, which can improve the throughput of entropy coding.

Specifically, the encoder / decoder allocates a bit stream for a subroutine performed in CG units within the current TU, and then switches the bit stream before the next subroutine performed in CG units within the TU (previous FIG. 7). To the first subroutine). That is, the encoder / decoder may parallelize the coding of the CG loop of the current TU (the second to seventh subroutine in FIG. 7 before) and the CG loop before the next TU (before the first subroutine in FIG. 7), By continuously assigning bit streams to the GG loop of the next TU, pipelines for various bit streams can be performed without stopping, and a section in which a pipelining stall occurs can be minimized. Here, the pipelining stall means a coding delay occurring in the pipeline.

As described above in FIG. 7, in the TU, the first sub-tutin and the CG loop (second to seventh subroutines) may not be performed at the same time. According to the present embodiment, since the encoder / decoder can perform the CG loop for the current TU and at the same time perform the first subroutine for the next TU, an idle that can occur until starting the CG loop of the next TU is performed. You can save time.

Referring to FIG. 9, the encoder / decoder may switch a next bit stream after coding a syntax element in CG units through a CG loop (S901).

For example, the encoder / decoder may switch the bit stream by calling set_next_bitstream () indicating the switch of the bit stream. As the set_next_bitstream () syntax is expressed on the syntax, the encoder / decoder may perform entropy coding in parallel using several bit streams.

In this case, since the bit stream is switched for each iteration of the for loop, which is a CG loop, the bit stream can be switched even after the subroutine for the last CG. Thus, subroutines up to the CG loop before the next TU and subroutines corresponding to the first iteration of the next CG loop can be coded in the switched bit stream.

It demonstrates with reference to TU syntax of Table 8 below.

Referring to Table 8, for example, it is assumed that several residual coding routines (or residual coding syntax) are called in a TU, and only one CG is coded in each residual coding routine.

In this case, according to the method proposed in this embodiment, the encoder / decoder performs coding before the CG loop of the next TU (ie, syntax elements transform_skip_flag, last_sig_coeff_x_prefix, last_sig_coeff_y_prefix, last_sig_coeff_x_suffix, and last_sig_coeff_coeff_yGs of the current coding of the loop _Guff_y_suffix). Can be performed simultaneously with the CG loop of the next TU.

In the above, the method of mapping the syntax elements of the residual coding to several bit streams and coding them in parallel has been described. The aforementioned functional block unit parallel coding method may be applied to coding routines (or parsing routines) other than the residual coding routine in the same manner. It demonstrates with reference to the following drawings.

In an embodiment of the present invention, the encoder / decoder may code threads in parallel by mapping a thread on which a coding unit (CU) routine (or CU syntax) is performed to several bitstreams. Here, a thread refers to a unit of work that an entropy encoder / decoder processes independently, and the thread is not limited to the name of the term. In addition, the encoder / decoder may allocate functional blocks or threads to several bit streams in a round-robin fashion.

First, the encoder / decoder codes a syntax element split_cu_flag indicating whether the current CU is split into a lower CU (or a lower depth CU) (S1001).

If the current CU is not divided into lower CUs, a CU thread for executing a coding routine performed in a CU unit is registered in a thread queue (S1002).

That is, the encoder / decoder may register the CU routine as a thread in the thread queue without directly calling the CU syntax in the CTU syntax to execute the CU routine in parallel. Thereafter, the encoder / decoder may map a plurality of CU threads stored in the thread queue (or registered in the thread queue) to the multiple bit streams and code them in parallel.

In an embodiment of the present invention, the encoder / decoder may map a thread in which a prediction unit (PU) routine is performed to multiple bitstreams and code them in parallel.

When the CU skip is applied to the current CU, the encoder / decoder registers a PU thread for executing a coding routine performed in units of PUs in the thread queue (S1101).

Here, the CU skip means that no additional syntax element is signaled except index information for merging in CU syntax. In this case, whether CU skip is applied to the current CU may be signaled from the encoder through cu_skip_flag. If the value of cu_skip_flag is 1, it may mean that the skip mode is applied to the current CU. If the value of cu_skip_flag is 0, it may mean that the skip mode is not applied. The decoder may determine whether CU skip is applied to the current CU by parsing cu_skip_flag.

If the prediction mode of the current CU is inter mode and the partition mode (PartMode) of the current CU is PART_2Nx2N, the encoder / decoder may code a syntax element merge_flag (S1102) and put a PU thread of the PU into a thread queue. It is possible to register (S1103).

If the partition mode (PartMode) of the current CU is not PART_2Nx2N, the encoder / decoder may register PU threads of the partitioned PU according to the partition mode of the current CU in a thread queue.

That is, the encoder / decoder does not directly call the PU syntax (or PU thread, PU syntax routine, PU routine) in CU syntax to execute PU routines in parallel, but registers the PU routine as a thread in the thread queue. Can be. Thereafter, the encoder / decoder may map and encode a plurality of PU threads output from the thread queue (or registered in the thread queue) to several bit streams, respectively.

In addition, as in step S1102, the encoder / decoder may code the PU threads independently by coding the syntax merge_flag within the CU syntax when the split mode of the current CU is PART_2N × 2N.

In FIG. 11, a method of creating a PU thread in a CU syntax and registering it in a thread queue, and extracting several threads from the thread queue and coding the same in parallel in multiple bit streams. Hereinafter, a method of parallelly coding a PU thread (or PU routine) by switching bit streams while calling a PU syntax will be described with reference to the following drawings.

In one embodiment of the present invention, the encoder / decoder calls PU syntax in CU syntax and switches bitstreams to map PU syntax (or PU threads, PU routines, PU syntax routines) to multiple bitstreams and to code them in parallel can do.

Referring to FIG. 12A, when CU skip is applied to the current CU, the encoder / decoder may call the PU syntax and switch the bit stream (S1201).

That is, the encoder / decoder may change the bit stream every time a PU syntax is called in a CU syntax to parallelize coding of a PU (or PU thread) with coding of the remaining syntax elements in the CU syntax. In this case, the next bit stream among a plurality of bit streams may be determined in a round-robin manner.

If the partition mode of the PU is PART_2NxN, the encoder / decoder may call the PU syntax and switch the bit stream (S1202).

If the partition mode of the PU is not PART_2N × 2N, the PU syntax may be called more than once in the CU syntax, and two or more PU threads may be generated and executed in parallel in several bit streams.

Referring to FIG. 13, a CU routine may be divided into three stages (or subroutines) 1301, 1302, and 1303. The encoder / decoder may code the divided three stages in a pipelining manner.

In detail, in the first stage 1301, the encoder / decoder may code syntax elements cu_transquant_bypass_flag and cu_skip_flag. If the cu_transquant_bypass_flag value is 1, the scaling and transform process and the in-loop filter process can be skipped. And cu_skip_flag may indicate whether a skip mode is applied to the current CU.

When the syntax element cu_skip_flag value is 1 in the second stage 1302, the encoder / decoder may register a PU unit (prediction unit thread) in the thread queue.

When the syntax element cu_skip_flag value is 0 in the second stage 1302, the encoder / decoder may code the syntax elements pred_mode_flag and part_mode. Here, pred_mode_flag may indicate a prediction mode applied to the current CU. That is, when the pred_mode_flag value is 0, it may be coded in inter prediction mode, and when the pred_mode_flag value is 1, it may be coded in intra prediction mode. part_mode may indicate the partition mode of the current CU.

If the prediction mode of the current block is the intra prediction mode, the encoder / decoder may code syntax elements pcm_flag, pcm_alignment_zero_bit, prev_intra_luma_pred_flag, mpm_idx, rem_intra_luma_pred_mode, and intra_chroma_pred_mode.

Here, when the pcm_flag value is 1, it indicates that the CU of the luminance component has the pcm_sample syntax and the transform_tree syntax does not exist. The encoder / decoder codes pcm_alignment_zero_bit when the current position in the bit stream is not on the boundary of one byte, where pcm_alignment_zero_bit is zero. A value of 1 for prev_intra_luma_pred_flag indicates that the intra prediction mode of the current PU is included in the Most Probable Mode (MPM) mode, and 0 indicates that the intra prediction mode of the current PU is not included in the Most Probable Mode (MPM) mode. . For the remaining prediction modes not included in the Most Probable Mode (MPM) mode, the encoder / decoder may code rem_intra_luma_pred_mode. In addition, intra_chroma_pred_mode may indicate a prediction mode of the color difference component in PU units.

If the prediction mode of the current block is not the intra prediction mode (or the inter prediction mode), the encoder / decoder may code a syntax element merge_flag and register a PU thread in the thread queue.

By registering the PU thread in the thread queue only in the second stage 1302, it is possible to keep the order (or the order in which the issue) is registered in the thread queue between the PUs.

In the third stage 1303, the encoder / decoder may code a syntax element rqt_root_cbf when the prediction mode of the current CU is not an intra prediction mode, and the current CU is a merge mode and the split mode is not PART_2N × 2N. Here, rqt_root_cbf may indicate whether a transform_tree syntax exists for the current CU.

In the third stage 1303, the encoder / decoder may register a transform tree thread to a thread queue.

In an embodiment of the present invention, the encoder / decoder may perform synchronization between several bit streams in units of syntax elements in consideration of data dependency. In detail, the encoder / decoder may perform a procedure of acquiring and returning a lock on a current syntax element or a current processing region (or a current processing block) to perform synchronization between several bit streams.

Referring to FIG. 14A, the encoder / decoder may acquire and release a lock to exclusively code a syntax element cu_transquant_bypass_flag in each CU (or CU thread) (S1401).

That is, when the encoder / decoder acquires the lock for the current CU in the current bit stream as described above with reference to FIG. 8, the encoder / decoder is coded without starting coding the corresponding syntax element or processing region in another bit stream (or another CU thread). Can stop.

In this case, the encoder / decoder may perform an operation of acquiring and returning a lock while keeping the processing order (or coding order) between CUs.

In the same manner as in operation S1401, the encoder / decoder may acquire / release a lock on a syntax element basis in the process of coding syntax elements of a CU to perform synchronization between several bit streams.

As described above, when the split mode of the current CU is PART_2N × 2N, the encoder / decoder may code merge_flag within the CU syntax to independently code the PU threads (S1402).

The encoder / decoder may perform synchronization between several bit streams before generating the PU thread according to the partitioning mode of the PU in order to keep the order in which the PU threads are created (or issue) (S1403). In other words, the encoder / decoder may acquire the lock before generating the PU thread according to the split mode.

Referring to FIG. 15, when the value of cu_skip_flag is 0 and the split mode of the current PU is PART_2Nx2N, the syntax element merge_flag may have already been coded in the CU syntax (see S1102 of FIG. 11 and S1402 of FIG. 14).

Therefore, when the value of cu_skip_flag is 0 and the split mode of the current PU is not PART_2Nx2N, the encoder / decoder may code merge_flag (S1501).

Referring to FIG. 16, a PU routine may be divided into three stages (or subroutines) 1601, 1602, and 1603. The encoder / decoder may code the divided three stages into several bit streams in a pipelining manner.

Specifically, in the first stage 1601, the encoder / decoder may code the syntax element merge_idx when the value of cu_skip_flag is 1. If the value of cu_skip_flag is 0, the encoder / decoder may code the syntax element merge_flag.

In the first stage 1601, the encoder / decoder may code merge_idx when the merge_flag value is 1. If the merge_flag value is 1, the encoder / decoder may code the syntax element inter_pred_idc. Here, inter_pred_idc indicates whether List 0, list 1, or bidirectional prediction is used for the current PU.

In the second stage 1602, the encoder / decoder may code syntax elements ref_idx_l0, mvd_coding, and mvp_l0_flag when the inter_pred_idc value is not in the list 1 direction. Here, ref_idx_l0 represents a reference picture index in the list 0 direction, and mvp_l0_flag represents a motion vector prediction value index in the list 0 direction. mvd_coding may be coded on the PU syntax when synchronization is performed on a syntax element basis. It will be described later in detail.

In the second stage 1602, the encoder / decoder may code syntax elements ref_idx_l1, mvd_coding and mvp_l1_flag when the inter_pred_idc value is in the list 1 direction. Here, ref_idx_l1 indicates a reference picture index in the list 1 direction, and mvp_l1_flag indicates a motion vector prediction value index in the list 1 direction.

In the third stage 1603, the encoder / decoder may code syntax elements ref_idx_l1, mvd_coding, and mvp_l1_flag when the inter_pred_idc value is bidirectional prediction.

In this case, since there is no data dependency between ref_idx_l0 and ref_idx_l1 and between mvp_l0_flag and mvp_l1_flag, the encoder / decoder may simultaneously code the syntax elements.

As described above with reference to FIG. 8, '(LA)' refers to an operation of acquiring a lock in order to exclusively perform coding of a corresponding syntax element or processing region as a lock acquire. When obtaining a lock for the current CG in the current bit stream, the coding may be stopped in another bit stream (or PU pipeline, PU thread, or PU CABAC) without starting coding of the corresponding syntax element or processing region.

In this case, the encoder / decoder may perform an operation of acquiring and returning a lock while keeping the processing order (or coding order) between PUs.

In addition, the encoder / decoder may perform motion vector differential value coding (mvd_coding) in a PU syntax (or PU routine) in order to effectively perform syntax element unit synchronization.

Referring to FIG. 18, coding routines (or threads) may be coded in several bit streams in a hierarchical division structure.

The encoder / decoder codes the coding quad tree (coding_quadtree) syntax (S1801). In this case, the encoder / decoder may generate CU threads in the coding quad tree syntax and register the CU threads in the CU thread queue.

The encoder / decoder codes CU threads registered in the CU thread queue (S1802). At this time, the encoder / decoder may code the CU threads in parallel (or simultaneously) in several bit streams. In addition, the encoder / decoder may generate PU threads in the CU syntax and register them in the PU thread queue (see FIG. 11 above), and generate transformation tree threads in the CU syntax and register them in the transformation tree thread queue (see FIG. 16).

The encoder / decoder codes the PU threads registered in the PU thread queue (S1803). At this point, the encoder / decoder may code the PU threads in parallel (or simultaneously) in several bit streams.

The encoder / decoder codes transform tree threads (S1804) and codes TU threads (S1805). Since the transform tree of step S1804 and the TU of step S1805 operate sequentially, the TU thread (or TU routine) may be performed while coding the transform tree thread in step S1804.

The encoder / decoder codes the residual coding (residual_coding) syntax (S1806).

The encoder / decoder codes the CG threads (S1807).

Here, CG_i (ie, CG_1, CG_2,..., CG_N) represents the second to seventh subroutines (or threads) described above with reference to FIG. 7.

Registering and executing all the threads for the lower layer (or functional block) of the CTU may increase the latency until the data is transferred to other functional blocks according to the implementation of the buffer.

Thus, in order to speed up coding start time for other functional blocks (i.e. reduce latency), the encoder / decoder allocates the generated threads to the bit stream in a round-robin manner and performs coding. Can be.

For example, assuming that threads are allocated to four bit streams in a round-robin manner, the encoder / decoder performs four threads in step S1802 and then performs four threads in step S1803. Motion compensation can be performed.

By applying such a method, latency until the start of encoding / decoding of a motion compensation or a transform and quantization module can be reduced.

Embodiments proposed in the present invention may be applied independently, or a plurality of embodiments may be applied in combination.

The decoder may receive a video signal composed of a plurality of bit streams (S1901).

The decoder may decode a symbol of a syntax element for each bit stream of the video signal (S1902).

As described above with reference to FIGS. 7, 9, and 10 to 12, the syntax element may be a function block unit representing a region in which one or more syntax elements are independently processed in the current block. Can be mapped alternately.

In addition, as described above with reference to FIGS. 7, 8, and 13 to 17, the decoder may perform synchronization between a plurality of bit streams in units of functional blocks or in syntax elements.

As described above, in order to perform the synchronization, the decoder acquires a lock for starting decoding the current syntax element in the current bit stream, and returns the obtained lock when decoding of the current syntax element is terminated. can do. The decoder may decode the current syntax element only when a lock is obtained in the corresponding bit stream.

In addition, the decoder may check lock state information indicating whether a lock on the current syntax element is obtained in a bit stream other than the current bit stream.

For example, the lock state information may be stored in a separate storage space such as a context store. To decode the current syntax element in the current bit stream, the decoder may attempt to acquire the lock by transmitting lock request information to the context store (or memory). Alternatively, the decoder may read state information about the lock from the context store to confirm whether the lock is acquired in another bit stream or ownership information of the lock. In this case, after decryption of the syntax element is completed, the lock release request together with the lock release information may be transmitted to the context store to allow updating of contexts related to the lock in another bit stream.

In addition, as described above, when regular coding that refers to a context is applied to a current syntax element, the decoder may perform synchronization between the plurality of bit streams, and a bypass mode may be applied to the current syntax element. When the bypass mode is applied, synchronization between the plurality of bit streams may not be performed.

In addition, as described above with reference to FIGS. 9 and 12, the decoder may switch the current bit stream after decoding the symbol of the syntax element in functional block units.

Also, as described above with reference to FIGS. 10, 13, and 18, the decoder generates a thread representing a unit of work that is independently processed for each functional block, and registers the thread in a thread queue that stores information of the thread. The plurality of threads stored in the thread queue may be decrypted in parallel.

The decoder may derive information of the syntax element using the decoded symbol (S1903).

The decoder may receive a binary-type bin decoded by the method described above with reference to FIGS. 4 and 6 and output a value of a syntax element.

In the present invention, whether to perform pipelining by synchronizing in units is implementation dependent. For example, in hardware implementations, fine synchronization on a per-syntax basis may be advantageous in terms of throughput. In addition, the software implementation may vary depending on the performance of synchronization primitives (eg, mutex locks, semaphores, etc.) provided by the OS. The better the performance, the more likely it is to synchronize in smaller units.

As described above, the embodiments described herein may be implemented and performed on a processor, microprocessor, controller, or chip. For example, the functional units illustrated in FIGS. 1 to 4 may be implemented and performed on a computer, a processor, a microprocessor, a controller, or a chip.

In addition, the decoder and encoder to which the present invention is applied include a multimedia broadcasting transmitting and receiving device, a mobile communication terminal, a home cinema video device, a digital cinema video device, a surveillance camera, a video chat device, a real time communication device such as video communication, a mobile streaming device, Storage media, camcorders, video on demand (VoD) service providing devices, internet streaming service providing devices, three-dimensional (3D) video devices, video telephony video devices, and medical video devices, and the like, for processing video and data signals Can be used for

In addition, the processing method to which the present invention is applied can be produced in the form of a program executed by a computer, and can be stored in a computer-readable recording medium. Multimedia data having a data structure according to the present invention can also be stored in a computer-readable recording medium. The computer readable recording medium includes all kinds of storage devices for storing computer readable data. The computer-readable recording medium may include, for example, a Blu-ray disc (BD), a universal serial bus (USB), a ROM, a RAM, a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device. Can be. The computer-readable recording medium also includes media embodied in the form of a carrier wave (eg, transmission over the Internet). In addition, the bit stream generated by the encoding method may be stored in a computer-readable recording medium or transmitted through a wired or wireless communication network.

As mentioned above, preferred embodiments of the present invention are disclosed for purposes of illustration, and those skilled in the art can improve and change various other embodiments within the spirit and technical scope of the present invention disclosed in the appended claims below. , Replacement or addition would be possible.

Claims

A method of performing entropy decoding on a video signal,

Receiving a video signal consisting of a plurality of bit streams;

Decoding a symbol of a syntax element for each bit stream of the video signal; And

Deriving information of the syntax element by using the decoded symbol,

The syntax elements are alternately mapped to the plurality of bit streams in a function block unit representing an area in which one or more syntax elements are independently processed in a current block.
The method of claim 1,

Decoding the symbol of the syntax element,

And performing the synchronization between the plurality of bit streams in units of the functional blocks.
The method of claim 1,

Decoding the symbol of the syntax element,

Performing synchronization between the plurality of bit streams in units of syntax elements.
The method of claim 3, wherein

The performing of the synchronization between the plurality of bit streams may include:

Obtaining a lock for starting decoding of the current syntax element in the current bit stream,

And decoding a symbol of the current syntax element only when the lock is obtained.
The method of claim 4, wherein

The performing of the synchronization between the plurality of bit streams may include:

Returning the obtained lock when decoding of the current syntax element is terminated.
The method of claim 4, wherein

The performing of the synchronization between the plurality of bit streams may include:

Identifying lock state information indicating whether a lock has been obtained for the current syntax element in a bit stream other than the current bit stream.
The method of claim 3, wherein

The performing of the synchronization between the plurality of bit streams may include:

The method for performing synchronization between the plurality of bit streams when regular coding that refers to a context is applied to a current syntax element.
The method of claim 1,

Decoding the symbol of the syntax element,

And converting a current bit stream after decoding a symbol of a syntax element on a functional block basis.
The method of claim 1,

Generating a thread representing a unit of work independently processed for each functional block unit and registering the thread in a thread queue that stores information of the thread; And

Decrypting the plurality of threads stored in the thread queue in parallel.
An apparatus for performing entropy decoding on a video signal,

A video signal receiver configured to receive a video signal composed of a plurality of bit streams;

A symbol decoder for decoding a symbol of a syntax element for each bit stream of the video signal; And

A syntax element decoding unit for decoding the information of the syntax element using the decoded symbol,

Wherein the syntax element is alternately mapped to the plurality of bit streams in a function block unit representing an area in which one or more syntax elements are independently processed in a current block.
The method of claim 10,

The symbol decoding unit,

And a synchronization unit configured to perform the synchronization between the plurality of bit streams in the functional block unit.
The method of claim 10,

The symbol decoding unit,

And a synchronization unit configured to perform the synchronization between the plurality of bit streams in units of syntax elements.
The method of claim 12,

The synchronization unit,

Acquires a lock for starting decoding of the current syntax element in the current bit stream,

And the symbol of the current syntax element is decoded only when the lock is obtained.
The method of claim 13,

The synchronization unit,

And returning the obtained lock when decoding of the current syntax element is terminated.
The method of claim 13,

The synchronization unit,

And verifying lock state information indicating whether a lock on the current syntax element is obtained in a bit stream other than the current bit stream.
The method of claim 12,

The synchronization unit,

The apparatus for performing synchronization between the plurality of bit streams when regular coding that refers to a context is applied to a current syntax element.
The method of claim 10,

The symbol decoding unit,

And converting a current bit stream after decoding a symbol of a syntax element in units of the functional blocks.
The method of claim 10,

A thread generation unit generating a thread representing a work unit independently processed for each functional block unit and registering a thread in a thread queue that stores information of the thread; And

And a thread decoder configured to decode a plurality of threads stored in the thread queue in parallel.