WO2016090659A1 - Array substrate, liquid crystal display panel and manufacturing method of array substrate - Google Patents

Array substrate, liquid crystal display panel and manufacturing method of array substrate Download PDF

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Publication number
WO2016090659A1
WO2016090659A1 PCT/CN2014/094076 CN2014094076W WO2016090659A1 WO 2016090659 A1 WO2016090659 A1 WO 2016090659A1 CN 2014094076 W CN2014094076 W CN 2014094076W WO 2016090659 A1 WO2016090659 A1 WO 2016090659A1
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metal
line
metal layer
array substrate
layer
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PCT/CN2014/094076
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French (fr)
Chinese (zh)
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李厚斌
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深圳市华星光电技术有限公司
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to an array substrate and a liquid crystal display panel having the same, and a method of manufacturing the array substrate.
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display
  • a liquid crystal display panel as an important component of a TFT-LCD comprising a color filter (CF), an array substrate, and a liquid crystal disposed therebetween, wherein the array substrate includes a gate line metal layer and a gate line metal layer overlaps the data line metal layer, the gate line metal layer is provided with parallel gate lines, and the data line metal layer is provided with parallel arranged data lines, and the gate lines overlap the data lines Set up to form a grid.
  • the array substrate includes a gate line metal layer and a gate line metal layer overlaps the data line metal layer, the gate line metal layer is provided with parallel gate lines, and the data line metal layer is provided with parallel arranged data lines, and the gate lines overlap the data lines Set up to form a grid.
  • FIG. 1 is a schematic view showing a state in which a gate line and a data line overlap on an array substrate in the prior art
  • FIG. 2 is a plan view showing a planar line and a data line of the array substrate in the prior art, and a gate. The overlapping position of the line and the data line.
  • the data line 2' is superposed on the gate line 1', and the portion where the data line 2' is attached to the side of the gate line 1' is referred to as a climbing area.
  • the climbing portion of the data line 2' was easily broken, so that a vertical disconnection was formed after the liquid crystal display was formed into a box.
  • the technical problem to be solved by the present invention is that in the manufacturing process of the array substrate of the TFT-LCD, the climbing area of the data line of the array substrate is easily disconnected, thereby forming a vertical disconnection after the liquid crystal display is formed into a box.
  • the present invention provides an array substrate, a liquid crystal display surface having the array substrate A board, and a method of manufacturing the array substrate.
  • An array substrate comprising:
  • a first metal layer comprising a first metal line
  • a second metal layer covering the insulating layer comprising a second metal line, wherein the second metal line is overlapped with the first metal line through an insulating layer to form a mesh;
  • the second metal wires respectively have reinforcing portions at four corners of a portion overlapping the first metal wires, and the reinforcing portions are respectively disposed to be in contact with the side surfaces and the upper surface of the first metal wires through an insulating layer.
  • the adjacent reinforcing portions are spaced apart by a set distance.
  • the width of the reinforcing portion is less than or equal to 5-15% of the width of the second metal wire.
  • the second metal wire is integrally formed with the reinforcing portion.
  • the reinforcing portion is formed by bending a column having a rectangular or semi-circular cross section.
  • the first metal layer is a gate line metal layer, the first metal line is a gate line; the second metal layer is a data line metal layer, and the second metal line is a data line.
  • the first metal layer is a data line metal layer, the first metal line is a data line; the second metal layer is a gate line metal layer, and the second metal line is a gate line.
  • a liquid crystal display panel comprising the above array substrate.
  • a method of manufacturing an array substrate comprising:
  • the forming a second metal layer on the insulating layer further sets an interval between adjacent reinforcing portions the distance.
  • the array substrate provided by the embodiment of the invention is applied, because the arrangement of the reinforcing portion enhances the strength of the second metal line at the climbing position, so that the climbing position of the second metal line is not easily broken, thereby reducing the incidence of vertical disconnection. Conducive to improving product yield.
  • FIG. 1 is a schematic view showing a state in which a gate line and a data line overlap on an array substrate in the prior art
  • FIG. 2 is a plan development view of a gate line and a data line of an array substrate in the prior art
  • FIG. 3 is a schematic view showing a state in which a gate line and a data line of an array substrate of the embodiment of the present invention overlap;
  • Figure 4 is a plan development view showing a data line of a reinforcing portion having a first structure in an embodiment of the present invention
  • Figure 5 is a plan development view showing a data line of a reinforcing portion having a second structure in the embodiment of the present invention.
  • FIG. 6 is a flow chart showing a method of manufacturing an array substrate according to an embodiment of the present invention.
  • an embodiment of the present invention provides an array substrate capable of avoiding disconnection of a data line at a hill climbing.
  • FIG. 3 it is a schematic diagram of a state in which a gate line and a data line of an array substrate of the embodiment of the present invention overlap, and the array substrate includes a second metal layer, an insulating layer, and a first metal layer disposed in order from top to bottom.
  • the first metal layer is disposed on the base substrate.
  • the insulating layer is not shown in all the drawings involved in the embodiment of the present invention.
  • the first metal layer includes at least one first metal wire 1, and in particular, the first metal wires 1 are disposed in parallel with each other.
  • the second metal layer comprises at least one second metal line 2, in particular the second metal lines 2 are arranged parallel to each other.
  • An insulating layer for preventing electrical connection between the two metal layers is disposed between the first metal layer and the second metal layer, that is, the second metal layer covers the insulating layer, and the insulating layer covers the first metal layer.
  • the first metal wire 1 is overlapped with the second metal wire 2 to form a mesh.
  • the first metal wire 1 is vertically overlapped with the second metal wire 2 through the insulating layer, that is, the first metal.
  • the angle between the line 1 and the second metal line 2 is 90°.
  • the second metal wire 2 overlaps with the first metal wire 1
  • Each of the four corners of the portion has a reinforcing portion 21, and the reinforcing portion 21 is respectively disposed to be in contact with the side surface and the upper surface of the first metal wire 1 through the insulating layer.
  • the reinforcing portion 21 is formed by bending a column having a rectangular cross section by 90°, and the reinforcing portion 21 can be regarded as being composed of an integrally formed horizontal portion 211 and a vertical portion 212, wherein the lower surface of the horizontal portion 211 passes
  • the insulating layer is disposed in contact with the upper surface of the first metal wire 1, and the vertical portion 212 is disposed to face the side surface of the first metal wire 1 through the insulating layer.
  • the horizontal portion 211 of the reinforcing portion 21 and the vertical portion 212 are preferably fixedly connected by the circular arc connecting portion 213, and the horizontal portion 211, the circular arc connecting portion 213 and the vertical portion 212 are preferably integrally formed.
  • the arc connecting portion 213 is disposed in contact with the edge of the first metal wire 1 in accordance with the structure of the edge of the first metal wire 1.
  • the reinforcing portion 21 enhances the strength of the second metal wire 2 at the climbing position, the climbing portion of the second metal wire 2 is not easily broken, thereby reducing the incidence of vertical disconnection. Conducive to improving product yield.
  • the adjacent reinforcing portions 21 are spaced apart from each other by a set distance.
  • the portion where the second metal wire 2 overlaps with the first metal wire 1 corresponds to the four reinforcing portions 21, wherein any two adjacent reinforcing portions 21 are spaced apart by a set distance, and the set distance can be determined according to Specific implementation environment to make specific settings.
  • the principle of one set is to ensure the strength of the second metal wire 2 at the climbing slope on the one hand, and to reduce the parasitic capacitance generated as much as possible on the basis of the strength.
  • the width D of the reinforcing portion 21 is less than or equal to 5-15% of the width of the second metal wire 2.
  • the width of the reinforcing portion 21 The degree D refers to the distance from the outermost edge of the reinforcing portion 21 to the side surface of the first wire 1 to which the reinforcing portion 21 is placed.
  • the second metal wire 2 in order to ensure the strength of the second metal wire 2 at the climbing position, is integrally formed with the reinforcing portion 21, thereby greatly reducing the second metal wire 2 and the reinforcing portion 21 There is a possibility of breakage at the junction between them.
  • FIG. 4 and FIG. 5 respectively show a planar development diagram of data lines of the reinforcing portion 21 having two structures in the embodiment of the present invention, and a data line overlapping the gate lines. position.
  • the reinforcing portion 21 is formed by bending a column having a rectangular cross section, and the reinforcing portion 21 formed by bending the column having a rectangular cross section downward is as shown in FIG. Show.
  • the reinforcing portion 21 is formed by bending a column having a semicircular cross section downward.
  • the shape of the above-mentioned cylinder can also be selected as other shapes.
  • the first metal layer of the array substrate may be a gate line metal layer or a data line metal layer. Therefore, in a preferred embodiment of the present invention, the first metal layer of the array substrate is a gate line metal layer.
  • the first metal layer has a first metal line 1 as a gate line;
  • the second metal layer of the array substrate is a data line metal layer, and the second metal layer has a second metal line 2 as a data line.
  • the first metal layer of the array substrate is a data line metal layer, the first metal layer has a first metal line 1 as a data line, and the second metal layer of the array substrate is a gate
  • the line metal layer, the second metal layer 2 has a second metal line 2 as a gate line.
  • an embodiment of the present invention further provides a liquid crystal display panel including the above array substrate.
  • the embodiment of the present invention further provides a method for manufacturing the above array substrate, as shown in FIG. 6 , which is a flowchart of the method, and specifically includes the following steps:
  • Step 101 Form a first metal layer on the base substrate, and cause the first metal layer to include the first metal line 1.
  • a yellow photoresist is coated on the silver film layer coated on the base substrate, and after exposure through the photomask, the pattern of the photomask is printed on the photoresist, and then the first metal having the first metal wire 1 is formed.
  • Floor a yellow photoresist is coated on the silver film layer coated on the base substrate, and after exposure through the photomask, the pattern of the photomask is printed on the photoresist, and then the first metal having the first metal wire 1 is formed.
  • Step 102 Form an insulating layer covering the first metal layer.
  • Step 103 forming a second metal layer on the insulating layer, and causing the second metal layer to include the second metal wire 2 and the reinforcing portion 21, wherein the second metal wire 2 is overlapped with the first metal wire 1 through the insulating layer to form a mesh
  • the second metal wires 2 respectively form the reinforcing portions 21 at the four corners of the portion overlapping the first metal wires 1, and the reinforcing portions 21 are respectively disposed to be in contact with the side faces and the upper surface of the first metal wires 1 through the insulating layers.
  • the second metal layer is similar to the processing process of the first metal layer, and the difference is that the mask pattern is different, that is, The pattern corresponding to the reinforcing portion 21 is also disposed on the photomask for processing the second metal layer, and then, after exposure and development, a second metal layer is formed which satisfies the following conditions: the second metal layer includes the second metal line 2 and The reinforcing portion 21, wherein the second metal wires 2 are overlapped with the first metal wires 1 through the insulating layer to form a mesh, and the second metal wires 2 respectively form the reinforcing portions 21 at the four corners of the portion overlapping the first metal wires 1. And the reinforcing portion 21 is respectively disposed to be in contact with the side surface and the upper surface of the first metal wire 1 through the insulating layer.
  • the arrangement of the reinforcing portion 21 enhances the strength of the second metal wire 2 at the climbing position, the climbing portion of the second metal wire 2 is not easily broken, and the vertical is lowered. The incidence of disconnection is conducive to improving product yield.
  • the pattern disposed on the photomask for processing the second metal layer needs to be adjusted to ensure the phase.
  • the adjacent reinforcing portions 21 are spaced apart from each other by a set distance, thereby reducing the generation of parasitic capacitance.

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  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
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Abstract

An array substrate, liquid crystal display panel and manufacturing method of the array substrate, the array substrate comprising a first metal layer having a first metal wire (1), an insulating layer sequentially covering the first metal layer, and a second metal layer having a second metal wire (2). The second metal wire (2) overlaps with the first metal wire (1) through the insulating layer to form a grid. The second metal wire (2) is provided with reinforcing parts (21) respectively at four corners of the part overlapping with the first metal wire (1), the reinforcing parts (21) being provided to be attached to lateral sides and an upper surface of the first metal wire (1) through the insulting layer, such that climbing parts of the second metal wire (2) do not become disconnected easily, reducing an occurrence rate of vertical line disconnection.

Description

阵列基板、液晶显示面板及该阵列基板的制造方法Array substrate, liquid crystal display panel, and method of manufacturing the same
本申请要求享有2014年12月9日提交的名称为“阵列基板、液晶显示面板及该阵列基板的制造方法”的中国专利申请CN201410746095.1的优先权，其全部内容通过引用并入本文中。The present application claims priority to Chinese Patent Application No. CN201410746095.1, filed on Dec. 9, 2014, which is hereby incorporated by reference.
技术领域Technical field
本发明涉及液晶显示技术领域，尤其涉及一种阵列基板及具有该阵列基板的液晶显示面板，还涉及一种制造该阵列基板的方法。The present invention relates to the field of liquid crystal display technologies, and in particular, to an array substrate and a liquid crystal display panel having the same, and a method of manufacturing the array substrate.
背景技术Background technique
由于TFT-LCD(Thin Film Transistor-Liquid Crystal Display，薄膜晶体管-液晶显示器)具有体积小、低功耗、无辐射等优点，近些年来得到迅猛发展。Since TFT-LCD (Thin Film Transistor-Liquid Crystal Display) has the advantages of small size, low power consumption, and no radiation, it has been rapidly developed in recent years.
作为TFT-LCD的重要部件的液晶显示面板，其包括彩色滤光片(Color filter，CF)、阵列基板、以及设置在两者之间的液晶，其中阵列基板包括栅极线金属层和与该栅极线金属层交叠设置的数据线金属层，栅极线金属层上设置有平行排列的栅极线，数据线金属层上设置有平行排列的数据线，栅极线与数据线交叠设置形成网格。A liquid crystal display panel as an important component of a TFT-LCD, comprising a color filter (CF), an array substrate, and a liquid crystal disposed therebetween, wherein the array substrate includes a gate line metal layer and a gate line metal layer overlaps the data line metal layer, the gate line metal layer is provided with parallel gate lines, and the data line metal layer is provided with parallel arranged data lines, and the gate lines overlap the data lines Set up to form a grid.
图1示出了现有技术中阵列基板上栅极线与数据线交叠状态的示意图，图2示出了现有技术中阵列基板的栅极线与数据线的平面展开图、以及栅极线与数据线的交叠位置。如图1和图2所示，数据线2’叠放在栅极线1’上，数据线2’与栅极线1’的侧面贴合的部分称为爬坡区。在TFT-LCD的阵列基板的制造过程中，发现数据线2’的爬坡处易断开，以至于在液晶显示器成盒后形成垂直断线。1 is a schematic view showing a state in which a gate line and a data line overlap on an array substrate in the prior art, and FIG. 2 is a plan view showing a planar line and a data line of the array substrate in the prior art, and a gate. The overlapping position of the line and the data line. As shown in Figs. 1 and 2, the data line 2' is superposed on the gate line 1', and the portion where the data line 2' is attached to the side of the gate line 1' is referred to as a climbing area. In the manufacturing process of the array substrate of the TFT-LCD, it was found that the climbing portion of the data line 2' was easily broken, so that a vertical disconnection was formed after the liquid crystal display was formed into a box.
发明内容Summary of the invention
本发明所要解决的技术问题是：在TFT-LCD的阵列基板的制造过程中，阵列基板的数据线的爬坡区易断开，从而在液晶显示器成盒后形成垂直断线。The technical problem to be solved by the present invention is that in the manufacturing process of the array substrate of the TFT-LCD, the climbing area of the data line of the array substrate is easily disconnected, thereby forming a vertical disconnection after the liquid crystal display is formed into a box.
为了解决上述技术问题，本发明提供了一种阵列基板、具有该阵列基板的液晶显示面 板、以及制造该阵列基板的方法。In order to solve the above technical problem, the present invention provides an array substrate, a liquid crystal display surface having the array substrate A board, and a method of manufacturing the array substrate.
本发明的技术方案为：The technical solution of the present invention is:
一种阵列基板，包括：An array substrate comprising:
第一金属层，其包括第一金属线；a first metal layer comprising a first metal line;
覆盖在所述第一金属层上的绝缘层；以及An insulating layer overlying the first metal layer;
覆盖在所述绝缘层上的第二金属层，其包括第二金属线，所述第二金属线通过绝缘层与所述第一金属线交叠设置形成网格；a second metal layer covering the insulating layer, comprising a second metal line, wherein the second metal line is overlapped with the first metal line through an insulating layer to form a mesh;
所述第二金属线在与第一金属线交叠的部位的四角处分别具有加强部，所述加强部通过绝缘层分别与所述第一金属线的侧面和上表面贴合设置。The second metal wires respectively have reinforcing portions at four corners of a portion overlapping the first metal wires, and the reinforcing portions are respectively disposed to be in contact with the side surfaces and the upper surface of the first metal wires through an insulating layer.
优选的是，相邻的加强部之间间隔设定的距离。Preferably, the adjacent reinforcing portions are spaced apart by a set distance.
优选的是，所述加强部的宽度小于或者等于所述第二金属线的宽度的5-15％。Preferably, the width of the reinforcing portion is less than or equal to 5-15% of the width of the second metal wire.
优选的是，所述第二金属线与所述加强部一体成型。Preferably, the second metal wire is integrally formed with the reinforcing portion.
优选的是，所述加强部由截面呈矩形或者半圆形的柱体弯折而成。Preferably, the reinforcing portion is formed by bending a column having a rectangular or semi-circular cross section.
优选的是，所述第一金属层为栅极线金属层，所述第一金属线为栅极线；所述第二金属层为数据线金属层，所述第二金属线为数据线。Preferably, the first metal layer is a gate line metal layer, the first metal line is a gate line; the second metal layer is a data line metal layer, and the second metal line is a data line.
优选的是，所述第一金属层为数据线金属层，所述第一金属线为数据线；所述第二金属层为栅极线金属层，所述第二金属线为栅极线。Preferably, the first metal layer is a data line metal layer, the first metal line is a data line; the second metal layer is a gate line metal layer, and the second metal line is a gate line.
一种液晶显示面板，包括上述阵列基板。A liquid crystal display panel comprising the above array substrate.
一种阵列基板的制造方法，包括：A method of manufacturing an array substrate, comprising:
在衬底基板上形成第一金属层，并使得所述第一金属层包括第一金属线；Forming a first metal layer on the base substrate, and causing the first metal layer to include a first metal line;
形成覆盖在所述第一金属层上的绝缘层；Forming an insulating layer overlying the first metal layer;
在所述绝缘层上形成第二金属层，并使得所述第二金属层包括第二金属线和加强部，其中所述第二金属线通过绝缘层与所述第一金属线交叠设置形成网格，所述第二金属线在与第一金属线交叠的部位的四角处分别形成所述加强部，并且所述加强部通过绝缘层分别与所述第一金属线的侧面和上表面贴合设置。Forming a second metal layer on the insulating layer, and causing the second metal layer to include a second metal line and a reinforcement, wherein the second metal line is formed by overlapping the first metal line through the insulating layer a mesh, the second metal wires respectively forming the reinforcing portions at four corners of a portion overlapping the first metal lines, and the reinforcing portions respectively pass through the insulating layer and the side and upper surfaces of the first metal wires Fit settings.
优选的是，所述在所述绝缘层上形成第二金属层，还使得相邻的加强部之间间隔设定 的距离。Preferably, the forming a second metal layer on the insulating layer further sets an interval between adjacent reinforcing portions the distance.
与现有技术相比，上述方案中的一个或多个实施例可以具有如下优点或有益效果：One or more of the above aspects may have the following advantages or benefits compared to the prior art:
应用本发明实施例提供的阵列基板，因为加强部的设置增强了第二金属线在爬坡处的强度，所以使得第二金属线的爬坡处不易断开，降低了垂直断线发生率，有利于提升产品良率。The array substrate provided by the embodiment of the invention is applied, because the arrangement of the reinforcing portion enhances the strength of the second metal line at the climbing position, so that the climbing position of the second metal line is not easily broken, thereby reducing the incidence of vertical disconnection. Conducive to improving product yield.
本发明的其它特征和优点将在随后的说明书中阐述，并且部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。Other features and advantages of the present invention will be set forth in the description in the description which follows. The objectives and other advantages of the invention may be realized and obtained by means of the structure particularly pointed in the appended claims.
附图说明DRAWINGS
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：The drawings are intended to provide a further understanding of the invention, and are intended to be a part of the description of the invention. In the drawing:
图1示出了现有技术中阵列基板上栅极线与数据线交叠状态的示意图；1 is a schematic view showing a state in which a gate line and a data line overlap on an array substrate in the prior art;
图2示出了现有技术中阵列基板的栅极线与数据线的平面展开图；2 is a plan development view of a gate line and a data line of an array substrate in the prior art;
图3示出了本发明实施例阵列基板的栅极线与数据线交叠状态的示意图；3 is a schematic view showing a state in which a gate line and a data line of an array substrate of the embodiment of the present invention overlap;
图4示出了本发明实施例中具有第一种结构的加强部的数据线的平面展开图；Figure 4 is a plan development view showing a data line of a reinforcing portion having a first structure in an embodiment of the present invention;
图5示出了本发明实施例中具有第二种结构的加强部的数据线的平面展开图；以及Figure 5 is a plan development view showing a data line of a reinforcing portion having a second structure in the embodiment of the present invention;
图6示出了本发明实施例制造阵列基板的方法的流程图。FIG. 6 is a flow chart showing a method of manufacturing an array substrate according to an embodiment of the present invention.
具体实施方式detailed description
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, in which the present invention can be applied to the technical problems, and the implementation of the technical effects can be fully understood and implemented. It should be noted that the various embodiments of the present invention and the various features of the various embodiments may be combined with each other, and the technical solutions formed are all within the scope of the present invention.
本发明所要解决的技术问题是：在TFT-LCD的阵列基板的制造过程中，阵列基板的数据线的爬坡区易断开，从而在液晶显示器成盒后形成垂直断线。为解决上述技术问题，本发明实施例提供了一种能够避免数据线在爬坡处断开的阵列基板。 The technical problem to be solved by the present invention is that in the manufacturing process of the array substrate of the TFT-LCD, the climbing area of the data line of the array substrate is easily disconnected, thereby forming a vertical disconnection after the liquid crystal display is formed into a box. In order to solve the above technical problem, an embodiment of the present invention provides an array substrate capable of avoiding disconnection of a data line at a hill climbing.
如图3所示，是本发明实施例的阵列基板的栅极线与数据线交叠状态的示意图，阵列基板包括从上至下依次设置的第二金属层、绝缘层和第一金属层，第一金属层设置在衬底基板上。值得注意的是，为了突出展现第一金属层和第二金属层的交叠结构，本发明实施例中涉及的所有附图中均未示出绝缘层。As shown in FIG. 3, it is a schematic diagram of a state in which a gate line and a data line of an array substrate of the embodiment of the present invention overlap, and the array substrate includes a second metal layer, an insulating layer, and a first metal layer disposed in order from top to bottom. The first metal layer is disposed on the base substrate. It is to be noted that, in order to highlight the overlapping structure of the first metal layer and the second metal layer, the insulating layer is not shown in all the drawings involved in the embodiment of the present invention.
具体地，第一金属层包括至少一条第一金属线1，特别地，第一金属线1彼此之间平行设置。第二金属层包括至少一条第二金属线2，特别地，第二金属线2彼此之间平行设置。在第一金属层和第二金属层之间设置用于防止这两个金属层电连接的绝缘层，即第二金属层覆盖在绝缘层上，绝缘层覆盖在第一金属层上。第一金属线1通过绝缘层与第二金属线2交叠设置形成网格，在本实施例中，第一金属线1通过绝缘层与第二金属线2垂直交叠设置，即第一金属线1与第二金属线2的夹角为90°。Specifically, the first metal layer includes at least one first metal wire 1, and in particular, the first metal wires 1 are disposed in parallel with each other. The second metal layer comprises at least one second metal line 2, in particular the second metal lines 2 are arranged parallel to each other. An insulating layer for preventing electrical connection between the two metal layers is disposed between the first metal layer and the second metal layer, that is, the second metal layer covers the insulating layer, and the insulating layer covers the first metal layer. The first metal wire 1 is overlapped with the second metal wire 2 to form a mesh. In the embodiment, the first metal wire 1 is vertically overlapped with the second metal wire 2 through the insulating layer, that is, the first metal. The angle between the line 1 and the second metal line 2 is 90°.
为避免位于上层的第二金属线的爬坡处易断开、以及由此导致的在液晶显示器成盒后形成垂直断线的现象，第二金属线2在与第一金属线1交叠的部位的四角处分别具有加强部21，加强部21通过绝缘层分别与第一金属线1的侧面和上表面贴合设置。In order to avoid the phenomenon that the climbing of the second metal wire located in the upper layer is easy to break, and the resulting vertical disconnection after the liquid crystal display is formed into a box, the second metal wire 2 overlaps with the first metal wire 1 Each of the four corners of the portion has a reinforcing portion 21, and the reinforcing portion 21 is respectively disposed to be in contact with the side surface and the upper surface of the first metal wire 1 through the insulating layer.
参照图3，该图示出了分别设置在第二金属线2和第一金属线1交叠的部位的四角处的四个加强部21。该加强部21是由截面呈矩形的柱体弯折90°而形成的，可以将加强部21看作是由一体成型的水平部211和竖直部212组成，其中水平部211的下表面通过绝缘层与第一金属线1的上表面贴合设置，竖直部212朝向第一金属线1的侧面通过绝缘层与第一金属线1的侧面贴合设置。特别地，加强部21的水平部211与竖直部212优选地通过圆弧连接部213固定连接，水平部211、圆弧连接部213与竖直部212三者优选地一体成型。根据第一金属线1边沿的结构，圆弧连接部213与第一金属线1的边沿贴合设置。Referring to Fig. 3, there are shown four reinforcing portions 21 respectively provided at the four corners of the portion where the second metal wire 2 and the first metal wire 1 overlap. The reinforcing portion 21 is formed by bending a column having a rectangular cross section by 90°, and the reinforcing portion 21 can be regarded as being composed of an integrally formed horizontal portion 211 and a vertical portion 212, wherein the lower surface of the horizontal portion 211 passes The insulating layer is disposed in contact with the upper surface of the first metal wire 1, and the vertical portion 212 is disposed to face the side surface of the first metal wire 1 through the insulating layer. In particular, the horizontal portion 211 of the reinforcing portion 21 and the vertical portion 212 are preferably fixedly connected by the circular arc connecting portion 213, and the horizontal portion 211, the circular arc connecting portion 213 and the vertical portion 212 are preferably integrally formed. The arc connecting portion 213 is disposed in contact with the edge of the first metal wire 1 in accordance with the structure of the edge of the first metal wire 1.
在本实施例中，因为加强部21的设置增强了第二金属线2在爬坡处的强度，所以使得第二金属线2的爬坡处不易断开，降低了垂直断线发生率，有利于提升产品良率。In the present embodiment, since the arrangement of the reinforcing portion 21 enhances the strength of the second metal wire 2 at the climbing position, the climbing portion of the second metal wire 2 is not easily broken, thereby reducing the incidence of vertical disconnection. Conducive to improving product yield.
在本发明一优选的实施例中，为了减少由于设置加强部21而增加的寄生电容，相邻的加强部21之间彼此间隔设定的距离。这里，第二金属线2与第一金属线1的交叠的部位对应四个加强部21，其中任意两个相邻的加强部21之间间隔设定的距离，此设定的距离可根据具体实施环境进行具体设置。一股设置的原则是，一方面要保证第二金属线2在爬坡处的强度，另一方面要在保证强度的基础上尽可能地降低产生的寄生电容。In a preferred embodiment of the present invention, in order to reduce the parasitic capacitance increased by the provision of the reinforcing portion 21, the adjacent reinforcing portions 21 are spaced apart from each other by a set distance. Here, the portion where the second metal wire 2 overlaps with the first metal wire 1 corresponds to the four reinforcing portions 21, wherein any two adjacent reinforcing portions 21 are spaced apart by a set distance, and the set distance can be determined according to Specific implementation environment to make specific settings. The principle of one set is to ensure the strength of the second metal wire 2 at the climbing slope on the one hand, and to reduce the parasitic capacitance generated as much as possible on the basis of the strength.
在本发明一优选的实施例中，同样为了减少由于设置加强部21而增加的寄生电容，加强部21的宽度D小于或者等于第二金属线2的宽度的5-15％。这里，加强部21的宽 度D指的是加强部21的最外侧边沿到第一金属线1的与该加强部21贴合设置的侧面的距离。In a preferred embodiment of the present invention, also in order to reduce the parasitic capacitance increased by the provision of the reinforcing portion 21, the width D of the reinforcing portion 21 is less than or equal to 5-15% of the width of the second metal wire 2. Here, the width of the reinforcing portion 21 The degree D refers to the distance from the outermost edge of the reinforcing portion 21 to the side surface of the first wire 1 to which the reinforcing portion 21 is placed.
在本发明一优选的实施例中，为保证第二金属线2在爬坡处的强度，第二金属线2与加强部21一体成型，从而大大减小了第二金属线2与加强部21之间的连接处产生断裂的可能性。In a preferred embodiment of the present invention, in order to ensure the strength of the second metal wire 2 at the climbing position, the second metal wire 2 is integrally formed with the reinforcing portion 21, thereby greatly reducing the second metal wire 2 and the reinforcing portion 21 There is a possibility of breakage at the junction between them.
在本发明一优选的实施例中，图4和图5分别示出了本发明实施例中具有两种结构的加强部21的数据线的平面展开示意图、以及数据线与栅极线交叠的位置。具体地，对于第一种结构，参照图4，加强部21由截面呈矩形的柱体向下弯折而成，截面呈矩形的柱体向下弯折而形成的加强部21如图3所示。对于第二种结构，参照图5，加强部21由截面呈半圆形的柱体向下弯折而成。这里，上述柱体的形状还可以选择为其它形状。In a preferred embodiment of the present invention, FIG. 4 and FIG. 5 respectively show a planar development diagram of data lines of the reinforcing portion 21 having two structures in the embodiment of the present invention, and a data line overlapping the gate lines. position. Specifically, with respect to the first structure, referring to FIG. 4, the reinforcing portion 21 is formed by bending a column having a rectangular cross section, and the reinforcing portion 21 formed by bending the column having a rectangular cross section downward is as shown in FIG. Show. With respect to the second structure, referring to Fig. 5, the reinforcing portion 21 is formed by bending a column having a semicircular cross section downward. Here, the shape of the above-mentioned cylinder can also be selected as other shapes.
进一步地，阵列基板的第一金属层可以是栅极线金属层也可以是数据线金属层，因此在本发明一优选的实施例中，阵列基板的第一金属层为栅极线金属层，该第一金属层具有的第一金属线1为栅极线；阵列基板的第二金属层为数据线金属层，第二金属层具有的第二金属线2为数据线。在本发明另一优选的实施例中，阵列基板的第一金属层为数据线金属层，该第一金属层具有的第一金属线1为数据线；阵列基板的第二金属层为栅极线金属层，第二金属层具有的第二金属线2为栅极线。Further, the first metal layer of the array substrate may be a gate line metal layer or a data line metal layer. Therefore, in a preferred embodiment of the present invention, the first metal layer of the array substrate is a gate line metal layer. The first metal layer has a first metal line 1 as a gate line; the second metal layer of the array substrate is a data line metal layer, and the second metal layer has a second metal line 2 as a data line. In another preferred embodiment of the present invention, the first metal layer of the array substrate is a data line metal layer, the first metal layer has a first metal line 1 as a data line, and the second metal layer of the array substrate is a gate The line metal layer, the second metal layer 2 has a second metal line 2 as a gate line.
相应地，本发明实施例还提供了一种包括上述阵列基板的液晶显示面板。Correspondingly, an embodiment of the present invention further provides a liquid crystal display panel including the above array substrate.
相应地，本发明实施例还提供了一种制造上述阵列基板的方法，如图6所示，是该方法的流程图，具体包括以下步骤：Correspondingly, the embodiment of the present invention further provides a method for manufacturing the above array substrate, as shown in FIG. 6 , which is a flowchart of the method, and specifically includes the following steps:
步骤101：在衬底基板上形成第一金属层，并使得第一金属层包括第一金属线1。Step 101: Form a first metal layer on the base substrate, and cause the first metal layer to include the first metal line 1.
具体地，在涂覆在衬底基板上的银色膜层上覆盖黄色光阻，通过光罩曝光后，将光罩的图案印在光阻上，然后形成具有第一金属线1的第一金属层。Specifically, a yellow photoresist is coated on the silver film layer coated on the base substrate, and after exposure through the photomask, the pattern of the photomask is printed on the photoresist, and then the first metal having the first metal wire 1 is formed. Floor.
步骤102：形成覆盖在第一金属层上的绝缘层。Step 102: Form an insulating layer covering the first metal layer.
步骤103：在绝缘层上形成第二金属层，并使得第二金属层包括第二金属线2和加强部21，其中第二金属线2通过绝缘层与第一金属线1交叠设置形成网格，第二金属线2在与第一金属线1交叠的部位的四角处分别形成加强部21，并且加强部21通过绝缘层分别与第一金属线1的侧面和上表面贴合设置。Step 103: forming a second metal layer on the insulating layer, and causing the second metal layer to include the second metal wire 2 and the reinforcing portion 21, wherein the second metal wire 2 is overlapped with the first metal wire 1 through the insulating layer to form a mesh The second metal wires 2 respectively form the reinforcing portions 21 at the four corners of the portion overlapping the first metal wires 1, and the reinforcing portions 21 are respectively disposed to be in contact with the side faces and the upper surface of the first metal wires 1 through the insulating layers.
具体地，第二金属层与第一金属层的加工工艺类似，不同的是光罩图案的不同，即将 加强部21对应的图案也设置在用于加工第二金属层的光罩上，于是经过曝光显影后，则会形成满足下列条件的第二金属层：第二金属层包括第二金属线2和加强部21，其中第二金属线2通过绝缘层与第一金属线1交叠设置形成网格，第二金属线2在与第一金属线1交叠的部位的四角处分别形成加强部21，并且加强部21通过绝缘层分别与第一金属线1的侧面和上表面贴合设置。Specifically, the second metal layer is similar to the processing process of the first metal layer, and the difference is that the mask pattern is different, that is, The pattern corresponding to the reinforcing portion 21 is also disposed on the photomask for processing the second metal layer, and then, after exposure and development, a second metal layer is formed which satisfies the following conditions: the second metal layer includes the second metal line 2 and The reinforcing portion 21, wherein the second metal wires 2 are overlapped with the first metal wires 1 through the insulating layer to form a mesh, and the second metal wires 2 respectively form the reinforcing portions 21 at the four corners of the portion overlapping the first metal wires 1. And the reinforcing portion 21 is respectively disposed to be in contact with the side surface and the upper surface of the first metal wire 1 through the insulating layer.
通过本实施例的制造方法得到的阵列基板，因为加强部21的设置增强了第二金属线2在爬坡处的强度，所以使得第二金属线2的爬坡处不易断开，降低了垂直断线发生率，有利于提升产品良率。With the array substrate obtained by the manufacturing method of the present embodiment, since the arrangement of the reinforcing portion 21 enhances the strength of the second metal wire 2 at the climbing position, the climbing portion of the second metal wire 2 is not easily broken, and the vertical is lowered. The incidence of disconnection is conducive to improving product yield.
特别地，在本发明一优选的实施例中，在绝缘层上形成第二金属层的过程中，还需对设置在用于加工第二金属层的光罩上的图案进行调整，以保证相邻的加强部21之间彼此间隔设定的距离，从而降低了寄生电容的产生。In a preferred embodiment of the present invention, in the process of forming the second metal layer on the insulating layer, the pattern disposed on the photomask for processing the second metal layer needs to be adjusted to ensure the phase. The adjacent reinforcing portions 21 are spaced apart from each other by a set distance, thereby reducing the generation of parasitic capacitance.
虽然本发明所公开的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所公开的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的保护范围，仍须以所附的权利要求书所界定的范围为准。 While the embodiments of the present invention have been described above, the described embodiments are merely illustrative of the embodiments of the invention and are not intended to limit the invention. Any modification and variation of the form and details of the embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, but the scope of protection of the present invention remains It is subject to the scope defined by the appended claims.

Claims (20)

  1. 一种阵列基板，其中，包括：An array substrate, comprising:
    第一金属层，其包括第一金属线；a first metal layer comprising a first metal line;
    覆盖在所述第一金属层上的绝缘层；以及An insulating layer overlying the first metal layer;
    覆盖在所述绝缘层上的第二金属层，其包括第二金属线，所述第二金属线通过绝缘层与所述第一金属线交叠设置形成网格；a second metal layer covering the insulating layer, comprising a second metal line, wherein the second metal line is overlapped with the first metal line through an insulating layer to form a mesh;
    所述第二金属线在与第一金属线交叠的部位的四角处分别具有加强部，所述加强部通过绝缘层分别与所述第一金属线的侧面和上表面贴合设置。The second metal wires respectively have reinforcing portions at four corners of a portion overlapping the first metal wires, and the reinforcing portions are respectively disposed to be in contact with the side surfaces and the upper surface of the first metal wires through an insulating layer.
  2. 根据权利要求1所述的阵列基板，其中，所述第二金属线与所述加强部一体成型。The array substrate according to claim 1, wherein the second metal wire is integrally formed with the reinforcing portion.
  3. 根据权利要求1所述的阵列基板，其中，所述加强部由截面呈矩形或者半圆形的柱体弯折而成。The array substrate according to claim 1, wherein the reinforcing portion is formed by bending a column having a rectangular or semi-circular cross section.
  4. 根据权利要求1所述的阵列基板，其中，所述第一金属层为栅极线金属层，所述第一金属线为栅极线；所述第二金属层为数据线金属层，所述第二金属线为数据线。The array substrate according to claim 1, wherein the first metal layer is a gate line metal layer, the first metal line is a gate line, and the second metal layer is a data line metal layer, The second metal line is a data line.
  5. 根据权利要求1所述的阵列基板，其中，所述第一金属层为数据线金属层，所述第一金属线为数据线；所述第二金属层为栅极线金属层，所述第二金属线为栅极线。The array substrate according to claim 1, wherein the first metal layer is a data line metal layer, the first metal line is a data line, and the second metal layer is a gate line metal layer, the first The two metal lines are gate lines.
  6. 根据权利要求1所述的阵列基板，其中，相邻的加强部之间间隔设定的距离。The array substrate according to claim 1, wherein adjacent reinforcing portions are spaced apart by a set distance.
  7. 根据权利要求6所述的阵列基板，其中，所述第二金属线与所述加强部一体成型。The array substrate according to claim 6, wherein the second metal wire is integrally formed with the reinforcing portion.
  8. 根据权利要求6所述的阵列基板，其中，所述加强部由截面呈矩形或者半圆形的柱体弯折而成。 The array substrate according to claim 6, wherein the reinforcing portion is formed by bending a column having a rectangular or semi-circular cross section.
  9. 根据权利要求6所述的阵列基板，其中，所述第一金属层为栅极线金属层，所述第一金属线为栅极线；所述第二金属层为数据线金属层，所述第二金属线为数据线。The array substrate according to claim 6, wherein the first metal layer is a gate line metal layer, the first metal line is a gate line, and the second metal layer is a data line metal layer, The second metal line is a data line.
  10. 根据权利要求6所述的阵列基板，其中，所述第一金属层为数据线金属层，所述第一金属线为数据线；所述第二金属层为栅极线金属层，所述第二金属线为栅极线。The array substrate according to claim 6, wherein the first metal layer is a data line metal layer, the first metal line is a data line, and the second metal layer is a gate line metal layer, the The two metal lines are gate lines.
  11. 根据权利要求1所述的阵列基板，其中，所述加强部的宽度小于或者等于所述第二金属线的宽度的5-15％。The array substrate according to claim 1, wherein a width of the reinforcing portion is less than or equal to 5-15% of a width of the second metal wire.
  12. 根据权利要求11所述的阵列基板，其中，所述第二金属线与所述加强部一体成型。The array substrate according to claim 11, wherein the second metal wire is integrally formed with the reinforcing portion.
  13. 根据权利要求11所述的阵列基板，其中，所述加强部由截面呈矩形或者半圆形的柱体弯折而成。The array substrate according to claim 11, wherein the reinforcing portion is formed by bending a column having a rectangular or semi-circular cross section.
  14. 根据权利要求11所述的阵列基板，其中，所述第一金属层为栅极线金属层，所述第一金属线为栅极线；所述第二金属层为数据线金属层，所述第二金属线为数据线。The array substrate according to claim 11, wherein the first metal layer is a gate line metal layer, the first metal line is a gate line, and the second metal layer is a data line metal layer, The second metal line is a data line.
  15. 根据权利要求11所述的阵列基板，其中，所述第一金属层为数据线金属层，所述第一金属线为数据线；所述第二金属层为栅极线金属层，所述第二金属线为栅极线。The array substrate according to claim 11, wherein the first metal layer is a data line metal layer, the first metal line is a data line, and the second metal layer is a gate line metal layer, the The two metal lines are gate lines.
  16. 一种液晶显示面板，其中，包括阵列基板，所述阵列基板包括：A liquid crystal display panel, comprising an array substrate, the array substrate comprising:
    第一金属层，其包括第一金属线；a first metal layer comprising a first metal line;
    覆盖在所述第一金属层上的绝缘层；以及An insulating layer overlying the first metal layer;
    覆盖在所述绝缘层上的第二金属层，其包括第二金属线，所述第二金属线通过绝缘层与所述第一金属线交叠设置形成网格； a second metal layer covering the insulating layer, comprising a second metal line, wherein the second metal line is overlapped with the first metal line through an insulating layer to form a mesh;
    所述第二金属线在与第一金属线交叠的部位的四角处分别具有加强部，所述加强部通过绝缘层分别与所述第一金属线的侧面和上表面贴合设置。The second metal wires respectively have reinforcing portions at four corners of a portion overlapping the first metal wires, and the reinforcing portions are respectively disposed to be in contact with the side surfaces and the upper surface of the first metal wires through an insulating layer.
  17. 根据权利要求16所述的液晶显示面板，其中，相邻的加强部之间间隔设定的距离。The liquid crystal display panel according to claim 16, wherein the adjacent reinforcing portions are spaced apart by a set distance.
  18. 根据权利要求16所述的液晶显示面板，其中，所述加强部的宽度小于或者等于所述第二金属线的宽度的5-15％。The liquid crystal display panel according to claim 16, wherein a width of the reinforcing portion is less than or equal to 5-15% of a width of the second metal line.
  19. 一种阵列基板的制造方法，其中，包括：A method of manufacturing an array substrate, comprising:
    在衬底基板上形成第一金属层，并使得所述第一金属层包括第一金属线；Forming a first metal layer on the base substrate, and causing the first metal layer to include a first metal line;
    形成覆盖在所述第一金属层上的绝缘层；Forming an insulating layer overlying the first metal layer;
    在所述绝缘层上形成第二金属层，并使得所述第二金属层包括第二金属线和加强部，其中所述第二金属线通过绝缘层与所述第一金属线交叠设置形成网格，所述第二金属线在与第一金属线交叠的部位的四角处分别形成所述加强部，并且所述加强部通过绝缘层分别与所述第一金属线的侧面和上表面贴合设置。Forming a second metal layer on the insulating layer, and causing the second metal layer to include a second metal line and a reinforcement, wherein the second metal line is formed by overlapping the first metal line through the insulating layer a mesh, the second metal wires respectively forming the reinforcing portions at four corners of a portion overlapping the first metal lines, and the reinforcing portions respectively pass through the insulating layer and the side and upper surfaces of the first metal wires Fit settings.
  20. 根据权利要求19所述的方法，其中，所述在所述绝缘层上形成第二金属层，还使得相邻的加强部之间间隔设定的距离。 The method according to claim 19, wherein said forming a second metal layer on said insulating layer further causes adjacent reinforcing portions to be spaced apart by a set distance.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109634007A (en) * 2018-12-11 2019-04-16 惠科股份有限公司 Overline structure and manufacturing method thereof
CN114280863A (en) * 2021-12-17 2022-04-05 滁州惠科光电科技有限公司 Array substrate and display panel
US11469258B2 (en) 2017-05-31 2022-10-11 Beijing Boe Technology Development Co., Ltd. Display panel and display device
CN115356879A (en) * 2022-10-21 2022-11-18 广州华星光电半导体显示技术有限公司 Display panel

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107230661B (en) * 2017-05-31 2020-06-19 京东方科技集团股份有限公司 Array substrate, preparation method thereof and display device
CN206711895U (en) * 2017-06-02 2017-12-05 京东方科技集团股份有限公司 A kind of array base palte, electroluminescence display panel and display device
CN108761933B (en) * 2018-05-28 2021-07-27 武汉华星光电技术有限公司 Array substrate, liquid crystal display and manufacturing method of array substrate
CN109037246A (en) * 2018-08-06 2018-12-18 京东方科技集团股份有限公司 array substrate, display panel and display device
CN109545799B (en) 2018-11-09 2021-01-08 惠科股份有限公司 Display panel, manufacturing method and display device
CN113451330B (en) * 2020-03-25 2024-08-20 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof and display device
CN112768478B (en) * 2021-01-19 2023-04-07 Tcl华星光电技术有限公司 Display panel and manufacturing method thereof
CN114815426A (en) * 2022-05-10 2022-07-29 广州华星光电半导体显示技术有限公司 Array substrate and display panel
CN115274686A (en) * 2022-05-19 2022-11-01 滁州惠科光电科技有限公司 Array substrate, display panel and manufacturing method of array substrate

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5285301A (en) * 1991-03-15 1994-02-08 Hitachi, Ltd. Liquid crystal display device having peripheral dummy lines
US5684547A (en) * 1994-08-05 1997-11-04 Samsung Electronics Co., Ltd. Liquid crystal display panel and method for fabricating the same
CN1542508A (en) * 2002-12-31 2004-11-03 Lg.菲利浦Lcd株式会社 Liquid crystal display device and method for manufacturing the same
CN101436601A (en) * 2008-12-18 2009-05-20 上海广电光电子有限公司 Array substrate of thin-film transistor
CN201845156U (en) * 2010-10-15 2011-05-25 北京京东方光电科技有限公司 Array substrate and liquid crystal display panel
CN102360146A (en) * 2011-10-14 2012-02-22 深圳市华星光电技术有限公司 TFT-LCD (thin film transistor-liquid crystal display) array base plate and manufacturing method thereof

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60236266A (en) * 1984-05-10 1985-11-25 Matsushita Electric Ind Co Ltd Semiconductor device
US5287206A (en) * 1990-11-30 1994-02-15 Sharp Kabushiki Kaisha Active matrix display device
JPH04304429A (en) * 1991-04-02 1992-10-27 Sharp Corp Active matrix substrate
KR101209809B1 (en) * 2006-03-08 2012-12-07 삼성디스플레이 주식회사 Display and manufacturing method thereof
KR101234138B1 (en) * 2006-05-18 2013-02-18 엘지디스플레이 주식회사 A substrate for LCD and method for fabricating of the same
CN201754211U (en) * 2010-08-13 2011-03-02 福建华映显示科技有限公司 Repairing structure for display apparatus
WO2012070498A1 (en) * 2010-11-25 2012-05-31 シャープ株式会社 Display device and television receiver
WO2012133157A1 (en) * 2011-03-30 2012-10-04 シャープ株式会社 Array substrate for liquid crystal panel and liquid crystal panel

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5285301A (en) * 1991-03-15 1994-02-08 Hitachi, Ltd. Liquid crystal display device having peripheral dummy lines
US5684547A (en) * 1994-08-05 1997-11-04 Samsung Electronics Co., Ltd. Liquid crystal display panel and method for fabricating the same
CN1542508A (en) * 2002-12-31 2004-11-03 Lg.菲利浦Lcd株式会社 Liquid crystal display device and method for manufacturing the same
CN101436601A (en) * 2008-12-18 2009-05-20 上海广电光电子有限公司 Array substrate of thin-film transistor
CN201845156U (en) * 2010-10-15 2011-05-25 北京京东方光电科技有限公司 Array substrate and liquid crystal display panel
CN102360146A (en) * 2011-10-14 2012-02-22 深圳市华星光电技术有限公司 TFT-LCD (thin film transistor-liquid crystal display) array base plate and manufacturing method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11469258B2 (en) 2017-05-31 2022-10-11 Beijing Boe Technology Development Co., Ltd. Display panel and display device
CN109634007A (en) * 2018-12-11 2019-04-16 惠科股份有限公司 Overline structure and manufacturing method thereof
CN109634007B (en) * 2018-12-11 2022-10-11 惠科股份有限公司 Overline structure and manufacturing method thereof
CN114280863A (en) * 2021-12-17 2022-04-05 滁州惠科光电科技有限公司 Array substrate and display panel
CN114280863B (en) * 2021-12-17 2024-04-12 滁州惠科光电科技有限公司 Array substrate and display panel
CN115356879A (en) * 2022-10-21 2022-11-18 广州华星光电半导体显示技术有限公司 Display panel
CN115356879B (en) * 2022-10-21 2023-01-03 广州华星光电半导体显示技术有限公司 Display panel
US12066727B2 (en) 2022-10-21 2024-08-20 Guangzhou China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and display device

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