WO2004068548A2

WO2004068548A2 - Three dimensional radiation conversion semiconductor devices

Info

Publication number: WO2004068548A2
Application number: PCT/US2004/000201
Authority: WO
Inventors: Glenn Saunders; Partha Dutta
Original assignee: Rensselaer Polytechnic Institute
Priority date: 2003-01-21
Filing date: 2004-01-21
Publication date: 2004-08-12
Also published as: WO2004068548A3; TW200507286A

Abstract

A radiation conversion semiconductor device (1) adapted to convert radiation into electrical energy includes a plurality of semiconductor pillars (3) extending from a base (5), where a semiconductor p-n junction between a p-type semiconductor material and an n-type semiconductor material is located in the plurality of pillars (3). The device also includes a first electrode in electrical contact with the p-type semiconductor material of the p-n junction and a second electrode in electrical contact with the n-type semiconductor material of the p-n junction. The device is adapted to generate electrical energy in response to being irradiated with radiation when a load is applied across the p-n junction.

Description

THREE DIMENSIONAL RADIATION CONVERSION SEMICONDUCTOR

DEVICES

CROSS-REFERENCE TO RELATED PATENT APPLICATIONS

[0001] This application claims priority to U.S. Provisional Application Serial

No. 60/440,753, filed January 21, 2003, the disclosure of which is incorporated by reference herein in its entirety.

FIELD OF THE INVENTION

[0002] This invention relates to radiation conversion semiconductor devices.

BACKGROUND OF THE INVENTION

[0003] Direct conversion of radiation energy into electrical energy by way of a semiconductor p-n junction is a simple and environmentally friendly approach that makes it attractive across a broad spectrum of applications. Creating p-n junctions in semiconductor materials is known. An n-type semiconductor material is doped with n-type dopants such that the material contains an excess of electrons. Similarly, ap- type semiconductor material is doped with p-type dopants such that it contains a shortage of electrons or an excess of holes. When a p-n junction of properly processed semiconductor materials is subjected to radiation of sufficient energy, free electrons and corresponding holes are created in the materials of the junction. When a load is introduced across the two materials, electrical energy flows.

[0004] There are various types of radiation conversion devices. Photovoltaic

(PV) devices, such as solar cells, and thermophotovoltaic (TPV) devices convert electromagnetic radiation directly into electrical energy. PV devices or solar cells generally convert visible light directly into electricity while TPV devices generally convert heat (i.e., infrared radiation) directly into electricity. However, PV devices may comprise suitable semiconductor materials to also convert a portion of infrared radiation to electrical energy and TPV devices may comprise suitable semiconductor materials to also convert all or a portion of visible light to electrical energy. Betavoltaic (BV) devices convert beta radiation emitted by radioisotopes into electrical energy. These radiation conversion devices, especially TPV and BV devices, have a lower than desired radiation conversion efficiency. Thus, it is desirable to obtain a radiation conversion device that operates with a higher radiation conversion efficiency and provides an increased power output.

SUMMARY OF THE INVENTION

[0005] One embodiment of the invention provides a radiation conversion semiconductor device adapted to convert radiation into electrical energy which includes a plurality of semiconductor pillars extending from a base, where a semiconductor p-n junction between a p-type semiconductor material and an n-type semiconductor material is located in the plurality of pillars. The device also includes a first electrode in electrical contact with the p-type semiconductor material of the p-n junction and a second electrode in electrical contact with the n-type semiconductor material of the p-n junction. The device is adapted to generate electrical energy in response to being irradiated with radiation when a load is applied across the p-n junction.

BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a three dimensional view of a device according to an embodiment of the invention.

[0007] Figures 2, 3, 4 and 5 are side cross sectional views of devices according to embodiments of the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] The present inventors have realized that radiation conversion efficiency and power output of a radiation conversion device may be increased if the surface area of the device is increased by extending the device into three dimensions. [0009] The current state of the art is to use wafers of semiconductor material as the energy conversion device. A layer or a diffused region of one conductivity type (i.e., p or n type) is formed in a surface of a semiconductor wafer of the opposite conductivity type (i.e., n or p type) to form the p-n junction, and the junction is then assembled into a cell. The cell includes the semiconductor material and the electrical contacts. Such cells are generally constructed using wafers diced from cylindrical lengths of the semiconductor, and as such, are substantially two-dimensional. The power that can be produced by this cell is, in large part, determined by the surface area of the cell. Since the surface area of such a flat, two dimensional cell is relatively low, the power produced by such a cell, as well as its radiation conversion efficiency, are also relatively low.

[0010] In contrast, the present inventors realized that radiation conversion devices that have a significantly larger surface area of p-n junction semiconductor material that is exposed to the radiation produce considerably more power than a substantially two-dimensional wafer of the same volume or weight. While there are many factors that affect the overall device efficiency, the power produced by a PN, TPV or BN cell is primarily a function of the energy of the incident radiation, the properties of the semiconductor material (i.e. band-gap energy) and the construction and geometry of the device. In the prior art flat, two dimensional cells, the energy conversion takes place in the wafer. However, the total power that can be produced is a function of the area of p-n junction that is exposed to the radiation. For a flat wafer, this area is limited to length times width. In contrast, the p-n junction area of three- dimensional devices of the preferred embodiments of the present invention is larger than that of two dimensional prior art structures, which leads to an increase in the power and conversion efficiency of the device. Initial calculations show that by using micromachining techniques to form three dimensional p-n junctions, direct conversion by the devices can be increased by two orders of magnitude or more, yielding significantly improved power output and efficiency.

[0011] In the preferred embodiment of the invention illustrated in Figures 1 and 2, the radiation conversion semiconductor device 1 contains a plurality of semiconductor pillars or columns 3 extending from a base 5. The pillars 3 are separated from each other by spaces 4. As shown in Figure 2, a semiconductor p-n junction 7 is located in the plurality of pillars between a p-type semiconductor material 9 and an n-type semiconductor material 11. The semiconductor layers 9 and 11 may be suitably lightly and/or heavily doped, as long as the radiation conversion semiconductor device 1 can generate electrical energy in response to being irradiated with radiation when a load is applied across the p-n junction. The p-n junction 7 may comprise a direct boundary of the p-type semiconductor material 9 and the n-type semiconductor material 11. Alternatively, while less prefeπed, an intrinsic semiconductor material may be located in the junction 7 between the p-type semiconductor material 9 and the n-type semiconductor material 11.

[0012] As shown in Figure 2, the p-n junction 7 extends in the pillars 3 at least in part in a vertical direction parallel to a height direction of the pillars. Thus, the pillars 3 comprise a core of one of the p and the n-type semiconductor materials surrounded by a shell of the other one of the p and the n-type semiconductor materials. For example, as shown in Figure 2, the core comprises the n-type semiconductor material 11 surrounded by a shell of the p-type semiconductor material 9. It should be noted that the location of the p and n type semiconductor materials 9 and 11 may be reversed if desired, such that the p-type material 9 comprises the core and the n-type material 11 comprises the shell. Preferably, the shell 9 contacts side and top portions of a pillar shaped core 11.

[0013] Any suitable pillar geometry may be used. Preferably, the pillar surface area and aspect ratio (i.e., ratio of height to width) are maximized by minimizing the pillar width and/or maximizing the pillar height and the pillars are preferably packed together as much as possible without adversely affecting the performance of the device. The pillars 3 are preferably formed in a dense formation, such that the ratio of pillar 3 area to space 4 area is equal to or greater than 1:1, such as 3:1 to 10:1 for example. Preferably, adjacent pillars 3 are spaced apart by about 1 to about 10 microns. The pillars 3 may have any suitable shape and are preferably long, slender, high-surface area pillars. Preferably, a height of the pillars 3 is at least five times greater than a width of the pillars, more preferably at least ten times greater, even more preferably between 50 and 100 times greater. In other words, the pillars have an aspect ratio of 5:1 or greater, preferably 10:1 or greater, even more preferably between 50:1 and 100:1. It should be noted that the manufacturing process difficulty increases with increasing pillar aspect ratio. Thus, the desired aspect ratio may be selected based on the availability and desirability of a particular manufacturing process. Preferably, the pillar height ranges from 100 to 1,000 microns, such as 500 to 800 microns. Preferably, the pillar width ranges from 5 to 50 microns, such as 10 to 20 microns. Other dimensions may also be used where appropriate. In one embodiment, the pillars 3 comprise cylindrical pillars having a pillar height that is greater than a pillar diameter (i.e., width). In another embodiment, the pillars 3 comprise polyhedron pillars having a pillar height that is greater than a pillar width. The pillars 3 may comprise any suitable polyhedrons, such as prism shaped polyhedrons or cuboid shaped polyhedrons. The pillar 3 surface may be smooth or it may be textured to contain various surface features, such as grooves and/or protrusions, to increase the pillar surface area. If present, the surface features preferably are less than three microns in size, such as one micron or less in size, and extend the entire height of the pillars 3.

[0014] The base 5 of device 1 may comprise any suitable support for the pillars 3. Preferably, the base 5 comprises a semiconductor material of a same conductivity type as the core 11 and the core 11 extends from the base 5 into the pillars 3. Thus, for example, the base 5 may comprise an n-type semiconductor substrate or wafer and the core of the pillars 11 may comprise n-type semiconductor material. Of course, the base 5 and the core of the pillars may comprise p-type semiconductor material instead.

[0015] Alternatively, the base 5 comprises a semiconductor layer located over a semiconductor or a non-semiconductor substrate. Preferably, the semiconductor layer is of the same conductivity type as the core of the pillars 3. The substrate may comprise a semiconductor wafer or a glass, quartz, ceramic, plastic and/or metal substrate. If desired, the base 5 may comprise a non-semiconductor support substrate or layer. For example, as shown in Figure 3, the base 5 may contain a plurality of non-semiconductor pillar cores 6, such as high temperature metal, glass, quartz, ceramic or plastic pillar cores 6. The plurality of semiconductor pillars 3 comprise semiconductor shells surrounding the non-semiconductor pillar cores 6. The semiconductor p-n junction 7 is located entirely within the semiconductor pillars 3.

[0016] The device 1 also contains two electrodes. A first electrode 13 is in electrical contact with a p-type semiconductor material 9 of the p-n junction and a second electrode 15 is in electrical contact with a n-type semiconductor material of the p-n junction. The term electrical contact means that the electrodes may contact the semiconductor layers of the p-n junction directly or indirectly through one or more intermediate semiconductor or conductive layers.

[0017] In one embodiment, where the base 5 comprises a semiconductor substrate or wafer, one of the electrodes 13, 15 contacts a bottom surface of the semiconductor substrate 5 which is located in electrical contact with the core regions 11 of the pillars 3 and the other electrode 13, 15 contacts at least the upper surfaces of the plurality of pillars 3. This forms a vertical type device 1, as shown in Figure 2. Alternatively, the base 5 may comprise a conductive non-semiconductor material or substrate, such as a metal substrate for example.

[0018] In another embodiment, one of the electrodes 13, 15 contacts an upper surface of the base 5 located adjacent to and in electrical contact with the core regions 11 of the plurality of pillars 3, and the other electrode 13, 15 contacts at least upper surfaces of the plurality of pillars. The forms a lateral type device, as shown in Figure 3. In a lateral type device, the semiconductor material 9 does not contact the base 5 to avoid short circuiting the p-n junction 7. In the example shown in Figure 3, the base 5 comprises a conductive non-semiconductor material, such as metal. However, a semiconductor base 5 may also be used in a lateral type device. If an insulating non- semiconductor material is used as the base 5, then the electrode 15 is formed in direct contact with the semiconductor material 11 of the semiconductor pillars 3. [0019] Preferably but not necessarily, the electrode that contacts at least upper surfaces of the plurality of pillars is located on a bottom surface of a radiation transparent substrate 17 which is located over the plurality of pillars 3 and the electrode contacts only the upper surfaces of the plurality of pillars 3. The electrode may comprise a continuous layer of radiation transparent conductive material. Alternatively, the electrode may comprise a non-radiation transparent material. In this case, the electrode is patterned to be selectively located over the pillars 3, leaving gaps for the radiation to be transmitted to the pillars through the transparent substrate 17. Alternatively, a radiation transparent electrode material, such as indium tin oxide, may be formed on the upper and/or the side surface or surfaces of the pillars. The device 1 shown in Figures 2 and 3 comprises an energy conversion micromodule.

[0020] Any suitable materials may be used for the semiconductor materials and the electrodes of the device 1 depending on the type of radiation that is being converted to electrical energy. For example, the semiconductor materials may be selected from a group consisting of Si, Ge, III-N compound semiconductors, II- VI compound semiconductors and I-III-VI (i.e., InCuSe and InCuS type) compound semiconductors. Any suitable p and n type dopants may be used to dope these semiconductor materials to form p and n type semiconductor materials. Any suitable electrode materials may also be used, such as pure or alloyed Al, Ag, Au, Cu, indium tin oxide, nickel oxide and other conductive materials.

[0021] In one preferred embodiment, the device 1 comprises a solar cell. In this case, the device 1 is adapted to generate electrical energy in response to being irradiated with solar radiation when a load is applied across the p-n junction 7. In this case, the p-type 9 and the n-type 11 semiconductor material preferably has a band gap of below 2 eV. For example, the material may be selected from a group consisting of Si, Ge, CdTe, GaAs, InAlAs, GalnAs, AlGalnAs, InGaAsP, AlGalnP and InGaP.

[0022] In another preferred embodiment, the device 1 comprises a thermal photovoltaic device. In this case, the device 1 is adapted to generate electrical energy in response to being irradiated with thermal radiation when a load is applied across the p-n junction 7. The thermal radiation may comprise heat and/or infrared radiation. Furthermore, the thermal photovoltaic device may be integrated in the same cell as a solar cell in order to convert the sun's visible and thermal energy to electrical energy. In this embodiment the p-type 9 and the n-type 11 semiconductor material is preferably selected from semiconductor materials having a band gap of between about 0.5 and about 6.2 eN, such as a material is selected from a group consisting of Si, GaAs, AlGaAs, GaP, SiC, GaΝ, A1Ν, GaSb, InGaSb, GaAsSb and InGaAsSb. For example, a material having a band gap of between about 0.5 and about 0.8 eN, such as a material selected from a group consisting of GaSb, InGaSb, GaAsSb and InGaAsSb, may be used.

[0023] Figure 4 illustrates a method of operation of a solar cell or a thermal photovoltaic device 1. hicident visible and/or thennal radiation (illustrated by arrows) is incident on the top and/or side surface or surfaces of the columns. If a substrate 17 is present, then it is preferably made of a radiation transparent material, such as glass, quartz, plastic or transparent ceramic to allow the radiation to pass through it, as shown in Figure 4. A load 21 is applied across the p-n junction 7. Preferably the load is applied between the first 13 and the second 15 electrodes. As long as the radiation is present, electrical energy is generated and power is produced, such as by generating a photocuπent between the first 13 and the second 15 electrodes.

[0024] In another embodiment, the radiation conversion device comprises a betavoltaic device or cell 101, as shown in Figure 5. The device 101 is adapted to generate electrical energy in response to being irradiated with beta radiation (i.e., beta particles) when a load is applied across the p-n junction 7. This device exploits the energy of beta radiation, which is produced in the decay of radioisotope materials, to produce electrical energy, hi one configuration shown in Figure 5, a beta radiation emitting material 19 is preferably located in the spaces 4 between the plurality of pillars 3. This configuration increases the surface area of the p-n junction exposed to the radiation.

[0025] A cover 17 is located over the plurality of pillars 3 and sealing the beta radiation emitting material 19 in the space 4 bounded by the base 5, the plurality of pillars 3 and the cover 17. However, if desired, the beta radiation emitting material 19 may be located in a location different from spaces 4. For example, this material 19 may be located above the pillars 3 and/or below the base 5, if desired.

[0026] In another configuration of the device 101, a p-n junction 7 preferably extending substantially the entire height of the entire surface of the pillars 3 and the base material 5 from which they extend, is immersed in a fluid beta source 19, such as Tritium gas. In this embodiment, the radioisotope fluid and the semiconductor substrate are enclosed in a sealed container. In this manner, the cell continues to produce power as long as the beta radiation is present.

[0027] Any suitable a beta radiation emitting material 19 may be used, such as promethium- 147 (Pm¹⁴⁷), promethium oxide, tritium, tritium containing substances such as titanium tritide and tritium-loaded silicon, Cf²⁵¹, Cf²⁵⁰, Cm²⁴³, Cm²⁴⁴, Am²⁴¹, Th²²⁸, Cs¹³⁷, Mo", Co⁶⁰, Ni⁶³ and Sr⁹⁰-Y⁹⁰. The beta radiation emitting material 19 material may be in a solid form, such as a metal layer of promethium- 147 or packed promethium oxide powder or it may be in a fluid form, such as in a liquid form or in a gas form, such as tritium gas. Any suitable semiconductor material may be used in this device 1, such as semiconductor material selected from a group consisting of Si, Ge, CdS, AlGaAs, GaP, SiC,GaN, A1N and GaAs.

[0028] The radiation conversion devices 1 and 101 may be formed by any suitable method. For example, one exemplary method of making the radiation conversion semiconductor device 1, 101 comprises forming a plurality of semiconductor pillars 3 extending from a base 5 and foπning a semiconductor p-n junction 7 in the plurality of pillars after the step of forming the plurality of pillars. The method further comprises forming a first electrode 13 in electrical contact with a p-type semiconductor material 9 of the p-n junction and forming a second electrode 15 in electrical contact with a n-type semiconductor material 11 of the p-n junction.

[0029] The plurality of semiconductor pillars 3 may be formed by any suitable micromacl ining method. For example, the pillars 3 may be formed by etching a plurality of pillars in a thick semiconductor base 5 material, such as in a semiconductor wafer or in a thick semiconductor layer. Alternatively, the semiconductor pillars 3 may be formed as semiconductor layer shells around non- semiconductor pillar cores 6 of a non-semiconductor material base 5. The semiconductor layer may be formed by coating a high temperature substrate with the semiconductor layer by any suitable method, such as liquid phase epitaxy, vapor phase epitaxy, immersion or sputtering. The high temperature substrate may comprise high temperature glass, quartz, semiconductor or ceramic substrates that can survive the 700° C temperature of the melt in the LPE or immersion methods. If the pillars 3 contain surface features, such as grooves and/or protrusions, then these features may be foπned by texturing the pillars 3 with a beam which is capable of forming such features, such as a laser beam, an electron beam or a focused ion beam. Alternatively, the etching conditions, such as power in RLE etching, are cyclically varied during the etching process of the pillars, such that the etching deviates from exact anisotropic etching to form the surface features.

[0030] Preferably, the etching step is preceded by a photolithography step where the pillar locations in the base material are masked by a photoresist pattern and then the unmasked portions of the base material are selectively etched. Preferably, the etching comprises anisotropic deep reactive ion etching (DRIE). For example, DRLE is capable of forming pillars having an aspect ratio of about 50:1. Alternatively, a LIGA deep etching process may be used. LIGA is capable of foπnϊng pillars having an aspect ratio of about 100: 1. The LIGA process includes deep-etch x- ray lithography, electroplating and molding and is preferably carried out on non- semiconductor substrates, such as high temperature plastic or metal substrates. The high aspect, non-semiconductor pillar cores 6 foπned in the non-semiconductor substrate 5 are then coated with one or more semiconductor layers by any suitable method to form semiconductor shells around the non-semiconductor pillar cores, as shown in Figure 3. For example, the pillar cores 6 may be coated by immersion coating by placing the pillar cores 6 into a semiconductor material melt and withdrawing the pillars from the melt.

[0031] Other micromachining methods may also be used to form the pillars 3 depending on the desired pillar width, spacing and height. For example, the pillars may be formed by selectively laser ablating the base material to form the spaces 4 and leaving the pillars 3 in the base material. Furthermore, other micromachinmg material removal methods, such as focused ion beam etching, electro discharge machining, plasma beam machining and chemical milling may also be used if desired.

[0032] The step of forming the semiconductor p-n junction 7 preferably comprises diffusing or ion implanting dopants of a first conductivity type into pillars of an opposite second conductivity type to form a diffused or implanted shell 9 of the first conductivity type around a core 11 of the second conductivity type in the pillars 3. If ion implantation is used to dope the pillars, then angled implantation is preferably used. If diffusion is used to dope the pillars, then solid state, liquid phase or gas phase diffusion doping may be used. If a p-type dopant is used in n-type pillars, then a thin region of p-type semiconductor material 9 is created on all of the surfaces of the pillars, yielding a substantially three-dimensional structure with a large surface area in which the p-n junction 7 is exposed to the radiation.

[0033] In an alternative method, the step of forming the semiconductor p-n junction 7 comprises forming a layer of a first conductivity type 9 on pillar cores 11 of an opposite second conductivity type to form a deposited layer 9 of the first conductivity type around a core 11 of the second conductivity type in the pillars 3. In this method, the cores are first formed by micromachinmg. These cores 11 are thinner than the final thickness of the pillars 3. Any layer deposition method may be used such as CND, LPE or NPE.

[0034] The electrodes 13, 15 are then formed on the pillars 3 and/or on the base material 5 by any suitable metal deposition technique, such as sputtering or electroplating. The electrodes may be photolithographically patterned into a desired shape after deposition. If desired, the upper electrode 13 may be deposited on the bottom surface of the substrate 17 and the substrate 17 is then placed over the pillars 3 to allow the electrode 13 to contact the pillars.

[0035] If a betavoltaic device 101 is to be formed, then the beta radiation emitting material 19 is preferably placed between the plurality of pillars 3. The beta radiation emitting material 19 is sealed between the plurality of pillars 3 to form a betavoltaic device by placing the cover 17 over the device 101 and/or by sealing the device 101 in a sealed container.

[0036] The radiation conversion devices may be used in any application where energy generation is desired, such as in remote sensing, microrobotics, MEMS devices and microbatteries. Thus, the photovoltaic devices may be used in any suitable photovoltaic applications, such as remote power generation, space applications, and residential and commercial power generation. The thermophotovoltaic devices may be used in any suitable thermophotovoltaic applications, such as remote power generation and power scavenging from waste heat sources.

[0037] The betavoltaic devices may be used in any suitable applications and also in applications where batteries are used (i.e., as a replacement to batteries). Thus, the betavoltaic devices may be used as long-life radioisotope batteries wherever self- contained power is required, such as being used as power sources in munitions, as microbatteries in MEMS and communications devices and as remote sensing power sources that require an uninterrupted source of milliwatts of power for durations from 6 months to several years. Betavoltaics have the potential to yield batteries that will outlast current electrochemical technologies by orders of magnitude. The theoretical specific energy of advanced electrochemical batteries is generally not more than about 2 l0³ Wli/kg, while the relatively low-activity radioisotope tritium has a specific energy of about 2xl0⁷ Wh/kg.

[0038] From the foregoing description, one skilled in the art can easily ascertain the essential characteristics of this invention, and without departing from the spirit and scope thereof can make various changes and modifications of the invention to adapt it to various usages and conditions without undue experimentation. All patents, patent applications and publications cited herein are incorporated by reference in their entirety.

Claims

WHAT IS CLAIMED IS:

1. A radiation conversion semiconductor device adapted to convert radiation into electrical energy, comprising: a plurality of semiconductor pillars extending from a base, wherein a semiconductor p-n junction between a p-type semiconductor material and an n-type semiconductor material is located in the plurality of pillars; a first electrode in electrical contact with the p-type semiconductor material of the p-n junction; and a second electrode in electrical contact with the n-type semiconductor material of the p-n junction; wherein the radiation conversion semiconductor device is adapted to generate electrical energy in response to being iπadiated with radiation when a load is applied across the p-n junction.

2. The device of claim 1 , wherein the p-n junction extends in the pillars at least in part in a vertical direction parallel to a height direction of the pillars.

3. The device of claim 2, wherein the pillars comprise a core of one of the p and the n-type semiconductor materials surrounded by a shell of the other one of the p and the n-type semiconductor materials.

4. The device of claim 3, wherein the shell contacts side and top portions of a pillar shaped core.

5. The device of claim 3, wherein: the base comprises a semiconductor material of a same conductivity type as the core; and the core extends from the base into the pillars.

6. The device of claim 5, wherein the base comprises a semiconductor substrate or a semiconductor layer located over a semiconductor or a non-semiconductor substrate.

7. The device of claim 6, wherein: the base comprises a semiconductor substrate; one of the first and the second electrodes contacts a bottom surface of the semiconductor substrate; and the other one of the first and the second electrodes contacts at least upper surfaces of the plurality of pillars.

8. The device of claim 6, wherein: one of the first and the second electrodes contacts an upper surface of the base located adjacent to the plurality of pillars; and the other one of the first and the second electrodes contacts at least upper surfaces of the plurality of pillars.

9. The device of claim 6, wherein: one of the first and the second electrodes contacts the semiconductor base which is in electrical contact with the plurality of pillars; and the other one of the first and the second electrodes is located on a bottom surface of a radiation transparent substrate which is located over the plurality of pillars and the other one of the first and the second electrodes contacts the upper surfaces of the plurality of pillars.

10. The device of claim 2, wherein the pillars comprise cylindrical pillars having a pillar height that is greater than a pillar diameter.

11. The device of claim 2, wherein the pillars comprise polyhedron pillars having a pillar height that is greater than a pillar width.

12. The device of claim 2, wherein a height of the pillars is at least five times greater than a width of the pillars.

13. The device of claim 2, wherein the pillars are separated from each other.

14. The device of claim 1, wherein the p-n junction comprises a direct boundary of the p-type semiconductor material and the n-type semiconductor material or the p-n junction comprises an intrinsic semiconductor material located between the p-type semiconductor material and the n-type semiconductor material.

15. The device of claim 1 , wherein the p-type and the n-type semiconductor material is selected from a group consisting of Si, Ge, III-V compound semiconductors, II- VI compound semiconductors and I-III-VI compound semiconductors.

16. The device of claim 1, wherein: the device comprises a solar cell; and the device is adapted to generate electrical energy in response to being irradiated with solar radiation when a load is applied across the p-n junction.

17. The device of claim 16, wherein the p-type and the n-type semiconductor material is selected from a group consisting of Si, Ge, CdTe, GaAs, InAlAs, GalnAs, AlGalnAs, InGaAsP, AlGalnP and InGaP. •

18. The device of claim 1 , wherein: the device comprises a thennal photovoltaic device; and the device is adapted to generate electrical energy in response to being iπadiated with thermal radiation when a load is applied across the p-n junction.

19. The device of claim 18, wherein the p-type and the n-type semiconductor material is selected from semiconductor materials having a band gap of between about 0.5 and about 0.8 eN.

20. The device of claim 19, wherein the p-type and the n-type semiconductor material is selected from a group consisting of GaSb, InGaSb, GaAsSb and InGaAsSb.

21. The device of claim 1 , wherein: the device comprises a betavoltaic device; and the device is adapted to generate electrical energy in response to being inadiated with beta radiation when a load is applied across the p-n junction.

22. The device of claim 21, further comprising: a beta radiation emitting material located between the plurality of pillars; and a cover located over the plurality of pillars and sealing the beta radiation emitting material in a space bounded by the base, the plurality of pillars and the cover.

23. The device of claim 22, wherein the beta radiation emitting material is selected from Pm¹⁴⁷, promethium oxide, tritium, tritium containing substances, Cf²⁵¹, Cf²⁵⁰, Cm²⁴³, Cm²⁴⁴, Am²⁴¹, Th²²⁸, Cs¹³⁷, Mo", Co⁶⁰, Νi⁶³ and Sr ⁰-Y⁹⁰.

24. The device of claim 23, wherein the beta radiation emitting material is selected from a solid and a fluid beta radiation emitting material.

25. The device of claim 23, wherein the p-type and the n-type semiconductor material is selected from a group consisting of Si, Ge, CdS, AlGaAs, GaP, SiC,GaΝ_s A1N and GaAs.

26. The device of claim 2, wherein: the base comprises a plurality of non-semiconductor pillars cores; and the plurality of semiconductor pillars comprise semiconductor shells suπounding the non-semiconductor pillar cores.

27. A method of making a radiation conversion semiconductor device adapted to convert radiation into electrical energy, comprising: forming a plurality of semiconductor pillars extending from a base; foπning a semiconductor p-n junction in the plurality of pillars after the step of forming the plurality of pillars; forming a first electrode in electrical contact with a p-type semiconductor material of the p-n junction; and ' forming a second electrode in electrical contact with a n-type semiconductor material of the p-n junction.

28. The method of claim 27, wherein the step of forming a plurality of semiconductor pillars extending from a base comprises etching a plurality of pillars in a semiconductor base material.

29. The method of claim 28, wherein the step of fonning a semiconductor p-n junction comprises diffusing or ion implanting dopants of a first conductivity type into pillars of an opposite second conductivity type to form a diffused or implanted shell of the first conductivity type around a core of a second conductivity type in the pillars.

30. The method of claim 28, wherein the step of forming a semiconductor p-n junction comprises forming a layer of a first conductivity type on pillar cores of an opposite second conductivity type to form a deposited layer shell of the first conductivity type around a core of a second conductivity type in the pillars.

31. The method of claim 27, wherein the step of forming a plurality of semiconductor pillars extending from a base comprises forming semiconductor shells surrounding non-semiconductor pillar cores.

32. The method of claim 27, wherein: the p-n junction extends in the pillars at least in part in a vertical direction parallel to a height direction of the pillars; and the pillars comprise a core of one of the p and the n-type semiconductor materials surrounded by a shell of the other one of the p and the n-type semiconductor materials.

33. The method of claim 27, wherein the radiation conversion semiconductor device is selected from a group consisting of a solar cell, a thermal photovoltaic device and a betavoltaic device.

34. The method of claim 33, further comprising placing a beta radiation emitting material between the plurality of pillars and sealing the beta radiation emitting material between the plurality of pillars to form a betavoltaic device.

35. A method of converting radiation into electrical energy, comprising: providing a semiconductor radiation conversion device, comprising: a plurality of semiconductor pillars extending from a base, wherein a semiconductor p-n junction between a p-type semiconductor material and an n-type semiconductor material is located in the plurality of pillars; a first electrode in electrical contact with the p-type semiconductor material of the p-n junction; and a second electrode in electrical contact with the n-type semiconductor material of the p-n junction; applying a load across the p-n junction; and generating electrical energy in response to the device being iπadiated with radiation.

36. The method of claim 35 , wherein: the step of applying a load across the p-n junction comprises applying a load between the first and the second electrodes; and the step of generating electrical energy comprises generating a photocurrent between the first and the second electrodes.

37. The method of claim 35, wherein the step of generating electrical energy comprises generating electrical energy in response to the device being iπadiated with at least one of solar, thermal and beta radiation.