WO2002097774A2

WO2002097774A2 - Drive electronics for display devices

Info

Publication number: WO2002097774A2
Application number: PCT/GB2002/002303
Authority: WO
Inventors: Richard Allan Tuck; Richard Riggs; Jonathan Harrold; Graham Woodgate
Original assignee: Printable Field Emitters Limited
Priority date: 2001-06-01
Filing date: 2002-05-31
Publication date: 2002-12-05
Also published as: WO2002097774A3; AU2002257926A1; GB0212607D0; GB0113331D0; GB2378344A

Abstract

Drive electronics is arranged to monitor the light output of each display element throughout the life of a display (336), either directly or by way of an electrical parameter of the display element, and to make adjustments to electrical drive waveforms of the display elements throughout the life of the display (336), in order to compensate for initial non-uniformity and subsequent differential ageing between the display elements.

Description

DRIVE ELECTRONICS FOR DISPLAY DEVICES

This invention relates to drive electronics for display devices, particularly but not exclusively those using field emission.

It has become clear to those skilled in the art that the key to practical field enύssion devices, particularly displays, lies in arrangements that peπnit the control of the emitted current with low voltages. At the present time, the majority of the art in this field relates to drive arrangements aimed at tip-based emitters - that is, structures that utilise atomically sharp micro- tips as the field emitting source.

The first practical realisation of field emitting arrays controlled by a low voltage grid arrangement (usually called a gate) was described by C A Spindt, working at Stanford Research Institute in California 0.Appl.Ph s. 39,7, pp3504- 3505, (1968)).

A fundamental problem of all field emitter systems is that the emission mechanism is a rapidly changing function of local electric field and/ or surface work function or equivalent parameter. Even with the most rigorous control of fabrication, there is considerable nonruniformity of emission. In 1990 Borel et al described the use of a resistive ballast layer to smooth this nortuniformity by reducing the tip-gate voltage as a function of increasing emitted current. In particular, this technique dramatically reduced the tendency of very emissive emitters to "run away" to destruction. Despite this approach, field emission displays were generally still not as uniform as desired.

Workers in e art have thus looked to the drive electronics to further reduce the inhomogeneity in the display. Dunhan (US 5,262,698); Kane et al (US 5,514, 937); Baldi (US 5,708,451); Hush (US 6,028,576) and Fan (US 6,097,356) all describe the use of look-up tables or selected components to reduce pixel to pixel variation in a field emission display.

In 1997 the applicants described a low-cost method of n^nufacturing large gated arrays that included structures produced by printing (GB 2,330,687). One of the prime applications of this technology was for large flat panel domestic television and home cinema displays. The cost of computer power and memory continues to decrease. Consequenύy, for large devices a simpler panel (e.g. as described by the applicant) driven by more complex electronics may well result in a lower cost display.

Preferred embodiments of the present invention aim to provide efficient ways of compensating for non-uniformity and colour balance in addressable arrays - both for initial non-uniformity and for changes in uniformity that appear later in the device's life (caused, for example, by persistent patterns - for example, broadcast station logos) which changes are often referred to as "differential ageing".

According to one aspect of the present invention, there is provided drive electronics for a display having a plurality of display elements, the drive electronics being arranged to monitor the light output of each display element throughout the life of the display, either direcdy or by ay of an electrical parameter of the display element, and to make adjustments to electrical drive waveforms of the display elements throughout the life of the display, in order to compensate for initial non- uniformity and subsequent differential ageing between the display elements.

Said monitoring maybe performed upon switch-off of the display.

The drive electronics may be arranged to lower the anode voltage during said monitoring to reduce the visibility of said monitoring. Said monitoring may be performed within the periods of frame blanking pulses.

The drive electronics may be arranged to analyse the image being displayed and to perform said monitoring selectively during periods when the image analysis indicates that visible effects of said monitoring on said image are below a predetermined level.

Said monitoring may comprise monitoring of an anode current associated with each display element.

Said monitoring may comprise monitoring and storing of the total anode current or charge delivered to each display element over the operational life of the display.

Said monitoring may comprise monitoring of the light output by each display element by optical sensing means.

Said optical sensing mean may comprise at least one photodiode, avalanche photodiode or photomultiplier tube.

Said monitoring may be performed on said display elements in a spatially random or pseudo- random manner.

The drive electronics maybe arranged to store monitored values and, in a new monitoring and adjustment cycle, in the event that early samples of newly monitored values differ by less than a predeteπriined amount from previously monitored and stored corresponding values, to abort said monitoring and adjustment cycle.

The optical sensing means may be arranged to be situated on the perimeter of the display. The drive electronics may further comprise neutral density, light control (e.g. micro-louvered) or optical bandpass filters to minimise confusing effects of ambient light upon said optical sensing means.

The optical sensing means may be arranged to be situated to the rear of the display and sample light escaping through an array of optically transparent apertures.

The optical sensing means may comprise mechanically scanned sensors, wedge-shaped light guides or double- edge-shaped light guides

Said sensors or light guides maybe provided with holographic coatings.

The optical sensing means may be arranged to be situated in a room in which the display is located.

The optical sensing means may be arranged to be mounted on the walls or ceiling of said room.

The optical sensing means may be located in a remote control unit for the display.

The drive electronics may further comprise a caddie provided on or arranged to be provided on a housing of the display, and arranged to receive said remote control unit.

The drive electronics may be arranged to show on said display messages to a user to assist set-up of said optical sensors.

Said monitoring may take place when the display is not being used to display information. The drive electronics may be arranged to adjust uniϊormity between the display elements in both luminance and colour balance.

The drive electronics may include at least one driver module for addressing said display elements, the driver module having a local memory for storing data representing adjustments required to electrode voltages to compensate for non-uniformity between the display elements, and the driver module further having processing means for processing said data to adjust said electrode voltages.

Preferably, the drive electronics supplies said electrode voltages as pulses; the processing means of the driver module is arranged to adjust the amplitude of said pulses to compensate for non-uniformity between the display elements; and video information is transmitted to the display by modulation of the width of said pulses.

The invention extends to a display provided with drive electronics according to any of the preceding aspects of the invention.

Such a display may comprise a plasma display panel, electroluminescent display, light emitting polymer display or organic light emitting diode display.

Such a display may comprise a field emission display.

For a better understanding of the invention, and to show how embodiments of the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings, in which:

Figure 1 shows a typical drive system for a field emission display device;

Figure 2a shows a block diagram of a typical display drive system controlled via a central processor unit (CPU); Figure 2b shows waveforms associated with the use of a time-to-voltage converter to vary emitter drive voltage;

Figure 2c shows waveforms associated with the use of a time-to- voltage converter to vary emitter drive voltage to compensate for non-uniformity and pulse width modulation to superimpose video information;

Figure 3 is a block diagram of a self-levelling drive system using EHT current sensing;

Figure 4 is a block diagram of a self-levelling drive system using optical output sensing;

Figure 5 is a block diagram of a self-levelling drive system using a combination of EHT current and optical output sensing;

Figure 6a shows a display using an optical sensor on the perimeter of a display device, with overlaying filter;

Figure 6b shows a display using an optical sensor on the perimeter of a display device;

Figures 7a and 7b show a display panel in which light output from each pixel is sampled to the rear of the panel;

Figures 8a, 8b and 8c show methods of sensing light to the rear of a display,

Figure 9a shows methods of sensing light output by remotely located detectors; and Figure 9b shows how light output may be sensed when a display is not operative, using a remote control unit placed in a holding bracket.

In the drawings, like reference numerals denote like or corresponding parts.

Figure 1 shows a field emission display (FED) and typical drive scheme as described by the applicants in a prior patent specification (GB 2,330,687). However, the basic principles apply to any FED, including those based upon microtip emitters. A glass cathode substrate 10 has conducting emitter tracks 11 above which is a field emitting layer 20. An insulating layer 13 has gate tracks 14 orthogonal to the emitter tracks 11. Vias 12 through both the gate track 14 and gate insulating layer 13 form emitter cells from which electrons are emitted under an applied electric field. Such a field is produced as the device is addressed by the combination of a negative voltage 18 on the emitter tracks 11 and a positive voltage on gate tracks 17. The emitted electrons are accelerated by EHT supply 16 to anode 15, where a phosphor coating fluoresces. Normally a pre-set voltage on the gates addresses each line in turn and varying voltages applied to the cathode tracks causes video information to be displayed. An alternative approach used for small displays is to use fixed switching voltages on both emitter and gate tracks and to vary the perceived brightness of each pixel by using pulse width modulation (PW ), typically on the emitter tracks.

Moving now to Figure 2a, we see a block diagram of CPU (Central Processor Unit) controlled FED display 217 with the potential for electronic correction of non-uniformity. A video signal 211 is digitised by analogue to digital converter (ADC) 212. The digitised signal is then passed to CPU 213. The CPU 213 presets an EFΪT voltage at EHT supply 216 and sends signals to emitter driver (215) and gate driver (214) modules to produce pulsed voltages that, in turn, produce an image on the display. At their simplest, the gate and emitter driver modules are arrays of digital to analogue converters followed by amplifiers. The CPU can be a microprocessor, programmable digital signal processor (DSP) or an application-specific device such as a programmable gate array (PGA). As well as calculating the drive voltages required from the video signal and the known FED characteristics, the CPU can use data in its own associated memory to modify these voltages on a pixel-by-pixel basis to compensate for device non-uniformity. Such data is previously determined, using a separate calibration test system.

Moving now to Figure 2b, the reader skilled in the art will understand that, as the number of pixel elements increases, the cost of the large number of DACs in the emitter and gate drive modules becomes significant. Moreover, those DACs will need to operate ever faster. A much lower cost alternative is to use a gated fixed analogue voltage 221 for the gate drive and a time-to- voltage converter for the emitter drive voltage 222. The waveforms for such an arrangement are shown in Figure 2b.

The time-to-voltage converter consists of a constant current fed to the capacitance defined by the parasitic value for the display and its sum with optional other components. As current is fed in, the voltage 222 on the emitter track goes negative until a gating pulse 224 is removed, at which point a respective feed transistor is switched off, leaving a predetermined voltage on the electrode. Varying the width of the gating pulse varies the negative excursion of the emitter pulse. Because the emission and leakage currents are small compared to the current emitted to the anode, the electrode is held at this value until a second transistor short-circuits it to zero. To ensure a flat bottomed pulse during emission, the timings and charging rates are arranged such that the ramp down always occurs outside the period during which the line is selected by the gate voltage going negative - typically the first 25% of the line period. The emitter and gate voltages maybe offset from each other by a DC bias 225.

Figure 3 shows a self-calibrating display system using emitted current sensing. A video signal 331 enters CPU 333 via an ADC 232, where it is digitised. In its simplest embodiment, emitter and gate drivers 335 and 334 which are the conceptually the same as previously described in relation to Figure 2a apply voltages to the tracks of a FED panel 336. However, in this arrangement, emitted pulse currents 340 are measured as they return to EHT supply 339 by EHT current sensor 341 and are digitised by ADC 342. Since the EHT sensor 341 is floated at EHT potential, isolation (usually optical) is required between it and the ADC 342. The sensor 341 could be a resistor/amplifier combination. However, we have found that, by passing the current through a light emitting diode (LED), it will sense the current directly. The associated light pulse is then passed down a light guide to a photo-detector, which in turn applies a voltage to the ADC 342. To avoid non-linearity at low currents, another LED shines light onto the sensing photodiode of the photo-detector, to produce a small bias current.

To calibrate the FED 336, the CPU 333 characterises the display one pixel at a time in each line. A line is selected by applying a sequence of normal-value gate pulses and then the negative emitter voltage is increased until one or more (usually two) predetermined values of emitter current are reached. The average of a number of pulses is taken. These values are then stored in the CPUs memory. The process then moves to next pixel and thence onto the next line. Although the stepwise increase in emitter voltage is the simplest, in certain cases, other dgorithms such as pattern searches may be used to home in on the desired values more efficiently. For a large television display, such a process may take approximately twenty minutes. Although the calibration process could be performed at start-up, a twenty minutes delay before use would be extremely irritating. A more user-friendly scheme is for it to happen on system shutdown (switch-off). Once a display shutdown instruction has been given, the CPU 333 will cause the EHT to be reduced to a low value that is just sufficient to collect the emitted current and start the calibration process. All the user will see is a very faint dot or line moving around the screen. Once the calibration is complete, the CPU 333 will store the data and power down the display.

An alternative approach is to perform the calibration during normal display operation, by fitting in the calibration events within a normal screen- blanking period between fields or frames. In this case, the EFTT cannot be reduced, so a blinking pixel wandering about the screen may be seen by the viewer. This can be rendered less obvious by moving from pixel to pixel in random manner (for example, in a spatially pseudo-random manner) and suppressing calibration during dark scenes.

The reader skilled in the art will realise that, as the number of pixels in the display increases, the computational load on the CPU 333 increases also. In fact, even before this happens, data transfer down busses 337 to the driver modules becomes an issue. To avoid these problems, the emitter driver modules may have both local memory 338 for the calibration data and simple computational capabilities to use this data.

To compensate for "differential ageing" (due to, for example, broadcast station logos) the exemplary scheme shown in Figure 3 can be further utilised as follows. The reduction of light emission for a given phosphor due to the amount of charge it has received over time can be measured or acquired from manufacturer's data and stored in a memory. The data for the drive voltage or current delivered to each display element during each frame is available on the bus 337 or at each of the emitter drivers 335. By utilisation of further non- volatile memory for each display element at either the CPU 333 or locally to the emitter driver modules 338 , the voltage or current delivered to each display element at each frame can be added to the contents of this memory at each frame to give a measure of the total charge delivered to the anode for each display element over time. This data can then be combined with the calibration data to increase the voltage or current to compensate for the dimming of individual display elements that would otherwise occur as a result of the differential ageing process. This process could also be used to compensate for ageing in a display where the calibration described elsewhere in this specification was not being utilised.

In one exemplary scheme shown in Figure 2c, a gate voltage 231 is fixed as in the example of Figure 2b. The amplitude of a negative-going emitter pulse 232 is adjusted locally on a pixel-by-pixel basis according to calibration data stored in CPU 333 to compensate for any non-uniformity only. This is done using the same time to voltage conversion with gating pulse 234 as described before with reference to Figure 2b. The video signal is then superimposed via a PWM process 233 controlled by the CPU via pulse 235.

In the embodiment illustrated in Figure 4, instead of sensing emitted current, the system monitors light output from each pixel. This has the additional benefit that it can compensate for ageing effects in, for example, phosphors and other fluorescent materials. This extends the usefulness of embodiments of the invention from FEDs to devices such as, but not limited to, plasma display panels, inorganic and organic electroluminescent displays, including organic and inorganic light emitting diodes, light emitting polymers. The technique can also be applied to liquid crystal displays to compensate for nianufacturing defects, non-uniform back-lighting and back-light ageing. It may also be applied to digitally scanned cathode ray tubes. In Figure 4, light from each pixel of display 336 is detected by optical sensor 411 and the output is fed to ADC 342. All other operations are as for previously described embodiments.

Moving now to Figure 5, an anode current sensor 541 works in conjunction with an optical sensor 411. Although various combinations are possible (and fall within the scope of this invention), a particularly advantageous embodiment is to use an optical sensor to determine the drive parameters for peak white and a current sensor to determine the drive parameters for black. The measurements may take place at intermediate values and parameters associated with peak white and black estimated by extrapolation.

Figure 6a illustrates one possible location for optical sensor 516. Let us take for example the case of a field emission display panel 510 where each pixel emits light 515 with a Lambertian polar distribution. A portion of this light 514 will fall upon sensor 516 located at the perimeter but somewhat above the face of the panel 510. Qearly, the higher the sensor is relative to face of the panel, the higher the optical signal will be. The sensor 516 may be located in a hood 518 at the top of the display. This location has three advantages:

1. In the case of a normal format display, it is looking across the narrower face so, for a given elevation of sensor relative to panel face, the viewing angle will be more favourable.

2. The hood is advantageously located to attenuate ambient light from overhead.

3. Such a location is aesthetically better. 2/097774

- 13 -

An optional second sensor 517 may be used to measure ambient light, avoiding the need to use detector 516, and its associated electronics, in a fast difference mode.

The optical fluxes created by the pixel at the sensor are small, so that their measurement is non-trivial. Examples of suitable sensors are: photodiodes, both biased and non-biased; avalanche photodiodes in both linear and Geiger modes; and photomultiplier tubes in both linear and pulsed modes.

Both avalanche photodiodes and photomultipliers suffer from saturation effects. Photodiodes suffer from shot noise that is proportional to light input. In all three cases, our ability to measure the small pixel to pixel fluxes is controlled to a large degree by how well we can suppress the effects of ambient light. Whilst in many applications there will be times when the display is in the dark, and the electronics could be programmed to detect such occurrences, such a situation is not guaranteed, e.g. public information displays in, say, airports. i Figure 6b shows one simple arrangement where the display described in

Figure 6a is fitted with a filter 520 to attenuate incident light 521. Said filter could be of the neutral density type or of a more sophisticated nature. For example, in a public information display, the filter could be a so called "light control film" with a Venetian blind microstructure (micro-louvered). The plane of the "slats" of the film will be normal to the viewer and generally orthogonal to the ambient light.

Another approach is to place narrow bandpass optical filters, tuned to the output of phosphors or other light ernitting structure, in front of the detector.

Such filters will transmit most of the wanted light, whilst massively attenuating the broadband ambient light. In the case of a monochrome display, such a narrow bandpass filter could be over the whole display as shown in Figure 6b. In addition to attenuating ambient light falling upon the sensor, such a filter will improve the contrast ratio of the display.

Moving now to Figures 7a, 7b, 8a, 8b and 8c, we see an approach that measures pixel light output that is transmitted through transparent "windows" in the rear plane of a display panel. For example, in the case of a field emission display, this plane would be the cathode plane.

Referring to Figures 7a and 7b, which depict a field emission display, we see a cathode plane glass substrate 700, with cathode tracks plus emitter layer 702, gate insulator 703, and orthogonal gate tracks 704. On the anode plane glass 701 are phosphor patches 706 (in the case of a colour display these are of red, green and blue emitting material = RGB) on a conducting black matrix 707. The two planes are separated by spacers 708. The cathode and gate tracks are spaced a fixed distance apart and so expose an array of transparent regions 709 which will allow a sample of light 711 from the phosphor patches 706 to pass through to the rear of the panel where it may be measured by sensor 713. The power of the light sample 711 is proportional to that of the emitted light 712. The spacers 708 are located many pixel pitches apart and so many potential spacer sites are not obstructed by spacers. To avoid ^'•.the effects of this asymmetry, all spacers are located at a defined point relative to the pixel or colour triad and all such positions 709 are rendered opaque by deposited material 710. Some ambient light will also pass through the sampling windows 709, but this will be attenuated at four stages:

1. by the neutral density filter normally used in front of the panel to improve contrast;

2. by the aperture ratio of the opaque black matrix and the reduced transmission (~ 50%) through the phosphor; 3. by the aperture ratio of the sampling windows;

4. by optical bandpass filters on the detector.

Moving now to Figures 8a, 8b and 8c we see schemes for measuring the light sampled through the back of the panel. Figure 8a shows the rear of a panel 800 with a line array of sensors 802 on a mechanically scanned arm 801. The arm 801 is scanned a line at a time in accordance with a calibration process. Figure 8b shows a similar arrangement but with only one sensor 812 and a two axis scanning mechanism 811 measuring panel 810. In each case, the mechanical scanning maybe performed silently, inexpensively and reliably by adaptations of (for example) ink- jet printer technology.

An alternative approach with no moving parts is shown in Figure 8 c. Here, rear-sampled light 823 from panel 820 with emitted light 822 is collected by wedge- or double wedge-shaped light guide 821 and directed to sensors 824. The light guide 821 may use holographic coatings to enhance transmission.

Moving now to Figures 9a and 9b we see approaches that use remote or semi- remote sensors to measure pixel light output from the front of a display.

Figure 9a shows a display 901 in a room 900. A sensing transponder 902 is located on the wall or ceiling and both measures pixel light output and transmits data back to display electronics by, for example, infrared. The transponder may be incorporated in a remote control 903 for the display. In both cases, the user is interactively guided in sensor set-up by software which provides messages on the display 901.

The reader will recall that an issue with the approach described in Figure 6a is the unfavourable viewing angle of sensor relative ID display. As the sensor is moved away from the face of the display, its presence becomes more visually obtrusive. This becomes less of an issue if the display is not actually being watched at the time. Figure 9b shows how a sensor may be incorporated into remote control 913 placed, when the display is not operating, in a holding caddie 915 that gives the sensor a better angle of view. The remote control has an optical sensor 914 that measures pixel output and comniunicates this to the display electronics via either an infrared link 919 with transponder 918 or via direct electrical connection 920. The display electronics detects the presence of the remote control either electrically or via infrared communication.

All of the optical sensing schemes described above will have different relative sensitivities from location to location on the display. Consequendy, the display electronics will hold data on this effect and apply appropriate correction factors.

For reasons of clarity, much of the above description has been in terms of a monochrome display. However, the reader skilled in the art will realise that, in colour displays, as well as pixel to pixel uniformity, the overall colour balance is of great importance. Using the teachings of this document, there are essentially two ways of correcting this:

1) by electrically and/or optically levelling each coloured pixel array (i.e. red then green and then blue) and then adjusting the relative levels of all three arrays according to known rules;

2) using optical detectors with coloured filters to actually measure the colour balance of each pixel, or larger region in turn.

It is important to appreciate that, in embodiments of the present invention, the uniformity of the display elements is not simply measured and compensated for once - for example, by a calibration and compensation process carried out only once during or immediately after manufacture. In contrast to this, the light output of each display element is monitored throughout the life of the device (for example, at predetermined intervals or occasions), either direcdy or by way of an electrical parameter of the display element, and adjustments are made to electrical drive waveforms of the display elements throughout the life of the device, in order to compensate both for initial noriruriiformity and subsequent differential ageing between the display elements.

Although preferred embodiments of the invention may be applied with particular advantage to field emission displays, other embodiments of the invention may be applied to displays more generally.

In this specification, the verb "comprise" has its normal dictionary meaning, to denote non-exclusive inclusion. That is, use of the word "comprise" (or any of its derivatives) to include one feature or more, does not exclude the possibility of also including further features.

The reader's attention is directed to all and any priority documents identified in connection with this application and to all and any papers and documents which are filed concurrendy with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/ or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/ or steps are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.

The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.

Claims

1. Drive electronics for a display having a plurality of display elements, the drive electronics being arranged to monitor the light output of each display element throughout the life of the display, either directiy or byway of an electrical parameter of the display element, and to make adjustments to electrical drive waveforms of the display elements throughout the life of the display, in order to compensate for initial nonruniformity and subsequent differential ageing between the display elements.

2. Drive electronics according to claim 1, wherein said monitoring is performed upon switch-off of the display.

3. Drive electronics according to claim 1, arranged to lower the anode voltage during said monitoring to reduce the visibility of said monitoring.

4. Drive electronics according to claim 1, 2 or 3, wherein said monitoring is performed within the periods of frame blanking pulses.

5. Drive electronics according to claim 4, arranged to analyse the image being displayed and to perform said monitoring selectively during periods when the image analysis indicates that visible effects of said monitoring on said image are below a predetermined level.

6. Drive electronics according to any of the preceding claims, wherein said monitoring comprises monitoring of an anode current associated with each display element.

7. Drive electronics according to any of the preceding claims, wherein said monitoring comprises monitoring and storing of the total anode current or charge delivered to each display element over the operational life of the display.

8. Drive electronics according to any of the preceding claims, wherein said monitoring comprises monitoring of the light output by each display element by optical sensing means.

9. Drive electronics according to claim 8, wherein said optical sensing means comprises at least one photodiode, avalanche photodiode or photomultiplier tube.

10. Drive electronics according to any of the preceding claims, wherein said monitoring is performed on said display elements in a spatially random or pseudorandom manner.

11. Drive electronics according to any of the preceding claims, arranged to store monitored values and, in a new monitoring and adjustment cycle, in the event that early samples of newly monitored values differ by less than a predetermined amount from previously monitored and stored corresponding values, to abort said monitoring and adjustment cycle.

12. Drive electronics according to any of claims 8 to 11, wherein the optical sensing means is arranged to be situated on the perimeter of the display.

13. Drive electronics according to any of claims 8 to 12, further comprising neutral density, light control (e.g. micro-louvered) or optical bandpass filters to rninirnise confusing effects of ambient light upon said optical sensing means.

14. Drive electronics according to any of claims 8 to 13, wherein said optical sensing means is arranged to be situated to the rear of the display and sample light escaping through an array of optically transparent apertures.

15. Drive electronics according to any of claims 8 to 14, wherein said optical sensing means comprises mechanically scanned sensors, wedge-shaped light guides or double- edge-shaped light guides

16. Drive electronics according to claim 15, wherein said sensors or light guides are provided with holographic coatings.

17. Drive electronics according to any of claims 8 to 16, wherein said optical sensing means is arranged to be situated in a room in which the display is located.

18. Drive electronics according to claim 17, wherein said optical sensing means is arranged to be mounted on the walls or ceiling of said room.

19. Drive electronics according to any of claims 8 to 18, wherein said optical sensing means is located in a remote control unit for the display.

20. Drive electronics according to claim 19, further comprising a caddie provided on or arranged to be provided on a housing of the display, and arranged to receive said remote control unit.

21. Drive electronics according to any of the preceding claims, arranged to show on said display messages to a user to assist set-up of said optical sensors.

22. Drive electronics according to any of the preceding claims, wherein said monitoring take place when the display is not being used to display information.

23. Drive electronics according to any of the preceding claims, arranged to adjust uniformity between the display elements in both lvinrinance and colour balance.

24. Drive electronics according to any of the preceding claims, including at least one driver module for addressing said display elements, the driver module having a local memory for storing data representing adjustments required to electrode voltages to compensate for nortuniformity between the display elements, and the driver module further having processing means for processing said data to adjust said electrode voltages.

25. Drive electronics according to claim 24, wherein said driver module supplies said electrode voltages as pulses; the processing means of the driver module is arranged to adjust the amplitude of said pulses to compensate for nonruniformity between the display elements; and video information is transmitted to the display by modulation of the width of said pulses.

26. Drive electronics for a display, the drive electronics being substantially as hereinbefore described with reference to the accompanying drawings.

27. A display provided with drive electronics according to any of the preceding claims.

28. A display according to claim 27, comprising a plasma display panel, electroluminescent display, light emitting polymer display or organic light emitting diode display.

29. A display according to claim 27, being a field emission display.