WO2002021593A9 - Method of forming titanium nitride (tin) films using metal-organic chemical vapor deposition (mocvd) - Google Patents
Method of forming titanium nitride (tin) films using metal-organic chemical vapor deposition (mocvd)Info
- Publication number
- WO2002021593A9 WO2002021593A9 PCT/US2001/027571 US0127571W WO0221593A9 WO 2002021593 A9 WO2002021593 A9 WO 2002021593A9 US 0127571 W US0127571 W US 0127571W WO 0221593 A9 WO0221593 A9 WO 0221593A9
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- WIPO (PCT)
- Prior art keywords
- process chamber
- titanium
- tin
- seem
- substrate
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76862—Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
- H01L23/53266—Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates to titanium nitride (TiN) films, their use in integrated circuit fabrication, and a method for forming a titanium nitride (TiN) film using metal-organic chemical vapor deposition (MOCVD) .
- TiN titanium nitride
- MOCVD metal-organic chemical vapor deposition
- Integrated circuits have evolved into complex devices that can include millions of components (e. g. , transistors, capacitors and resistors) on a single chip.
- components e. g. , transistors, capacitors and resistors
- the evolution of chip designs continually requires faster circuitry and greater circuit densities.
- the demands for greater circuit densities necessitate a reduction in the dimensions of the integrated circuit components.
- low resistivity metal interconnects e. g., aluminum (Al) and copper (Cu)
- Al aluminum
- Cu copper
- the metal interconnects are electrically isolated from each other by an insulating material.
- capacitive coupling potentially occurs between such interconnects. Capacitive coupling between adjacent metal interconnects may cause cross-talk and/or resistance-capacitance (RC) delay, which degrades the overall performance of the integrated circuit.
- RC resistance-capacitance
- low dielectric constant (low k) insulating materials e. g., dielectric constants less than about 4.5
- Carbon based materials such as organosilicates (SiOC) , silicon carbide, and benzocyclobutene (BCB) layers, for example, are often used as low dielectric constant (low k) insulating materials on integrated circuits.
- a barrier layer often separates the metal interconnects from the low dielectric constant (low k) insulating materials.
- the barrier layer minimizes the diffusion of interconnect metal into the insulating material. Diffusion of interconnect metal into the insulating material is undesirable because such diffusion can affect the electrical performance of the integrated circuit, or render it inoperable.
- Titanium nitride (TiN) for example, is often used as a barrier layer for copper (Cu) , tungsten (W) , or aluminum (Al) interconnect metallization.
- Titanium nitride (TiN) films can be formed using metal-organic chemical vapor deposition (MOCVD) techniques .
- CVD TiN films are formed by thermally decomposing a titanium based metal-organic precursor.
- TiN may be formed when tetrakisdimethylami o titanium (abbreviated TDMAT) (Ti (N(CH 3 ) 2 ) 4 ) , tetrakisdiethylamido titanium (TDEAT) (Ti (N(C 2 H 5 ) 2 ) 4 ) , or tetramethylamido titanium (TMAT) (Ti(N(CH 3 ) 4 ) decomposes.
- TDMAT tetrakisdimethylami o titanium
- TDEAT tetrakisdiethylamido titanium
- TMAT tetramethylamido titanium
- the titanium nitride (TiN) film is typically plasma treated to improve the barrier properties thereof.
- ion bombardment of the TiN film may heat the substrate to temperatures greater than about 360 °C.
- some carbon-based low dielectric constant (low k) insulating materials such as, organosilicates (SiOC) , silicon carbide, and benzocyclobutene (BCB) , for example, can begin to decompose at temperatures greater than about 360 °C, making them incompatible for use with plasma treated titanium nitride (TiN) barrier layers.
- TiN titanium nitride
- TiN titanium nitride
- TiN titanium nitride
- the titanium nitride (TiN) film is formed by thermally decomposing a titanium based compound on a substrate having a carbon-based dielectric layer thereon. Thereafter, the titanium nitride (TiN) film is plasma treated.
- the substrate is maintained at a temperature less than about 360 °C .
- the substrate is preferably maintained at a temperature less than about 360 °C using a backside gas which conducts heat away from the substrate.
- the titanium nitride (TiN) film is compatible with integrated circuit fabrication processes.
- the titanium nitride (TiN) film is used as a barrier layer for fabricating integrated circuit structures such as, for example, vias.
- a preferred process sequence includes providing a substrate having a carbon-based dielectric layer thereon.
- the carbon-based dielectric layer has vias therein.
- a titanium nitride (TiN) film is formed on the dielectric material by thermally decomposing a titanium based compound. Thereafter, the titanium nitride (TiN) film is plasma treated. When the titanium nitride (TiN) film is plasma treated, the substrate is maintained at a temperature less than about 360 °C.
- the substrate is preferably maintained at a temperature less than about 360 °C using a backside gas to conduct heat away from the substrate.
- TiN titanium nitride
- FIG. 1 depicts a schematic illustration of an apparatus that can be used for the practice of embodiments described herein;
- FIG. 2 depicts a schematic illustration of an alternate apparatus including a remote plasma source that can be used for the practice of embodiments described herein;
- FIGS. 3a-3c depict schematic cross-sectional views of an integrated circuit structure at different stages of a fabrication sequence incorporating a titanium nitride (TiN) barrier layer.
- TiN titanium nitride
- FIG. 1 is a schematic representation of a wafer processing system 10 that can be used to perform titanium nitride (TiN) film formation in accordance with embodiments described herein.
- System 10 typically comprises a process chamber 100, a gas panel 130, a control unit 110, along with other hardware components such as power supplies 106 and vacuum pumps 102.
- process chamber 100 has been previously described in commonly assigned U. S. patent application Serial No. 09/211,998, entitled “High Temperature Chemical Vapor Deposition Chamber", filed December 14, 1998, and is herein incorporated by reference. The salient features of this system 10 are briefly described below.
- the process chamber 100 generally houses a support pedestal 150, which is used to support a substrate such as a semiconductor wafer 190.
- the support pedestal 150 can typically be moved in a vertical direction inside the chamber 100 using a displacement mechanism (not shown) .
- the wafer 190 can be heated to some desired temperature prior to the titanium nitride (TiN) film deposition.
- the wafer support pedestal 150 may be heated by an embedded heater element 170.
- the pedestal 150 can be resistively heated by applying an electric current from an AC power supply 106 to the heater element 170.
- the wafer 190 is, in turn, heated by the pedestal 150.
- a temperature sensor 172 such as a thermocouple, is also embedded in the wafer support pedestal 150 to monitor the temperature of the pedestal 150 in a conventional manner. The measured temperature is used in a feedback loop to control the power supplied to the heater element 170, such that the wafer temperature can be maintained or controlled at a desired temperature which is suitable for the particular process application.
- the wafer support pedestal 150 is optionally heated using radiant heat (not shown) .
- the support pedestal 150 may also have grooves (not shown) and channels (not shown) on the pedestal surface. Details of a support pedestal 150 including grooves and channels has been disclosed in commonly-assigned U. S. Patent Application, Serial No. 09/398,400, filed on September 14, 1999, entitled “Method of Plasma Processing Tungsten Using a Nitrogen Fluoride/Chloride Chemistry", which is herein incorporated by reference.
- Gas from a gas source (not shown) is provided to the backside of the semiconductor wafer through the grooves and channels on the pedestal 150 surface.
- the backside gas is used to facilitate heat transfer from the semiconductor wafer 190 to the support pedestal 150.
- the backside gas may be used to cool the semiconductor wafer 190 to a desired temperature.
- a vacuum pump 102 is used to evacuate the process chamber 100 and to maintain the proper gas flows and pressure inside the chamber 100.
- a showerhead 120 through which process gases are introduced into the chamber 100, is located above the wafer support pedestal 150.
- the showerhead 120 is coupled to a gas panel 130, which controls and supplies various gases used in different steps of the process sequence.
- the showerhead 120 and the wafer support pedestal 150 also form a pair of spaced apart electrodes. When an electric field is generated between these electrodes, the process gases introduced into the chamber 100 are ignited into a plasma. Typically, the electric field is generated by connecting the wafer support pedestal 150 to a source of radio frequency (RF) power (not shown) through a matching network (not shown) . Alternatively, the RF power source and matching network may be coupled to the showerhead 120, or coupled to both the showerhead 120 and the wafer support pedestal 150.
- RF radio frequency
- Plasma enhanced chemical vapor deposition (PECVD) techniques promote excitation and/or disassociation of the reactant gases by the application of the electric field to the reaction zone near the substrate surface, creating a plasma of reactive species .
- the reactivity of the species in the plasma reduces the energy required for a chemical reaction to take place, in effect lowering the required temperature for such (PECVD) processes.
- the showerhead 120 allows process gases from the gas panel 130 to be uniformly introduced and distributed in the process chamber 100.
- control unit 110 comprises a central processing unit (CPU) 113, support circuitry 114, and memories containing associated control software 116.
- the control unit 110 is responsible for automated control of the numerous steps required for wafer processing - such as wafer transport, gas flow control, RF power control, temperature control, chamber evacuation, and other steps.
- Bi-directional communications between the control unit 110 and the various components of the wafer processing system 10 are handled through numerous signal cables collectively referred to as signal buses 118, some of which are illustrated in FIG. 1.
- the central processing unit (CPU) 113 may be one of any form of general purpose computer processor that can be used in an industrial setting for controlling process chambers as well as sub-processors.
- the computer may use any suitable memory, such as random access memory, read only memory, floppy disk drive, hard drive, or any other form of digital storage, local or remote.
- Various support circuits may be coupled to the CPU for supporting the processor in a conventional manner. Process sequence routines as required may be stored in the memory or executed by a second CPU that is remotely located.
- the process sequence routines are executed after the substrate 190 is positioned on the wafer support pedestal 150.
- the process sequence routines when executed, transform the general purpose computer into a specific process computer that controls the chamber operation so that the deposition process is performed.
- the chamber operation may be controlled using remotely located hardware, as an application specific integrated circuit or other type of hardware implementation, or a combination of software or hardware.
- a remote plasma source 150 may be coupled to wafer processing system 10, as shown in FIG. 2, to provide a remotely generated plasma to the process chamber 100.
- the remote plasma source 150 includes a gas supply 153, a gas flow controller 155, a plasma chamber 151, and a chamber inlet 157.
- the gas flow controller 155 controls the flow of process gas from the gas supply 153 to the plasma chamber 151.
- a remote plasma may be generated by applying an electric field to the process gas in the plasma chamber 151, creating a plasma of reactive species.
- the electric field is generated in the plasma chamber 151 using a RF power source (not shown) .
- the reactive species generated in the remote plasma source 150 are introduced into the process chamber 100 through inlet 157.
- FIGS. 3a-3c illustrate an integrated circuit structure at different stages of a fabrication sequence. incorporating a plasma treated titanium nitride (TiN) barrier layer formed on a carbon-based dielectric layer.
- the substrate 200 refers to any workpiece upon which film processing is performed, and a substrate structure 250 is used to generally denote the substrate 200 as well as other material layers formed on the substrate 200.
- the substrate 200 may be a silicon semiconductor wafer, or other material layer, which has been formed on the wafer.
- FIG. 3a shows a cross-sectional view of a substrate structure 250, having a material layer 202 thereon.
- the material layer 202 may be an oxide (e. g., silicon dioxide).
- the oxide layer 202 has been conventionally formed.
- a carbon-based dielectric layer 204 is formed on the oxide layer 202.
- the carbon-based dielectric layer 204 may be, for example, an organosilicate (SiOC) , silicon carbide (SiC) , or benzocyclobutene (BCB) , among others.
- the carbon-based dielectric layer 204 has been conventionally formed and patterned to provide a contact hole 204H having sidewalls 204S, and extending to the top surface 202T of the oxide layer 202.
- FIG. 3b depicts a titanium nitride (TiN) layer 206 formed on the substrate structure 250 of FIG. 3a.
- the titanium nitride (TiN) layer 206 is formed by thermally decomposing a titanium based compound such as a titanium based metal organic precursor.
- the titanium based metal organic precursor may be selected, for example, from the group of tetrakisdimethylamido titanium (abbreviated TDMAT) (Ti (N(CH 3 ) 2 ) 4 ) tetramethylamido titanium (TMAT) (Ti (N(CH 3 ) 4 ) , or tetrakisdiethylamido titanium (TDEAT) (Ti (N(C 2 H 5 ) 2 ) 4 ) , among others.
- TDMAT tetrakisdimethylamido titanium
- Ti tetrakisdimethylamido titanium
- TDEAT tetrakisdiethylamido titanium
- Carrier gases such as hydrogen (H 2 ) , helium (He) , argon (Ar) , nitrogen (N 2 ) , neon (Ne) , and xenon (Xe) , among others, may be mixed with the titanium based metal organic precursor.
- the following deposition process parameters can be used to form the titanium nitride (TiN) layer in a deposition chamber similar to that shown in FIGS . 1 or 2.
- the process parameters range from a wafer temperature of about 40 °C to about 85 °C, a chamber pressure of about 0.1 torr to about 5 torr, a titanium based metal organic precursor flow rate of about 1 seem to about 100 seem, and a carrier gas flow rate of about 400 seem to about 600 seem.
- the above process parameters provide a deposition rate for the titanium nitride (TiN) layer in a range of about 100 A/min to about 700 A/min when implemented on a 200 mm (millimeter) substrate in a deposition chamber available from Applied Materials, Inc., located in Santa Clara, California.
- deposition chambers are within the scope of the invention, and the parameters listed above may vary according to the particular deposition chamber used to form the titanium nitride (TiN) layer.
- other deposition chambers may have a larger (e. g., configured to accommodate 300 mm substrates) or smaller volume, requiring gas flow rates that are larger or smaller than those recited for deposition chambers available from Applied Materials, Inc.
- the thermal decomposition of the titanium based metal organic precursor advantageously forms titanium nitride (TiN) layers with good step coverage.
- the thickness of the titanium nitride (TiN) layer 206 is variable depending on the specific stage of processing. Typically, the titanium nitride (TiN) layer 206 is deposited to a thickness of about 35 A to about 200 A.
- the titanium nitride (TiN) layer 206 is plasma treated.
- the titanium nitride (TiN) layer 206 is preferably plasma treated with one or more gases selected from the group of hydrogen (H 2 ) , nitrogen (N 2 ) , helium (He) , argon (Ar) , xenon (Xe) , neon (Ne) , and silane (SiH 4 ) , among others.
- the following process parameters can be used to plasma treat the titanium nitride (TiN) layer 204 in a process chamber similar to that shown in FIGS. 1 or 2.
- the process parameters range from a wafer temperature of less than about 360 °C, a chamber pressure of about 2 torr to about 5 torr, a gas flow rate of about 200 seem to about 500 seem, and a radio frequency (RF) power of about 600 watts to about 800 watts.
- the titanium nitride (TiN) layer 206 is plasma treated for less than about 60 seconds .
- the substrate While the titanium nitride (TiN) layer is plasma treated, the substrate is maintained at a temperature less than about 360 °C using a backside gas.
- the backside gas is provided through grooves and channels on the wafer support pedestal, over which the substrate is positioned. The backside gas facilitates heat transfer from the substrate to the wafer support pedestal, so as to maintain such substrate in a desired temperature range.
- the backside gas may be selected from the group of nitrogen (N 2 ) , helium (He) , argon (Ar) , neon (Ne) , xenon (Xe) , among others.
- the backside gas is typically provided at a flow rate of about 200 seem to about 2000 seem.
- the plasma treatment of the titanium nitride (TiN) layer 206 is believed to reduce the number of carbon- based impurities incorporated therein from the metal- organic precursors . Reducing the number of carbon-based impurities reduces the resistivity of the as-deposited layer. Additionally, the plasma treatment is believed to stabilize the TiN layer in that it becomes less reactive with moisture and/or oxygen under atmospheric conditions.
- the holes 204H are filled with a conductive material 208 such as, for example, aluminum (Al) , copper (Cu) , tungsten (W) , and combinations thereof, among others.
- the conductive material 208 may be deposited using chemical vapor deposition (CVD) , physical vapor deposition (PVD) , electroplating, or combinations thereof.
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Abstract
A method of plasma treating titanium nitride (TiN) films at temperatures that are compatible with carbon-based dielectric layers is disclosed. The titanium nitride (TiN) film is formed by thermally decomposing a titanium based compound on a substrate having a carbon-based dielectric layer thereon. Thereafter, the titanium nitride (TiN) film is plasma treated. During the titanium nitride (TiN) film plasma treatment, the substrate is maintained at a temperature less than about 360 °C. The substrate is preferably maintained at a temperature less than about 360 °C using a backside gas which conducts heat away from the substrate. The titanium nitride (TiN) film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the titanium nitride (TiN) film is incorporated into a damascene structure.
Description
METHOD OF FORMING TITANIUM NITRIDE (TiN) FILMS USING METAL-ORGANIC CHEMICAL VAPOR DEPOSITION (MOCVD)
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The present invention relates to titanium nitride (TiN) films, their use in integrated circuit fabrication, and a method for forming a titanium nitride (TiN) film using metal-organic chemical vapor deposition (MOCVD) .
2. Description of the Background Art
Integrated circuits have evolved into complex devices that can include millions of components (e. g. , transistors, capacitors and resistors) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit densities. The demands for greater circuit densities necessitate a reduction in the dimensions of the integrated circuit components.
As the dimensions of the integrated circuit components are reduced (e. g., sub-micron dimensions), the materials used to fabricate such components contribute to the electrical performance of such components. For example, low resistivity metal interconnects (e. g., aluminum (Al) and copper (Cu) ) provide conductive paths between the components on integrated circuits. Typically, the metal interconnects are electrically isolated from each other by an insulating material. When the distance between adjacent metal interconnects and/or the thickness of the insulating material has sub-micron dimensions, capacitive coupling potentially occurs between such interconnects. Capacitive coupling between adjacent metal interconnects may cause cross-talk and/or resistance-capacitance (RC)
delay, which degrades the overall performance of the integrated circuit.
In order to minimize capacitive coupling between adjacent metal interconnects, low dielectric constant (low k) insulating materials (e. g., dielectric constants less than about 4.5) are needed. Carbon based materials such as organosilicates (SiOC) , silicon carbide, and benzocyclobutene (BCB) layers, for example, are often used as low dielectric constant (low k) insulating materials on integrated circuits.
In addition, a barrier layer often separates the metal interconnects from the low dielectric constant (low k) insulating materials. The barrier layer minimizes the diffusion of interconnect metal into the insulating material. Diffusion of interconnect metal into the insulating material is undesirable because such diffusion can affect the electrical performance of the integrated circuit, or render it inoperable. Titanium nitride (TiN) , for example, is often used as a barrier layer for copper (Cu) , tungsten (W) , or aluminum (Al) interconnect metallization.
Titanium nitride (TiN) films can be formed using metal-organic chemical vapor deposition (MOCVD) techniques . CVD TiN films are formed by thermally decomposing a titanium based metal-organic precursor. For example, TiN may be formed when tetrakisdimethylami o titanium (abbreviated TDMAT) (Ti (N(CH3)2) 4) , tetrakisdiethylamido titanium (TDEAT) (Ti (N(C2H5)2) 4) , or tetramethylamido titanium (TMAT) (Ti(N(CH3)4) decomposes.
After the titanium nitride (TiN) film is formed, it is typically plasma treated to improve the barrier properties thereof. During this plasma treatment step, ion bombardment of the TiN film may heat the substrate to temperatures greater than about 360 °C.
However, some carbon-based low dielectric constant (low k) insulating materials such as, organosilicates (SiOC) , silicon carbide, and benzocyclobutene (BCB) , for example, can begin to decompose at temperatures greater than about 360 °C, making them incompatible for use with plasma treated titanium nitride (TiN) barrier layers.
Therefore, a need exists in the art for a method of plasma treating titanium nitride (TiN) films, at temperatures that are compatible for use with carbon- based low dielectric constant insulating materials.
SUMMARY OF THE INVENTION
A method of plasma treating titanium nitride (TiN) films at temperatures that are compatible with carbon- based dielectric layers is provided. The titanium nitride (TiN) film is formed by thermally decomposing a titanium based compound on a substrate having a carbon-based dielectric layer thereon. Thereafter, the titanium nitride (TiN) film is plasma treated.
When the titanium nitride (TiN) film is plasma treated, the substrate is maintained at a temperature less than about 360 °C . The substrate is preferably maintained at a temperature less than about 360 °C using a backside gas which conducts heat away from the substrate.
The titanium nitride (TiN) film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the titanium nitride (TiN) film is used as a barrier layer for fabricating integrated circuit structures such as, for example, vias. For such an integrated circuit fabrication process, a preferred process sequence includes providing a substrate having a carbon-based dielectric layer thereon. The carbon-based dielectric layer has vias therein. A titanium nitride (TiN) film is formed on the
dielectric material by thermally decomposing a titanium based compound. Thereafter, the titanium nitride (TiN) film is plasma treated. When the titanium nitride (TiN) film is plasma treated, the substrate is maintained at a temperature less than about 360 °C. The substrate is preferably maintained at a temperature less than about 360 °C using a backside gas to conduct heat away from the substrate. After the titanium nitride (TiN) film is plasma treated, the integrated circuit structure is completed by filling the vias with a conductive material.
BRIEF DESCRIPTION OF THE DRAWINGS
The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:
FIG. 1 depicts a schematic illustration of an apparatus that can be used for the practice of embodiments described herein;
FIG. 2 depicts a schematic illustration of an alternate apparatus including a remote plasma source that can be used for the practice of embodiments described herein; and
FIGS. 3a-3c depict schematic cross-sectional views of an integrated circuit structure at different stages of a fabrication sequence incorporating a titanium nitride (TiN) barrier layer.
DETAILED DESCRIPTION
FIG. 1 is a schematic representation of a wafer processing system 10 that can be used to perform titanium nitride (TiN) film formation in accordance with embodiments described herein. System 10 typically
comprises a process chamber 100, a gas panel 130, a control unit 110, along with other hardware components such as power supplies 106 and vacuum pumps 102. One example of process chamber 100 has been previously described in commonly assigned U. S. patent application Serial No. 09/211,998, entitled "High Temperature Chemical Vapor Deposition Chamber", filed December 14, 1998, and is herein incorporated by reference. The salient features of this system 10 are briefly described below.
Chamber 100
The process chamber 100 generally houses a support pedestal 150, which is used to support a substrate such as a semiconductor wafer 190. The support pedestal 150 can typically be moved in a vertical direction inside the chamber 100 using a displacement mechanism (not shown) .
Depending on the specific process, the wafer 190 can be heated to some desired temperature prior to the titanium nitride (TiN) film deposition. For example, the wafer support pedestal 150 may be heated by an embedded heater element 170. The pedestal 150 can be resistively heated by applying an electric current from an AC power supply 106 to the heater element 170. The wafer 190 is, in turn, heated by the pedestal 150.
A temperature sensor 172, such as a thermocouple, is also embedded in the wafer support pedestal 150 to monitor the temperature of the pedestal 150 in a conventional manner. The measured temperature is used in a feedback loop to control the power supplied to the heater element 170, such that the wafer temperature can be maintained or controlled at a desired temperature which is suitable for the particular process application.
The wafer support pedestal 150 is optionally heated using radiant heat (not shown) .
The support pedestal 150 may also have grooves (not shown) and channels (not shown) on the pedestal surface. Details of a support pedestal 150 including grooves and channels has been disclosed in commonly-assigned U. S. Patent Application, Serial No. 09/398,400, filed on September 14, 1999, entitled "Method of Plasma Processing Tungsten Using a Nitrogen Fluoride/Chloride Chemistry", which is herein incorporated by reference.
Gas from a gas source (not shown) is provided to the backside of the semiconductor wafer through the grooves and channels on the pedestal 150 surface. The backside gas is used to facilitate heat transfer from the semiconductor wafer 190 to the support pedestal 150. For example, during a plasma treatment process, the backside gas may be used to cool the semiconductor wafer 190 to a desired temperature.
A vacuum pump 102, is used to evacuate the process chamber 100 and to maintain the proper gas flows and pressure inside the chamber 100. A showerhead 120, through which process gases are introduced into the chamber 100, is located above the wafer support pedestal 150. The showerhead 120 is coupled to a gas panel 130, which controls and supplies various gases used in different steps of the process sequence.
The showerhead 120 and the wafer support pedestal 150 also form a pair of spaced apart electrodes. When an electric field is generated between these electrodes, the process gases introduced into the chamber 100 are ignited into a plasma. Typically, the electric field is generated by connecting the wafer support pedestal 150 to a source of radio frequency (RF) power (not shown) through a matching network (not shown) . Alternatively, the RF power source and matching network
may be coupled to the showerhead 120, or coupled to both the showerhead 120 and the wafer support pedestal 150.
Plasma enhanced chemical vapor deposition (PECVD) techniques promote excitation and/or disassociation of the reactant gases by the application of the electric field to the reaction zone near the substrate surface, creating a plasma of reactive species . The reactivity of the species in the plasma reduces the energy required for a chemical reaction to take place, in effect lowering the required temperature for such (PECVD) processes.
Proper control and regulation of the gas flows through the gas panel 130 is performed by mass flow controllers (not shown) and the controller unit 110. The showerhead 120 allows process gases from the gas panel 130 to be uniformly introduced and distributed in the process chamber 100.
Illustratively, the control unit 110 comprises a central processing unit (CPU) 113, support circuitry 114, and memories containing associated control software 116. The control unit 110 is responsible for automated control of the numerous steps required for wafer processing - such as wafer transport, gas flow control, RF power control, temperature control, chamber evacuation, and other steps. Bi-directional communications between the control unit 110 and the various components of the wafer processing system 10 are handled through numerous signal cables collectively referred to as signal buses 118, some of which are illustrated in FIG. 1.
The central processing unit (CPU) 113 may be one of any form of general purpose computer processor that can be used in an industrial setting for controlling process chambers as well as sub-processors. The computer may use any suitable memory, such as random access memory, read only memory, floppy disk drive, hard drive, or any other form of digital storage, local or remote. Various support
circuits may be coupled to the CPU for supporting the processor in a conventional manner. Process sequence routines as required may be stored in the memory or executed by a second CPU that is remotely located.
The process sequence routines are executed after the substrate 190 is positioned on the wafer support pedestal 150. The process sequence routines, when executed, transform the general purpose computer into a specific process computer that controls the chamber operation so that the deposition process is performed. Alternatively, the chamber operation may be controlled using remotely located hardware, as an application specific integrated circuit or other type of hardware implementation, or a combination of software or hardware.
Optionally, a remote plasma source 150 may be coupled to wafer processing system 10, as shown in FIG. 2, to provide a remotely generated plasma to the process chamber 100. The remote plasma source 150 includes a gas supply 153, a gas flow controller 155, a plasma chamber 151, and a chamber inlet 157. The gas flow controller 155 controls the flow of process gas from the gas supply 153 to the plasma chamber 151.
A remote plasma may be generated by applying an electric field to the process gas in the plasma chamber 151, creating a plasma of reactive species. Typically, the electric field is generated in the plasma chamber 151 using a RF power source (not shown) . The reactive species generated in the remote plasma source 150 are introduced into the process chamber 100 through inlet 157.
Titanium Nitride (TiN) Layer Formation
FIGS. 3a-3c illustrate an integrated circuit structure at different stages of a fabrication sequence.
incorporating a plasma treated titanium nitride (TiN) barrier layer formed on a carbon-based dielectric layer. In general, the substrate 200 refers to any workpiece upon which film processing is performed, and a substrate structure 250 is used to generally denote the substrate 200 as well as other material layers formed on the substrate 200.
Depending on the specific stage of processing, the substrate 200 may be a silicon semiconductor wafer, or other material layer, which has been formed on the wafer. FIG. 3a, for example, shows a cross-sectional view of a substrate structure 250, having a material layer 202 thereon. In this particular illustration, the material layer 202 may be an oxide (e. g., silicon dioxide). The oxide layer 202 has been conventionally formed.
A carbon-based dielectric layer 204 is formed on the oxide layer 202. The carbon-based dielectric layer 204 may be, for example, an organosilicate (SiOC) , silicon carbide (SiC) , or benzocyclobutene (BCB) , among others. The carbon-based dielectric layer 204 has been conventionally formed and patterned to provide a contact hole 204H having sidewalls 204S, and extending to the top surface 202T of the oxide layer 202.
FIG. 3b depicts a titanium nitride (TiN) layer 206 formed on the substrate structure 250 of FIG. 3a. The titanium nitride (TiN) layer 206 is formed by thermally decomposing a titanium based compound such as a titanium based metal organic precursor. The titanium based metal organic precursor may be selected, for example, from the group of tetrakisdimethylamido titanium (abbreviated TDMAT) (Ti (N(CH3) 2)4) tetramethylamido titanium (TMAT) (Ti (N(CH3)4) , or tetrakisdiethylamido titanium (TDEAT) (Ti (N(C2H5)2) 4) , among others.
Carrier gases such as hydrogen (H2) , helium (He) , argon (Ar) , nitrogen (N2) , neon (Ne) , and xenon (Xe) ,
among others, may be mixed with the titanium based metal organic precursor.
In general, the following deposition process parameters can be used to form the titanium nitride (TiN) layer in a deposition chamber similar to that shown in FIGS . 1 or 2. The process parameters range from a wafer temperature of about 40 °C to about 85 °C, a chamber pressure of about 0.1 torr to about 5 torr, a titanium based metal organic precursor flow rate of about 1 seem to about 100 seem, and a carrier gas flow rate of about 400 seem to about 600 seem. The above process parameters provide a deposition rate for the titanium nitride (TiN) layer in a range of about 100 A/min to about 700 A/min when implemented on a 200 mm (millimeter) substrate in a deposition chamber available from Applied Materials, Inc., located in Santa Clara, California.
Other deposition chambers are within the scope of the invention, and the parameters listed above may vary according to the particular deposition chamber used to form the titanium nitride (TiN) layer. For example, other deposition chambers may have a larger (e. g., configured to accommodate 300 mm substrates) or smaller volume, requiring gas flow rates that are larger or smaller than those recited for deposition chambers available from Applied Materials, Inc.
The thermal decomposition of the titanium based metal organic precursor advantageously forms titanium nitride (TiN) layers with good step coverage. The thickness of the titanium nitride (TiN) layer 206 is variable depending on the specific stage of processing. Typically, the titanium nitride (TiN) layer 206 is deposited to a thickness of about 35 A to about 200 A.
After the titanium nitride (TiN) layer 206 is formed on the carbon-based dielectric layer 204, it is plasma treated. The titanium nitride (TiN) layer 206 is
preferably plasma treated with one or more gases selected from the group of hydrogen (H2) , nitrogen (N2) , helium (He) , argon (Ar) , xenon (Xe) , neon (Ne) , and silane (SiH4) , among others.
In general, the following process parameters can be used to plasma treat the titanium nitride (TiN) layer 204 in a process chamber similar to that shown in FIGS. 1 or 2. The process parameters range from a wafer temperature of less than about 360 °C, a chamber pressure of about 2 torr to about 5 torr, a gas flow rate of about 200 seem to about 500 seem, and a radio frequency (RF) power of about 600 watts to about 800 watts. The titanium nitride (TiN) layer 206 is plasma treated for less than about 60 seconds .
While the titanium nitride (TiN) layer is plasma treated, the substrate is maintained at a temperature less than about 360 °C using a backside gas. The backside gas is provided through grooves and channels on the wafer support pedestal, over which the substrate is positioned. The backside gas facilitates heat transfer from the substrate to the wafer support pedestal, so as to maintain such substrate in a desired temperature range.
The backside gas may be selected from the group of nitrogen (N2) , helium (He) , argon (Ar) , neon (Ne) , xenon (Xe) , among others. The backside gas is typically provided at a flow rate of about 200 seem to about 2000 seem.
The plasma treatment of the titanium nitride (TiN) layer 206 is believed to reduce the number of carbon- based impurities incorporated therein from the metal- organic precursors . Reducing the number of carbon-based impurities reduces the resistivity of the as-deposited layer. Additionally, the plasma treatment is believed to stabilize the TiN layer in that it becomes less reactive with moisture and/or oxygen under atmospheric conditions.
Referring to FIG. 3c, after the titanium nitride (TiN) layer 206 is deposited and plasma treated, the holes 204H are filled with a conductive material 208 such as, for example, aluminum (Al) , copper (Cu) , tungsten (W) , and combinations thereof, among others. The conductive material 208 may be deposited using chemical vapor deposition (CVD) , physical vapor deposition (PVD) , electroplating, or combinations thereof.
Although several preferred embodiments which incorporate the teachings of the present invention have been shown and described in detail, those skilled in the art can readily devise many other varied embodiments that still incorporate these teachings.
Claims
1. A method of film deposition for integrated circuit fabrication, comprising: positioning a substrate in a process chamber, wherein the substrate has a carbon-based dielectric layer thereon; forming a titanium nitride (TiN) layer on the carbon- based dielectric layer; and plasma treating the titanium nitride (TiN) layer, wherein the substrate is maintained at a temperature less than about 360 °C during plasma treatment.
2. The method of claim 1 wherein the carbon-based dielectric layer is selected from the group of organosilicates (SiOC) , silicon carbide, and benzocyclobutene (BCB) .
3. The method of claim 1 wherein the titanium nitride (TiN) layer is formed on the carbon-based dielectric layer by providing a gas mixture to the process chamber, wherein the gas mixture comprises a titanium based compound; and thermally decomposing the titanium based compound to form a titanium nitride (TiN) layer on the carbon-based dielectric layer.
4. The method of claim 3 wherein the titanium-based compound is a titanium based metal-organic precursor.
5. The method of claim 4 wherein the titanium based metal- organic precursor is selected from the group of tetrakisdimethylamido titanium (abbreviated TDMAT)
(Ti (N(CH3)2)4) or tetramethylamido titanium (TMAT) (Ti (N(CH3)4) , tetrakisdiethylamido titanium (TDEAT) (Ti (N(C2H5)2)4) , and combination thereof.
6. The method of claim 4 wherein the titanium based metal organic precursor is provided to the process chamber at a flow rate in a range of about 1 seem to about 100 seem.
7. The method of claim 3 wherein the process chamber is maintained at a pressure in a range of about 0.1 torr to about 5 torr.
8. The method of claim 3 wherein the process chamber is maintained at a temperature in a range of about 40 °C to about 85 °C.
9. The method of claim 3 wherein the gas mixture further comprises a carrier gas.
10. The method of claim 9 wherein the carrier gas is selected from the group of helium (He) , nitrogen (N2) , hydrogen (H2) , argon (Ar) , xenon (Xe) , neon (Ne) , and combinations thereof .
11. The method of claim 9 wherein the carrier gas is provided to the process chamber at a flow rate in a range of about 400 seem to about 600 seem.
12. The method of claim 1 wherein the plasma is generated by providing a gas mixture to the process chamber; and applying an electric field to the gas mixture in the process chamber to generate the plasma.
13. The method of claim 12 wherein the gas mixture comprises one or more gases selected from the group of hydrogen (H2) , argon (Ar) , helium (He), nitrogen (N2) , xenon
(Xe) , neon (Ne) , silane (SiH4) , and combinations thereof.
14. The method of claim 13 wherein the gas mixture comprises nitrogen (N2) and hydrogen (H2) in a ratio of about 2 N2 : 3 H2.
15. The method of claim 12 wherein the gas mixture is provided to the process chamber at a flow rate in a range of about 200 seem to about 500 seem.
16. The method of claim 12 wherein the electric field is a radio frequency (RF) power.
17. The method of claim 16 wherein the RF power is in a range of about 600 watts to about 800 watts.
18. The method of claim 12 wherein the process chamber is maintained at a pressure of .about 2 torr to about 5 torr.
19. The method of claim 1 wherein the titanium nitride (TiN) layer is plasma treated for less than about 60 seconds .
20. The method of claim 1 wherein the substrate is maintained at a temperature of less than about 360 °C by providing a backside gas to a region of the process chamber adjacent to the substrate such that the backside gas conducts heat away from the substrate during plasma treatment .
21. The method of claim 20 wherein the backside gas comprises one or more gases selected from the group of nitrogen (N2) , helium (He) , argon (Ar) , neon (Ne) , xenon
(Xe) , and combinations thereof.
22. The method of claim 20 wherein the backside gas is provided to the process chamber at a flow rate in a range of about 200 seem to about 2000 seem.
23. A computer storage medium containing a software routine that, when .executed, causes a general purpose computer to control a process chamber using a layer deposition method, comprising: positioning a substrate in a process chamber, wherein the substrate has a carbon-based dielectric layer thereon; forming a titanium nitride (TiN) layer on the carbon- based dielectric layer; and plasma treating the titanium nitride (TiN) layer, wherein the substrate is maintained at a temperature less than about 360 °C during plasma treatment.
24. The computer storage medium of claim 23 wherein the carbon-based dielectric layer is selected from the group of organosilicate (SiOC) , silicon carbide, benzocyclobutene (BCB) , and combinations thereof.
25. The computer storage medium of claim 23 wherein the titanium nitride (TiN) layer is formed on the carbon-based dielectric layer by providing a gas mixture to the process chamber wherein the gas mixture comprises a titanium based compound; and thermally decomposing the titanium based compound to form a titanium nitride (TiN) layer on the carbon-based dielectric layer.
26. The computer storage medium of claim 25 wherein the titanium based compound is a titanium based metal-organic precursor.
27. The computer storage medium of claim 26 wherein the titanium based metal-organic precursor is selected from the group of tetrakisdimethylamido titanium (abbreviated TDMAT) (Ti (N(CH3)2)4) or tetramethylamido titanium (TMAT)
(Ti (N(CH3)4) , tetrakisdiethylamido titanium (TDEAT) (Ti (N(C2HS)2) 4) , and combination thereof.
28. The computer storage medium of claim 26 wherein the titanium-based metal-organic precursor is provided to the process chamber at a flow rate in a range of about 1 seem to about 100 seem.
29. The computer storage medium of claim 25 wherein the process chamber is maintained at a pressure in a range of about 0.1 torr to about 5 torr .
30. The computer storage medium of claim 25 wherein the process chamber is maintained at a temperature in a range of about 40 °C to about 85 °C.
31. The computer storage medium of claim 25 wherein the gas mixture further comprises a carrier gas.
32. The computer storage medium of claim 31 wherein the carrier gas is selected from the group of helium (He) , nitrogen (N2) , hydrogen (H2) , argon (Ar) , xenon (Xe) , neon
(Ne) , and combinations thereof.
33. The computer storage medium of claim 31 wherein the carrier gas is provided to the process chamber at a flow rate in a range of about 400 seem to about 600 seem.
34. The computer storage medium of claim 24 wherein the plasma is generated by providing a gas mixture to the process chamber; and applying an electric field to the gas mixture in the process chamber to generate the plasma.
35. The computer storage medium of claim 34 wherein the gas mixture comprises one or more gases selected from the group of hydrogen (H2) , argon (Ar) , helium (He) , nitrogen (N2) , xenon (Xe) , neon (Ne) , silane (SiH4) , and combinations thereof.
36. The computer storage medium of claim 35 wherein the gas mixture comprises nitrogen (N2) and hydrogen (H2) in a ratio of 2 N2 : 3 H2.
37. The computer storage medium of claim 34 wherein the gas mixture is provided to the process chamber at a flow rate in a range of about 200 seem to about 500 seem.
38. The computer storage medium of claim 34 wherein the electric field is a radio frequency (RF) power.
39. The computer storage medium of claim 38 wherein the RF power is in a range of about 600 watts to about 800 watts.
40. The computer storage medium of claim 34 wherein the process' chamber is maintained at a pressure of about 2 torr to about 5 torr.
41. The computer storage medium of claim 23 wherein the titanium nitride (TiN) layer is plasma treated for less than about 60 seconds.
42. The computer storage medium of claim 22 wherein the substrate is maintained at a temperature of less than about 360 °C by providing a backside gas to a region of the process chamber adjacent to the substrate such that the backside gas conducts heat away from the substrate during plasma treatment .
43. The computer storage medium of claim 42 wherein the backside gas comprises one or more gases selected from the group of nitrogen (N2) , helium (He) , argon (Ar) , neon (Ne) , xenon (Xe) , and combinations thereof.
44. The computer storage medium of claim 42 wherein the backside gas is provided to the process chamber at a flow rate in a range of about 200 seem to about 2000 seem.
45. A method of forming a device, comprising: providing a substrate having a carbon-based dielectric layer thereon, wherein the carbon-based dielectric layer has vias therein; forming a titanium nitride (TiN) layer on the carbon- based dielectric layer; plasma treating the titanium nitride (TiN) layer, wherein the substrate is maintained at a temperature less than about 360 °C during plasma treatment; and filling the vias with a conductive material.
46. The method of claim 45 wherein the conductive material filling the vias has a resistivity less than about 10 μΩ-cm (microohms-centimeters) .
47. The method of claim 45 wherein the conductive material filling the vias is selected from the group of copper (Cu) , aluminum (Al) , tungsten (W) , and combinations thereof.
48. The method of claim 45 wherein the dielectric layer is selected from the group of organosilicate (SiOC) , silicon carbide, benzocyclobutene (BCB) , and combinations thereof.
49. The method of claim 45 wherein the titanium nitride (TiN) layer is formed on the carbon-based dielectric layer by positioning the substrate in a process chamber; providing a gas mixture to the process chamber wherein the gas mixture comprises a titanium based compound; and thermally decomposing the titanium based compound to form a titanium nitride (TiN) layer on the carbon-based dielectric layer.
50. The method of claim 49 wherein the titanium based compound is a titanium based metal-organic precursor.
51. The method of claim 50 wherein the titanium based metal-organic precursor is selected from the group of tetrakisdimethylamido titanium (abbreviated TDMAT) (Ti (N(CH3)2)4) or tetramethylamido titanium (TMAT)
(Ti (N(CH3) 4) , tetrakisdiethylamido titanium (TDEAT) (Ti (N(C2H5) 2) 4) , and combination thereof.
52. The method of claim 50 wherein the titanium-based metal-organic precursor is provided to the process chamber at a flow rate in a range of about 1 seem to about
100 seem.
53. The method of claim 49 wherein the process chamber is maintained at a pressure in a range of about 0.1 torr to about 5 torr.
54. The method of claim 49 wherein the process chamber is maintained at a temperature in a range of about 40 °C to about 85 °C.
55. The method of claim 49 wherein the gas mixture further comprises a carrier gas.
56. The method of claim 55 wherein the carrier gas is selected from the group of helium (He) , nitrogen (N2) , hydrogen (H2) , argon (Ar) , xenon (Xe) , neon (Ne) , and combinations thereof.
57. The method of claim 55 wherein the carrier gas is provided to the process chamber at a flow rate in a range of about 400 seem to about 600 seem.
58. The method of claim 45 wherein the plasma is generated by providing a gas mixture to the process chamber; and applying an electric field to the gas mixture in the process chamber to generate the plasma.
59. The method of claim 58 wherein the gas mixture comprises one or more gases selected from the group of hydrogen (H2) , argon (Ar) , helium (He) , nitrogen (N2) , xenon
(Xe) , neon (Ne) , silane (SiH4) , and combinations thereof.
60. The method of claim 59 wherein the gas mixture comprises nitrogen (N2) and hydrogen (H2) in a ratio of about 2 N2 : 3 H2.
61. The method of claim 58 wherein the gas mixture is provided to the process chamber at a flow rate in a range of about 200 seem to about 500 seem.
62. The method of claim 58 wherein the electric field is a radio frequency (RF) power.
63. The method of claim 62 wherein the RF power is in a range of about 600 watts to about 800 watts.
64. The method of claim 58 wherein the process chamber is maintained at a pressure of about 2 torr to about 5 torr.
65. The method of claim 45 wherein the titanium nitride (TiN) layer is plasma treated for less than about 60 seconds .
66. The method of claim 45 wherein the substrate is maintained at a temperature of less than about 360 °C by providing a backside gas to a region of the process chamber adjacent to the substrate such that the backside gas conducts heat away from the substrate during plasma treatment .
67. The method of claim 66 wherein the backside gas includes one or more gases selected from the group of nitrogen (N2) , helium (He) , argon (Ar) , neon (Ne) , xenon (Xe) , and combinations thereof.
68. The method of claim 66 wherein the backside gas is provided to the process chamber at a flow rate in a range of about 200 seem to about 2000 seem.
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US7695765B1 (en) | 2004-11-12 | 2010-04-13 | Novellus Systems, Inc. | Methods for producing low-stress carbon-doped oxide films with improved integration properties |
US8247332B2 (en) | 2009-12-04 | 2012-08-21 | Novellus Systems, Inc. | Hardmask materials |
US9502493B2 (en) | 2014-02-26 | 2016-11-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multi-step method of forming a metal film |
US9847221B1 (en) | 2016-09-29 | 2017-12-19 | Lam Research Corporation | Low temperature formation of high quality silicon oxide films in semiconductor device manufacturing |
CN111793519B (en) * | 2020-07-06 | 2022-09-13 | 安徽省赛威输送设备有限公司 | Degradable lubricating oil for conveyor |
CN117215153B (en) * | 2023-11-09 | 2024-02-27 | 粤芯半导体技术股份有限公司 | Photoresist coating method and device for wafer, electronic equipment and storage medium |
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US5969425A (en) * | 1997-09-05 | 1999-10-19 | Advanced Micro Devices, Inc. | Borderless vias with CVD barrier layer |
JP3271757B2 (en) * | 1999-03-01 | 2002-04-08 | 日本電気株式会社 | Method for manufacturing semiconductor device |
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