WO1999002997A2

WO1999002997A2 - Dc and ac current sensor with discontinuous sampling

Info

Publication number: WO1999002997A2
Application number: PCT/IB1998/001034
Authority: WO
Inventors: Wen-Jian Gu; Nai-Chi Lee
Original assignee: Koninklijke Philips Electronics N.V.; Philips Norden Ab
Priority date: 1997-07-08
Filing date: 1998-07-06
Publication date: 1999-01-21
Also published as: WO1999002997A3

Abstract

Current is sensed by a circuit which provides a high frequency reversing voltage to a sensing winding on a current transformer, for driving the transformer into its linear region once per cycle of applied voltage. Current through the sensing winding is sampled while the transformer is in that linear region. After taking a current sample application of the reversing voltage, sensor power consumption is reduced by inhibiting the application of voltage to the sensing winding for one or more of the high frequency cycles, or the same control and sensing circuitry is used to cause application of reversing voltage to a sensing winding on a different transformer measuring current through a different conductor, such as in a polyphase arrangement or for monitoring ground fault current. Preferably, the current is sampled approximately at the instants of reversal of the voltage being applied to the sensing winding, and the sample having the lower absolute value is selected as a sample proportional to the line current.

Description

DC and AC current sensor with discontinuous sampling

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is an improvement over co-pending application Ser. No. 08/366,150 filed Dec. 28. 1994 by Wen-Jian Gu for DC and AC Current Sensor Having a Minor-loop Operated Current Transformer, assigned to the assignee of the instant application.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to devices and circuits for "non-contacting" measurement of current, whose output is an electrical signal which is isolated electrically from the conductor whose current is being sensed; and more particularly to such a sensor which can measure both DC and AC currents.

2. Description of the Prior Art

The non-contacting current sensor described in co-pending application Ser. No. 08/366,150 filed Dec. 28. 1994 (hereinafter the '150 application) uses a simple 2-winding current transformer having a magnetizing path like that shown in Fig. 2. One winding is a line current winding, which may simply be a line conductor passing through the core opening, or may be a multi-turn winding. A sensing winding, on the same core, is energized by a reversing voltage source, such as a square wave, at a frequency higher than any frequency component of the line current to be measured.

As would be expected by one of ordinary skill to whom that invention is described, when the line current is zero the sensing current i_s waveform will be a triangular wave whose peaks occur at the switching instants of the square wave. In this zero line current situation, the sensing current i_s is symmetrical and insignificant. The flux in the core varies from points a to c within the unsaturated flux range, about its midpoint b.

When a significant line current is passed through the line winding, and the reversing voltage has a polarity which causes core flux to increase in the direction caused by the line current, the core flux rises to or above the saturation value B_s. The current through the sensing winding, or coil, will then rise to a very high value. When the voltage applied to the sensing winding is reversed, because the inductance of the saturated core is low, the current through the sensing winding will drop sharply to zero, reverse direction, and rise until the product of sensing winding turns times sensing current becomes nearly equal to the product of line current times line winding turns. When the net ampere turns falls below H_s, and the flux approaches the value c, the sensing current will remain virtually unchanged until after the applied voltage has reversed again.

According to the invention disclosed in the '150 application, if the sensing current is sampled at the instants of voltage switching, the lower (absolute magnitude) of the two sensing current samples will be an accurate measure of the line current.

SUMMARY OF THE INVENTION

An object of the invention is to measure current with a non-contacting electronic/magnetic sensor accurately from DC to high frequencies, using circuitry with a very low power consumption. Another object of the invention is to provide a sensor arrangement which can measure single phase line currents with high relative accuracy to permit computation of ground fault currents when a ground fault current transformer cannot be used.

A further object of the invention is to provide an inexpensive current sensor which can measure unbalanced polyphase currents accurately. Yet another object of the invention is to provide a compact, low power consumption polyphase current sensor.

According to the invention, line current is sensed by a circuit which provides a repetitively reversing voltage to a sensing winding or coil on a current transformer, sufficient to drive the transformer from saturation due to line current into its linear region at least once per reversing cycle. Current in the sensing winding for one polarity of the voltage causes current to flow aiding the flux due to any line current then flowing. If the line current is appreciable, the transformer core is already in, or is driven into, saturation. Upon reversing the voltage applied to the sensing winding, the direction of sensing current is reversed and rises to a value sufficient to bring the transformer flux below the saturation level, thus creating a minor loop. After the sensing current has been sampled while in the minor loop condition, during at least the next cycle the application of voltage to this sensing winding is inhibited.

Current through the sensing winding is sampled twice during one cycle of the reversing voltage, at each instant of voltage reversal, thereby assuring that one sample is obtained while the core is unsaturated. Preferably, to ensure that the core and circuit operation are stabilized, the current is sampled initially at the instants of the third and fourth successive reversals of the voltage being applied to the sensing winding, and the sample having the lower absolute value is selected as a sample proportional to the line current. Application of the reversing voltage to that sensing winding is then inhibited for a period of time greater than two or three times the duration between two successive reversals. Preferably the delay is selected such that the next applied cycle of reversing voltage starts with a half cycle in the direction which had produced the previous lower absolute value. Use of the invention does not require that the repetitive reversals be equally spaced in time, or that they occur in a predictable pattern, or that the applied voltage be constant between reversals. It is merely necessary that the sampling occur such that one sample is taken while the core is unsaturated However, in order to assure that current components up to a certain frequency are sensed, the samples must be taken at a higher frequency than any of the current components. For ease in designing, constructing and calibrating a current censor, it is preferable that the reversals occur at a relatively high frequency, for example in synchronization with a digital clock or a regular high frequency waveform, having a frequency at least four times the frequency of the highest frequency current component which is to be measured.

According to one aspect of the invention, the current consumption of the sensor can be reduced in proportion to the duty cycle of application of the high frequency voltage to the sensor. For example, if the highest current component of interest is at 5 kHz, and a current sensing system operating at 40 kHz is available, inhibiting current through the sensing winding every other cycle will reduce sensor power consumption with little loss of accuracy, because current will be driven through the winding only about half the time. To the contrary, if the clock frequency were reduced to 20 kHz, the accuracy of sensing would be the same but the sensor power consumption will nearly double compared to the 50% duty cycle at 40 kHz; alternatively, high frequency accuracy can be reduced and a reduced duty cycle will save power.

Further, unlike the circuit of U.S. patent 4,276,510, current in the sensing winding does not flow continuously at the frequency of the line current being mirrored, so that sensor current consumption is further reduced.

In a preferred embodiment of the invention, a plurality of sensing windings are provided, each on a respective transformer core linked by a respective conductor of a multiconductor electrical supply. A control circuit applies the high frequency source and resulting sensing current successively to each of the sensing windings. This enables one high frequency generator and sensing electronics to read the current in each conductor.

One application of the invention can be in the field of ground fault detection. The use of two current sensing devices according to the prior art would usually not provide sufficient accuracy of current measurement, because it is necessary to sense a very small difference between two comparatively large currents. Typical calibration inaccuracies of the current sensing devices would introduce errors far greater than the permissible ground fault current. However, according to the invention, in a conventional two- wire single phase circuit, identical sensing windings can be placed around each of the two conductors, and sensing current through a single sensing resistor is applied alternately, in different cycles of voltage reversal, to each of the two sensing windings. The voltage across the single sensing resistor is sampled for each of the flows of sensing current and processed in a single set of electronic circuits. The imperfect calibration of the current driver and sensing electronics introduces an equal error in measurement of the two conductor currents, so that a small difference between two large currents is accurately measured. To maximize accuracy and minimize power consumption, measurement of both lines can be made once during eight clock cycles, with no more than one no-voltage clock cycle between measurement of the first line current and first application of voltage to the other sensing winding.

A three-phase circuit is conveniently measured by providing a sensing winding in each of the three line conductors; and if a four- wire wye system is being used, a fourth transformer core and sensing winding is provided. If the multiplexer switches connection every other cycle of the high frequency, a current sample of each respective conductor is obtained once in each eight cycles of the high frequency. A very efficient use of the circuitry is obtained, while current components at high harmonic frequencies in the line can be accurately measured.

Alternatively, a three-phase system can operate at a lower clock frequency, and the multiplexer can switch connections for each cycle of the high frequency. This still enables measurement of all three or four currents with the same power consumption as would be used, according to the prior art, to measure one.

BRIEF DESCRIPTION OF THE DRAWING

Fig. 1 is a simplified schematic diagram of a sensor according to the invention, Fig. 2 shows the magnetizing path followed along the B-H curve for zero line current, Fig. 3 is a graph of voltage and sensing current waveforms for a device with discontinuous sampling,

Fig. 4 is a more detailed schematic diagram of the sensor of Fig. 1, Fig. 5 is a schematic diagram of a multi-pole current sensor, and Fig. 6 is a schematic diagram of a different embodiment of a multi-pole current sensor.

DESCRIPTION OF THE PREFERRED EMBODIMENT

The current sensor 10, considered in simplified form, has only four elements: a driver 12 which is a square wave or other reversing voltage source responsive to a timing control 20, a sensing resistor R_s, a current transformer 15, and a sampler 19 also responsive to the timing control 20 for providing a current signal. The current transformer 15 has a core 16 made of a material suitable for a linear current transformer, a line winding 17 through which line current i_B flows, and a sensing winding 18 through which a sensing current i_s flows. The voltage source 12, DC blocking capacitor C_b, sensing resistor R_s and line winding 17 of the current transformer 15 are connected in series.

The square wave voltage source is operated at a frequency HF which is at least twice, and preferably four times, that of the highest frequency component of line current which it is desired to measure, and has a peak voltage which, when the line current is zero, causes the core flux to vary over a range ΔB as shown in Fig. 2. This range is selected such that the flux values at times a and c are less than the value B_s at which the core begins to saturate. To provide high accuracy of current sensing and sensitivity to small line currents, it is desirable that the required field intensity H_s to produce the saturation flux B_s be as small as possible. This requires the core 16 should have a high permeability. High sensitivity also requires that ΔB be small. However, if it is desired to be able to measure very large line currents, such as extreme overcurrents flowing through a circuit breaker, then ΔB should be larger, for example sufficient to cover a range of + 0.8 B_s when line current is zero.

The element unique to the instant invention is shown schematically in Fig. 1. The timing control 20 not only controls the instant of sampling by the sampler 19, but also inhibits the reversing voltage source or driver 12 for certain time periods.

Fig. 3 is a timing chart including clock, voltage and sensing current waveforms produced by the circuit of Fig. 4. The timing control 20 of Fig. 1 contains circuits, all individually well known, for controlling the timing and inhibition of the repetitively reversing voltage from the driver 12. For simplicity and economy, all switching and sampling is performed under control of the signals from a digital clock 21. The clock signal is provided to a flip-flop 21 whose output signals Q_j and Q_j are supplied to AND gates 23 and 24, whose output signals are the trigger signals for the driver 12. The output Qi is also provided as an input to a counter 25 whose outputs Q₂ and Q₃ are provided to a delay controller 26 and AND-gate 27, respectively. The output Q₂ of the counter 25 stays high for four clock periods, and provides an enable signal to the delay controller 26, during which the flip-flop 22 goes through two full cycles.

The output Q₃ of the counter 25 stays high for two clock periods, and provides an enable signal to an AND-gate 27, whose other input is the clock signal. The signal Q₄ from the gate 27 is thus two successive cycles of the clock signal, which are first inputs to AND-gates 28, 29. The other inputs to the AND-gates 28, 29 respectively, are the signals Q_! and Q_j from the clock 21. This produces signals and Q₆ from the gates 28, 29 which will cause sampling of the current signal at two successive clock cycles. The first function of the timing control 20 is triggering of the reversing signal driver 12. The output Q₇ of delay controller 26 turns the driver 12 on for two full clock cycles. The driver 12 includes four power switching transistors Q_A - Q_D in a full bridge configuration. In the non-delay mode, shown by the voltage signal 31, first signal Q, and Q₇ being high, the output signal of AND-gate 23 turns on half-bridge driver 33, which then turns transistor Q_A on. At the same time, AND-gate 24 receives a low signal on input Q_{1 ?} and this causes the other half-bridge driver 34 to turn on transistor Q_c. At the instant of the next clock cycle, the flip-flop 22 flips, reversing the signals Q₂ and Q so that the two half- bridge drivers switch the polarity of the voltage v^. As will be clear to those of ordinary skill, transistors Q_A and Q_B alternately connect a node A to the supply voltage V_c and to ground, and transistors Q_c and Q_D alternately connect a node B to ground and to the supply voltage V_c.

As shown in Fig. 4, line winding 17 of the current transformer 15 and sensing resistor R_s are connected in series between the nodes A and B. This causes the node voltage A - B to be applied to drive the sensing current i_s (curve 35 of Fig. 3) through the winding 17. The voltage across the sensing resistor is a measure of the current, and is applied to the inputs of a differential amplifier 36.

The output of differential amplifier 36 is applied to sampling hold circuits 37, 38. Each of these samples the current at the instant of the respective signal Qs and Q₆ from the gates 28, 29, and holds the value until the next sampling. These samples are inputs to an analog signal selector 39, which selects the smaller sample signal and provides it as the sensor output. Thus when line current is positive, sampling of the curve 35 at the pulse shown as Q₅ is the instant curve 31 switches from positive to negative, and provides an accurate measure of the current, while the sample at the instant Q₆ occurs when the core 16 is saturated. The analog signal selector also provides a signal to the delay controller 26 if the larger signal precedes the smaller signal (indication that the line current is negative). This causes the delay controller to delay the next signal Q₇ by one clock cycle (curve 41), so that the next cycle of reversing voltage will start with opposite polarity (curve 42). The pulses Q₄, Q₅ and Q₆ will also be delayed one clock cycle, thereby delaying the following samplings. As shown by curve 43, because of the delay the measurement of a negative current will again start with the smaller current sample, one clock cycle after one cycle of the reversing voltage.

To implement this circuit, general purpose logic IC's such as those having generalized type numbers 4016 or 4066, from many different sources, may be used. If a positive output is desirable, indicative of the absolute value of the current, then a summing amplifier or analog adder can be used instead of difference amplifier 36. Alternatively, an analog data selector IC such as type 4529 can be used instead of the analog switches and amplifiers shown in Fig. 4, to provide a positive output.

Multi-conductor sensing

The current sensor of Fig. 5 permits measuring three line currents, such as those in a three phase circuit, with far less circuitry and far less power consumption than having three current sensors such as described in the '150 patent application. This embodiment includes four half-bridge drivers, each controlling one pair of power switching transistors.

Those of ordinary skill will recognize that the symmetry of the arrangement is such that, using the 4: 1 reduction of the Fig. 4 embodiment, the sensing resistor can be sampled during the second of two cycles of voltage application while still preserving the delay function such that current is sensed during the third and fourth half-cycles of voltage application. At any instant of time in a balanced 3-phase power arrangement, two line currents have one polarity (or one is approximately zero) and one has the other. Thus, in any sequence of 16 clock cycles, four are used for one phase, four are used for a second phase, four are used for the third phase, and four are available as resting periods when little power is consumed, or for transitions from positive to negative (the delay of Q₇). Fig. 5 shows four half-bridge drivers 133, 233, 333, 433 which are identical, and each drive a transistor pair Q_A, Q_B connected between a common supply voltage V_c and ground. Each half-bridge driver produces three output states: one of the switching transistors on and the other off, the one switching transistor off and the other on, and both transistors off so that the node is floating in a high impedance state.

The four transistor pairs define nodes P_T - P₄. A single sensing resistor R_s is connected between node P₄ and a node P_s. A first sensing winding 117 is connected between nodes P₁ and P_s and identical sensing windings 217, 317 are connected between the other nodes and node P_s, such that each sensing winding has a respective terminal connected to a terminal of the sensing resistor. Each half-bridge driver has two inputs, which are connected to respective outputs of a logic control and timing circuit 120, which is timed by a clock 21. For a given sequence of four clock periods, the half-bridge driver 433 and a selected one of the other half bridge drivers cause a sequence of two cycles of reversing voltage to be established between node P₄ the corresponding other node P_j - P₃, so that a sensing current i_≤L is₂ ^or is₃ flows through the corresponding sensing winding and sensing resistor R_s. The control logic circuit 120 also controls a sampling circuit 51, a demultiplexer 52, and three sample holding circuits 155, 255, 355. The circuit 51 performs the amplification function of amplifier 36, the sampling hold functions of circuit elements 37 and 38, and selector function of analog signal selector 39 of Fig. 4, to provide a time division demultiplexed output to the demultiplexer 52, which in turn provides line current signals to the three holding circuits 155 - 355.

It will be clear that an increase in the measurement rate, for a given clock frequency, can be obtained if only two clock cycles are used to make a measurement and no clock cycles are skipped without voltage application. This eliminates the delay function of Q₇. By considering the last current reading for a given conductor, the polarity of current for this reading can be predicted. By reversing the control of the half-bridge drivers, it can be assured that the first polarity of excitation is in the direction of saturation, and the second polarity produces operation in the minor loop, with a valid current reading. Alternatively, the actual current reading may be considered to be the smaller one, and may occur at the end of the first or the second clock cycle for that cycle of applied reversing voltage. With either of these methods of operating the circuit, a full set of three phase readings can be taken and repeated once every six clock cycles.

In the embodiment of Fig. 5 the driver 433 and its associated power switching transistors are active for sensing current through all the current transformers. Therefore average power dissipation from them will be greater than for the other drivers and power transistors.

The embodiment of Fig. 6 is like that of Fig. 5 except that it uses separate sensing resistors for each current transformer, and has balanced dissipation from the power transistors if line currents are balanced. This embodiment could also be advantageous in a situation where it might be desirable to have a different scale factor for one line conductor but use identical current transformers, or where stray coupling in the lines connecting the node P_s to the various current transformers interferes with the desired accuracy of measurement. The four half-bridge drivers 133, 233, 333, 433 and their respective transistor pairs Q_A, Q_B may be identical to those of Fig. 5. The four transistor pairs define nodes P_j - P₄. Between nodes Pj and P₂ a sensing winding 117 and a sensing resistor R_S1 are connected in series, with identical sensing windings 217, 317 and sensing resistors R_S2 and R_S3 between the other nodes. Each half-bridge driver has two inputs, which are connected to respective outputs of a logic timing circuit 620, which is timed by a clock 21. For a given sequence of four clock periods, an adjoining pair of half-bridge drivers cause a sequence of two cycles of reversing voltage to be established between the corresponding nodes, so that a sensing current i_sl, i_S2 or i_S3 flows through the corresponding sensing winding and sensing resistor. The control logic circuit 620 also controls a dual channel 3 to 1 selector 650, a sampling circuit 651, a demultiplexer 52, and three sample holding circuits 155, 255, 355. The two terminals of each sensing resistor R_S1, R_S2 and R_S3 are respectively connected to the inputs of the selector 650 which functions as a demultiplexer, providing current signals successively for the three lines, corresponding to the input for one line to differential amplifier 36 of Fig. 4, to the sampling circuit 651. The circuit 651 performs the amplification function of amplifier 36, the sampling hold functions of circuit elements 37 and 38, and selector function of analog signal selector 39 of Fig. 4, to provide a time division demultiplexed output to the three sample holding circuits 155 - 355.

The same considerations of clock frequency, measurement rate and numbers of reading discussed with respect to Fig. 5 are applicable to the Fig. 6 embodiment. It will also be clear that a fourth current transformer and current sensing resistor could be added between nodes P₄ and P, , for example to measure the neutral conductor current in a four wire wye power system. This would allow more measurements with the same number of drivers and power transistors, but might increase the total power consumption undesirably, because a series connection of the three other sensing resistors and sensing windings would be connected in parallel with transformer and resistor which are being used for measurement at any given time. The significance of this last factor would be determined, in part, by the symmetry, or lack thereof, of current flow in the various conductors being measured. The circuits of Figs. 5 and 6 uses conventional low level multiplexing for logic signals to the half bridge drivers, and for sensed voltage signals to the differential amplifier. It will be clear to those of ordinary skill that, in a modification of the embodiment of Fig. 5, one full bridge driver can be used, with one sensing resistor again connected via a node P_s to one terminal of each of the sensing windings. However, rather than being connected to individual half bridge power circuits, the other ends of the sensing windings can be connected through transmission gates (bidirectional switches) formed, for example, by an n- channel MOSFET and a p-channel MOSFET connected in parallel. This variation has the disadvantage that, to measure three line currents, a total of 7 n-channel MOSFET's and 3 p- channel MOSFET's would be required, compared to only 8 n-channel MOSFET's in the embodiment of Fig. 5. Further, because of lower carrier mobility in p-channel MOSFET's, the on resistance is typically 2.5 to 3 times that of n-channel devices having the same channel proportions.

According to a further useful embodiment like that of Fig. 5, the sensor has only two current transformers, which measure the currents in the two conductors of a single phase line. The half bridge driver 333 and its associated circuitry are not used, so that the control 120 and demultiplexer 52 process only two measurement situations in which, in the absence of a substantial ground fault, the successive currents will be approximately equal and opposite, differing only by the effect of the small time delay between measurements. In particular it may be noted that current leakage of a turned off MOSFET is very small, typically much less than one microamp. Thus difference in leakage between the turned off power transistors will be well below the current sensitivity usually needed for ground fault detection: e.g., 1 to 10 ma line current divided by 1000: 1 turns ratio. By comparing the outputs of the hold circuits 155 and 255 the existence of a ground fault can be readily determined with high sensitivity after only four to six clock cycles, because most of the circuit elements which affect measurement accuracy are common to measurement of both line currents.

Those of ordinary skill in the art will recognize that many variations on the disclosed circuits will operate according to the invention. For example, the voltage source need not be a square wave. To minimize production of electromagnetic noise or for other reasons, it may be desirable to use a waveform with rounded edges, or even a sinusoidal waveform. At some slight loss in following line current waveforms which are quite irregular, the voltage source can be asymmetric, so long as it drives the flux once each high frequency cycle into the non-saturated region. Similarly, sampling need not occur at the voltage reversal (cross-over) instant, so long as it occurs while the flux is in the non-saturated region. The current transformer core need not be linear, so long as there is a sufficient region of high permeability so that the magnetizing current, equivalent to that shown in Fig. 3, is less than the desired resolution in measuring line current after taking the transformer turns ratio into account. To prevent development of an average DC current through the sensing circuits, which would waste power (but not affect measurement which is made only when the current transformer is operated unsaturated in its minor loop), a DC blocking capacitor can be included in series with the sensing winding.

Accordingly, the scope of the invention must be measured only by the appended claims.