WO1998032247A1 - Systeme de transmission d'impulsions optiques, procede de transmission d'impulsions optiques, et procede de detection d'impulsions optiques - Google Patents
Systeme de transmission d'impulsions optiques, procede de transmission d'impulsions optiques, et procede de detection d'impulsions optiques Download PDFInfo
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- WO1998032247A1 WO1998032247A1 PCT/JP1998/000246 JP9800246W WO9832247A1 WO 1998032247 A1 WO1998032247 A1 WO 1998032247A1 JP 9800246 W JP9800246 W JP 9800246W WO 9832247 A1 WO9832247 A1 WO 9832247A1
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/508—Pulse generation, e.g. generation of solitons
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/516—Details of coding or modulation
- H04B10/54—Intensity modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/691—Arrangements for optimizing the photodetector in the receiver
Definitions
- the present invention relates to an optical pulse transmission system and an optical pulse transmission method capable of converting an electric signal pulse into an optical pulse and transmitting the pulse at a high speed. Further, the present invention provides a waveform conversion method that is useful when converting an electric signal into an optical pulse on the transmission side, a light intensity modulation device that is useful when applying light, and a reception device. The present invention relates to an optical pulse detection method that is useful when detecting transmitted optical pulses.
- a semiconductor device tester (generally called an IC tester) for testing various semiconductor devices, including semiconductor integrated circuits (ICs), is transported to test the semiconductor devices, and then tested.
- a semiconductor device transfer processor (generally called a handler) is connected, which classifies the tested semiconductor devices based on the results.
- a semiconductor device test device connected to a semiconductor device transfer processing device (hereinafter referred to as a handler) has a test head for applying a test signal of a predetermined pattern to a semiconductor device under test (generally called a DUT). It is separated from the main body of the semiconductor device tester and placed in the test section of the handler.
- the test head and the test apparatus main body are connected by an electric signal transmission line such as a cable, and a test signal of a predetermined pattern is transmitted from the test apparatus main body side to the test head side through the electric signal transmission path.
- the test signal is supplied to the semiconductor device under test through the socket mounted on the test head.
- a response signal from the semiconductor device under test is transmitted from the test head side to the test apparatus main body side through the electric signal transmission path, and the electrical characteristics of the semiconductor device are measured.
- the transmitting side is equipped with a laser diode capable of high-speed light intensity modulation as a light emitting element
- the receiving side is equipped with a photodiode with a fast response speed, and has a configuration using optical fiber as a transmission medium.
- the optical pulse output from the laser diode on the transmitting side is transmitted to the receiving side through an optical fiber, and the optical pulse transmitted by the photodiode is converted into an electric signal.
- the optical transmission system includes an optical pulse transmitting device 101, an optical pulse receiving device 102, and an optical transmission line 1 such as an optical fiber for coupling between the transmitting device 101 and the receiving device 102.
- an optical pulse transmitting device 101 includes an optical pulse transmitting device 101, an optical pulse receiving device 102, and an optical transmission line 1 such as an optical fiber for coupling between the transmitting device 101 and the receiving device 102.
- an optical transmission line 1 such as an optical fiber for coupling between the transmitting device 101 and the receiving device 102.
- the optical pulse transmitting device 101 has a main circuit 103 for outputting an electric pulse signal to be transmitted to the receiving device side, and an input terminal connected to an output terminal 103 A of the main circuit 103.
- the light emitting element 105 is a driving circuit 104.
- the optical pulse is emitted by an electric pulse signal provided from the optical pulse generator, and the optical pulse is transmitted to the optical transmission line 109 via the optical connector 109A. Transmitted to device 102.
- the optical pulse receiving device 102 includes a light receiving element 106 such as a photodiode, a detection circuit 107 connected to the light receiving element 106 with an input terminal force s ′, and an output of the detection circuit 107.
- a main circuit 108 having an input terminal connected to the terminal, and an optical pulse transmitted through the optical transmission line 109 is input to the light receiving element 106 via the optical connector 109B.
- the light-receiving element 106 converts the received light pulse into an electric pulse signal and sends it to the detection circuit 107.
- the detection circuit (generally constituted by a current-to-voltage conversion amplifier) 107 receives the supplied electric pulse The signal is taken out and given to the main circuit 108.
- the main circuit 108 executes various processes based on the input electric pulse signal.
- a laser diode which is used as a light emitting element 105, has a disadvantage that the amount of light emitted from a laser diode fluctuates due to a change in temperature, as is well known.
- Figure 24 shows the injection current versus output optical power characteristics of the laser diode. Curve A shown in Fig. 24 is the injection current vs. output optical power characteristic at temperature T1 (° C), and curve B is the injection current vs output light at temperature T2 (° C) (TKT2). Shows power characteristics.
- the current values I 0N1 and I 0N2 that reach the light-emitting state fluctuate depending on the ambient temperature.
- the temperature of the light emitting element 105 becomes Tl (°) as shown in FIG.
- the optical pulse of OP1 is output, and in the case of the temperature T2 (° C), the optical pulse OP2 is output.
- the optical pulse ⁇ P 1 and the optical pulse OP 2 are received by the optical pulse receiver 102, the reception of the optical pulse is detected according to the magnitude of the peak value of the received signal as shown in FIG. ⁇ t 1 and ⁇ t 2 force s occur in the timing of the optical pulse waveform that crosses the threshold voltage EC. That is, the temperature fluctuation causes jitter, which causes an inconvenience s to be transmitted to the receiving apparatus 102.
- the above-described optical transmission system is applied to, for example, a semiconductor device testing and testing apparatus.
- the test head equipped with the socket is separate from the test apparatus main body. Is configured.
- the test head includes a dryno for applying a test signal of a predetermined pattern to the semiconductor device under test, a comparator for receiving a response output signal of the semiconductor device under test and determining a logic level, and Interface operation.
- a number of signal transmission paths are provided between the test apparatus main body and the test head.
- the optical transmission line 109 requires multiple channels.
- the thus constructed a system to receive Professor multi-channel optical signals by the optical transmission path of the multi-channel resulting jitter force s in pulses transmitted by the temperature variation, further variations force the jitter amount for each channel 5 If this occurs, a timing error will occur between the optical signals transmitted through the transmission paths of each channel, and due to the occurrence of this timing error, the semiconductor device (IC) test will be performed normally. The inconvenience of being unable to do so occurs.
- FIG. 26 shows an example of an optical intensity modulator used in the above optical transmission system.
- the optical intensity modulator includes an input comparator 200 that receives a signal voltage of a digital input signal (electric pulse signal) and a threshold voltage and compares these voltages, and a comparison between the input comparator 200 and the input comparator 200. It has a current switch circuit 201 that turns on and off according to the result, and a semiconductor laser 202 driven based on a current waveform generated by an on-off switch of the current switch circuit 201.
- the current switch circuit 201 includes a pair of transistors TR 1 and TR 2 to which an emitter is commonly connected, and a pair of transistors 203 and 205 to which a base is commonly connected. The collectors of the pair of transistors TR 1 and TR 2 are connected to corresponding terminals of the semiconductor laser 202, respectively, and the commonly connected emitters are connected to the collector of the transistor 203.
- the right transistor TR2 in the drawing of the pair of transistors TR1 and TR2 connected to the emitter constituting the current switch circuit 201 is turned on in advance,
- the current controlled by the transistor 203 is injected into the semiconductor laser 202, and a level of optical output corresponding to the magnitude of the injected current is obtained from the semiconductor laser 202.
- the semiconductor laser 202 was driven.
- the DC noise current required for operation is controlled by a transistor 204 whose collector is connected to the current injection terminal of the semiconductor laser 202.
- an optical transmission system that transmits the optical pulse at high speed can be realized.
- pulses having a large number of periods are mixed, and furthermore, when optical modulation is performed, it is very difficult. High timing accuracy is required. Therefore, when the above-described optical transmission system is applied to a semiconductor device test apparatus, the following problems may occur.
- the level of the light intensity is unstable (the fluctuation force of the f & Jl wave component is large s ). Therefore, as shown in the lower part of Fig. 27, the binary light with a fixed discrimination level at the receiving side is used. If the signal is identified, the data (0, 1) and timing will have errors as shown in the figure.
- the upper waveform in FIG. 27 shows the electric pulse signal to be transmitted on the transmitting side.
- the rise time (emission delay time) of a light-emitting element such as a semiconductor laser changes depending on the temperature of the element and generally varies depending on the element
- the light-emission delay time depends on the temperature change or between elements. The difference shown in Fig. 28 occurs. This difference in the light emission delay time causes the above timing error.
- temperature control is performed to keep the temperature of the light emitting element constant, or the output of the light emitting element is kept at a constant level by monitoring the light intensity ( The power to be controlled in such a way as to stabilize)
- the proposed power which requires a large number of transmission lines, such as a semiconductor device test equipment, because the transmission module becomes expensive in any solution.
- stabilization of light intensity is difficult to achieve when transmitting light pulses at high speed.
- timing and data errors can be reduced relatively easily.
- the discrimination level is shifted to the offset data value, resulting in a timing error.
- the rising and falling edges of the binary electric signal are detected, and a pulse signal having an inverted polarity is generated following the pulse signal corresponding to the detection of each edge. Pulse signal of positive polarity when the rising edge is detected Then, a negative pulse signal with inverted polarity is generated to form a pair of pulses with inverted polarities.When a falling edge is detected, a negative pulse signal is generated followed by a positive pulse signal with inverted polarity to generate polarities with each other.
- a method is also proposed in which a pair of inverted pulses is used, and a semiconductor laser is driven based on these polarity-reversed pulse pairs to generate an optical noise pair that also reverses polarity in the same way and transmits the pair to the receiving side. Have been.
- the transmitted optical pulse pair is an optical signal that indicates the rising and falling timings of the binary electrical signal to be transmitted.
- the rise and fall timing can be identified, and the original binary electrical signal can be reproduced. Therefore, for example, as in the case of transmitting a signal between the test apparatus main body and the test head in a semiconductor device test apparatus, signals having a large number of cycles are mixed, and the data value of the binary signal is one value (0 or 1).
- the receiving side only receives a pair of optical pulses whose polarities are inverted as the timing signals for the rise and fall, so that the discrimination level is one of the data values. There is no error of data value. It is also possible to accurately identify DC-like data values that have been fixed for a long time.
- Figure 32 shows an example of a conventional drive circuit that generates a pair of screws and drives a semiconductor laser. .
- the drive circuit includes an OR (OR) circuit 300 to which a binary electric signal to be transmitted is input to one input terminal, and a first inversion for inverting the polarity of the binary electric signal to be transmitted.
- the circuit (inverter) 301 and the output signal from the inverting circuit 301 are delayed by a predetermined time so that the other input terminal of the OR circuit 300 and the AND circuit 303
- a second delay circuit 305 for delaying the output signal of 304 by a predetermined time and supplying it to the other input terminal of the AND circuit 303.
- the polarity of the output signals of the OR circuit 300 and the AND circuit 303 is inverted, It is supplied to the body laser 312.
- a positive logic pulse waveform (d) is obtained from the rising and falling edges (a) to (c) of the input binary electric signal.
- negative logic is a pulse waveform (e) power generation, these pulse waveforms mosquito 3 ⁇ 4 b calculated by the polarity inversion pulse pair polarity is reversed each other (f) force? it forces generated? easily understood.
- the semiconductor laser 312 is driven on the basis of the polarity inversion pulse pair (f), and an optical node whose polarity is alternately inverted as shown in the lower part of FIG. Lus pairs will be generated.
- a positive logic pulse waveform (d) and a negative logic pulse waveform (e) generated from the rising and falling edges (a) to (c) of the binary input electric signal are added to generate a polarity inversion pulse.
- the pair (f) is generated, the polarity inversion portion of the polarity inversion pulse pair becomes a joint between two pulse waveforms of a positive logic pulse waveform (d) and a negative logic pulse waveform (e).
- the polarity inversion part of the polarity inversion pulse pair requiring high accuracy may become a discontinuous edge, and the timing accuracy may be degraded.
- a first object of the present invention is to provide an optical transmission system and an optical transmission method that overcome the above-mentioned problems of the prior art.
- a second object of the present invention is to provide an optical transmission system and an optical transmission method capable of high-speed optical transmission of a signal having a high timing accuracy and a signal having an indeterminate periodic force and having a DC component with high accuracy. It is to be.
- a third object of the present invention is to provide a semiconductor noise testing device to which the above optical transmission system or optical transmission method is applied.
- a fourth object of the present invention is to provide an optical pulse signal transmission method in which a signal transmitted to a receiving side does not generate a jitter force s even if there is a temperature fluctuation.
- a fifth object of the present invention is to provide an optical pulse detection method to which the above optical pulse signal transmission method is applied.
- a sixth object of the present invention is to provide a transmission waveform conversion method that prevents a polarity inversion section of a pair of polarity inversion pulses whose polarities are inverted from each other from becoming discontinuous edges.
- a seventh object of the present invention is not polarity inversion of the polarity inversion pulse pair inverting polarity power s' each other a discontinuous edge, and is to provide Hisage high light intensity modulation device of timing accuracy.
- An eighth object of the present invention is to provide an optical transmission system and a semiconductor device test device using the light intensity modulator.
- first and second edge detecting means for detecting a rising edge and a falling edge of a signal waveform to be transmitted, respectively, on a transmitting side; Polarity reversal, in which flies are reversed from each other at the rising edge detection timing by the edge detection means.
- a first pulse generator for generating a first transmission pulse signal composed of a pair of pulses, and a polarity inversion pulse pair that inverts each other at a falling edge detection timing by the second edge detection means.
- Second transmission pulse generation means for generating a second transmission pulse signal comprising: a first light intensity modulation means for generating a first light intensity modulation signal based on the first transmission pulse signal And a second light intensity modulating means for generating a second light intensity modulated signal based on the second transmission pulse signal, wherein the receiving side receives the first light intensity modulated signal.
- a first AC-coupled receiving means for obtaining a first received signal from which only the AC component is extracted, and a second receiving means for receiving the second light intensity modulated signal and extracting only the AC component
- a second AC-coupled receiving means for obtaining a signal
- a first identification unit that identifies a rising timing from the first received signal
- a second identification unit that identifies a falling timing from the second reception signal
- an optical transmission system comprising signal reproducing means for reproducing a rising edge and a falling edge relating to the waveform of the signal to be transmitted based on the falling timing.
- the first identification means identifies a timing at which the polarity of the first received signal is inverted as a rising timing, and the second identification means sets a timing at which the polarity of the second received signal is inverted. Identify as falling timing.
- the first identification means includes a rise identification reference level serving as a reference for rise timing identification, and a rise giving a rise timing identification operation start timing.
- the rising force s ′ of the first reception signal is set to an operation state for a certain period of time from a point in time when the signal crosses the rising discrimination start level.
- the time when the received signal crosses the rising identification reference level is identified as rising timing
- the second identification means includes a falling identification reference level serving as a reference for falling timing identification, and identification of falling timing.
- the fall discrimination start level providing an operation start timing, it is only the operating state falling force? constant from the time of crossing the falling discrimination start level time of the second reception signal, the operating state During this time, the time when the second received signal crosses the falling identification reference level is identified as falling timing.
- An asynchronous SR flip-flop configured to set a rising timing identified by the first identification unit as a set signal, and set a falling timing identified by the second identification unit as a reset signal; It is composed of a circuit.
- first and second edge detecting means for respectively detecting a rising edge and a falling edge from a signal waveform to be transmitted, and the first edge detecting means
- a first transmission pulse generating means for generating a first transmission pulse signal composed of a pair of polarity inversion pulses inverting each other at a rising edge detection timing due to the rising edge detection timing, and a falling edge by the second edge detection means.
- a second transmission pulse generating means, and a light intensity modulation means for generating a ⁇ degree-variable i-word based on the first and second transmission signals.
- the light Coupling receiving means for receiving a degree-modulated signal and obtaining a received signal by extracting only the AC component thereof; and the first and second transmission pulses based on the polarity inversion relationship from the received signal.
- a discriminating means for discriminating a signal related to the signal, a rising timing and a falling timing, and a rising edge and a rising edge related to the waveform of the signal to be transmitted based on the rising timing and the falling timing.
- An optical transmission system having signal reproducing means for reproducing a falling edge is provided.
- the identification means relates to the first transmission pulse signal of the reception signal
- a first identification circuit that identifies a timing at which the polarity of the signal is inverted from positive polarity to negative polarity as a rising timing; and a polarity force of a signal related to the second transmission pulse signal among the received signals.
- a second discriminating circuit for discriminating the timing of inversion from positive to negative as falling timing.
- the rising edge is determined based on an identification reference level serving as a reference for timing identification, and a rising identification starting level giving a timing for identifying a rising timing and a falling identification starting level giving a timing for identifying a falling timing.
- the first identification means is set in an operation state for a certain time, and at the same time, the second identification means is activated.
- the received signal crosses the identification reference level during the operation state and the first identification means is in the operation disabled state, it is identified as rising timing, and when the falling timing is identified, the reception signal is identified.
- the second discriminating means operates for a certain period of time.
- the first discrimination means is disabled while the first discrimination means is operating and the first discrimination means falls when the received signal crosses the discrimination reference level while the first discrimination means is operating. Identify as timing.
- the signal reproducing means is constituted by an asynchronous SR flip-flop circuit which uses the rising timing and the falling timing identified by the identifying means as a set signal and a reset signal, respectively.
- the optical transmission system according to any one of claims 1 to 8, a test apparatus main body for transmitting a binary signal, and receiving the binary signal.
- a semiconductor device test apparatus is provided, wherein the test head is connected by an optical fiber, and optical transmission using the optical transmission system is performed between the test apparatus main body and the test head.
- a rising edge and a falling edge of a signal to be transmitted are detected, and a timing signal indicating the rising timing and the falling timing is detected at the edge detection timing.
- An optical transmission method having a receiving step of reproducing a rising edge and a falling edge related to a signal waveform is provided.
- the polar forces? Mutually inverted as a boundary a first step, the rising edge detection timing for detecting each rise edge ⁇ Pi elevational under rising edge of the signal waveform to be transmitted
- a first pulse signal for transmission composed of a pair of polarity inversion pulses is generated, and the polarity is inverted with respect to the polarity at the falling edge detection timing.
- Generating a second transmission pulse signal composed of a pulse pair generating a first light intensity modulation signal based on the first transmission pulse signal, and generating the second transmission pulse signal.
- the rising timing and the falling timing in the fifth step are identified by the timing at which the polarity of the first reception signal is inverted as the rising timing, and the timing at which the polarity of the second reception signal is inverted is the falling timing. Perform by identifying as. .
- the first reception signal is determined based on a rising identification reference level serving as a reference of the rising timing identification, and a rising identification start level giving timing to start the identification operation of the rising timing.
- the rising force s is identified as the rising timing when the first received signal crosses the rising identification reference level within a predetermined time from the time when the rising identification starting level is crossed, and the falling timing is identified.
- the falling edge of the second reception signal is determined based on a falling edge identification reference level serving as a reference for falling edge timing identification and a falling edge identification start level giving a falling edge identification operation start timing.
- a falling edge identification reference level serving as a reference for falling edge timing identification
- a falling edge identification start level giving a falling edge identification operation start timing.
- a first transmission pulse signal composed of an inverted pulse pair is generated, and the first transmission pulse signal and the first transmission pulse signal have a polarity inverted from each other with respect to the falling edge detection timing. Polarity reversal, in which are reversed.
- a third step of transmitting the above signal a fourth step of receiving the light intensity modulated signal, and obtaining a received signal obtained by extracting only the AC component thereof, and In addition to distinguishing between the signals related to the first and second transmission pulse signals, a rising timing and a falling timing are identified, and the signal to be transmitted is determined based on the identified rising and falling timings.
- a fifth step of reproducing a rising edge and a falling edge related to a waveform is provided.
- the rising timing and the falling timing in the fifth step are identified as rising timing when the polarity of a signal related to the first transmission pulse signal in the received signal is inverted from positive to negative.
- the timing at which the polarity of the signal related to the second transmission pulse signal is inverted from the negative polarity to the positive polarity is identified as the fall timing.
- the rising edge is determined based on an identification reference level serving as a reference for timing identification, a rising identification start level that gives rise timing identification operation start timing, and a fall identification start level that gives fall timing identification operation start timing.
- the rising timing of the received signal 5 ' is set so that the rising timing is identified only for a certain period of time from when the level crosses the rising identification start level, and the falling timing is identified.
- the received signal power 5 'crosses the identification reference level within this time it is identified as rising timing, and when the falling timing is identified, Falling force 'The falling timing is identified for a certain period of time from the point of crossing the falling identification start level, and at the same time, the rising timing is not identified.
- the point in time when the signal strength s crosses the identification reference level is identified as the fall timing.
- an electric pulse is given to the light emitting element provided on the transmitting side, the light emitting element emits an optical pulse by the electric pulse, and the optical pulse is transmitted to the receiving side through the optical transmission path. Then, in a light pulse transmission method in which the light is converted into an electric signal by the light receiving element provided on the receiving side and the electric pulse is captured as a received signal, the electric signal applied to the light emitting element on the transmitting side is reduced.
- an optical pulse transmission method characterized by a positive / negative symmetrical waveform signal that changes positively and negatively symmetrically with respect to a DC bias current to maintain an average value of light on an optical transmission line at a constant value.
- the detection point of the positive / negative symmetric waveform signal received on the receiving side is defined as a zero crossing point crossing the bias current value.
- an electric pulse is applied to the light emitting element provided on the transmitting side, the light emitting element emits a light pulse by the electric pulse, and the optical pulse is transmitted to the receiving side through the optical transmission path. Then, in an optical pulse transmission method in which the light pulse is converted into an electric pulse by a light receiving element provided on the receiving side and the electric pulse is taken in as a received signal, the electric power and the signal given to the light emitting element on the transmitting side are transmitted to the front edge side and On both sides of the trailing edge, a positive / negative symmetrical waveform signal that changes positively and negatively symmetrically around the DC bias current value.
- the optical pulse transmission method is characterized in that the optical pulse transmission method is maintained.
- the reception detection point on the reception side is defined by one of the zero-cross points of the positive and negative symmetric waveform signals generated on the leading edge side and the trailing edge side.
- a smoothing circuit for generating a DC voltage corresponding to the DC bias current value is provided on the receiving side, and the DC voltage generated by the smoothing circuit is supplied as a reference voltage of a voltage comparator having hysteresis characteristics. A potential change that exceeds the hysteresis width of the hysteresis characteristic around the voltage is detected as a received signal and output from the voltage comparator.
- the digital input signal A transmission waveform conversion method comprising a pair of polarity inversion pulses whose polarities are inverted with each other at a timing of a rising edge or a falling edge, wherein the first digital signal has a waveform equal to the input signal from the digital input signal.
- a transmission waveform conversion method characterized in that a polarity inversion pulse pair in which the polarities are inverted with each other is generated.
- the driving means comprises: A first current switch means for forming a first current waveform having a waveform equal to the first waveform, and a delay for a predetermined time with respect to the first waveform, the amplitude being twice the first waveform, and a waveform A second current switch means for forming a second current waveform having a negative logic relationship with respect to the digital input signal; and a delay for a predetermined time with respect to the second waveform, Third current switching means for forming a third current waveform having the same waveform as the first current waveform, wherein the light emitting element is driven by a current waveform obtained by adding the first to third current waveforms A light intensity modulator is provided.
- Each of the first to third current switch means includes a first transistor having a base connected to an inverting input of the digital input signal, and a second transistor having a base connected to an input force s of the digital input signal. and a transistor, these Emitta force of the first and second transistors? are connected in common to a current source, and the collector of the first transistor constituting the first and third current switching means, wherein The collector of the second transistor constituting the second current switch means is commonly connected to a power supply line to form a first output, and the second transistor constituting the first and third current switch means A second output is formed by being connected in common with the collector of the first transistor and the collector of the first transistor that constitutes the second current switch means.
- the switch means is arranged such that the current source supplies twice as much current as the current sources of the other current switch means.
- the second current switch means comprises an input of a collector of the first transistor; A first delay circuit is provided on the line, a second delay circuit is provided on an input line of a collector of the second transistor, and the third current switch means includes an input line of a collector of the first transistor.
- the first delay circuit and the third delay circuit are provided in series, and the second delay circuit and the second delay circuit are provided in series on the input line of the collector of the second transistor.
- the current sources of the first to third current switch means each have a current adjusting resistance, and the current sources of the first and third current switch means have the same resistance value of the current adjusting resistance. 2 are 1 and so as to set half the resistance value of the current regulation resistor current source resistance force s other current switching means of the current regulating resistor of the current source of the current switching means.
- the transmitting side includes the optical intensity modulator according to any one of claims 23 to 26, and the receiving side includes the optical intensity modulator.
- An AC-coupled receiving means for receiving a signal light-intensity-modulated by the modulation device and obtaining a received signal obtained by extracting only an AC component thereof; and provided an optical transmission system force s; and a signal reproducing means for reproducing the rising Taiminku and falling Ti timing of the input signal.
- the test apparatus main body and the test head are connected by an optical fiber, and the test apparatus main body side includes any one of claims 23 to 26.
- a semiconductor device test apparatus comprising: an AC coupling receiving unit; and a signal reproducing unit that reproduces a rising timing and a falling timing of a digital input signal before transmission based on a relationship that the polarity is inverted from the received signal.
- the test apparatus main body and the test head are connected by an optical fiber, and the test head side is provided with any one of claims 23 to 26
- Coupling receiving means, and the relationship that the polarity is inverted from the received signal Based on, it is provided a semiconductor device testing apparatus force s; and a signal reproducing means for reproducing the rising timing and falling data Imingu digital input signal before transmission. .
- a bias current having a constant value even when there is no signal and having a value larger than a threshold value for giving a light emission start point of the light emitting element is applied to the light emitting element, and the light emitting element emits light with a constant light emission amount.
- a pulse having a polarity opposite to the polarity of the pulse to be transmitted is applied to generate a positive / negative symmetric waveform signal that swings symmetrically in the positive and negative directions around the bias current, and light is emitted by the positive / negative symmetric waveform signal.
- the present invention also proposes an optical pulse detection method in which ⁇ ⁇ corresponding to a bias current transmitted from the transmission side is used as a signal detection threshold on the reception side. Therefore, by employing the optical pulse transmission method and the optical pulse detection method according to the present invention, even if the injection current of the light emitting element versus the output optical power characteristic fluctuates due to temperature fluctuation on the transmitting side, the bias current flowing through the light emitting element is changed. The fluctuation of the bias current is transmitted to the receiving side as a DC component of light.
- the DC component of the transmitted light is reproduced as a bias voltage, and this bias voltage is applied to a voltage comparator having a hysteresis characteristic as a reference voltage. Even when the bias voltage fluctuates, the detection point of the positive / negative symmetric waveform signal does not move in the time direction even if the bias voltage fluctuates. .
- the temperature change is given to the light emitting element on the transmitting side, and the detection point of the pulse detected on the receiving side fluctuates even if the injection current vs. output light power characteristic of the light emitting element fluctuates. do not do. That is, generation of jitter can be prevented. Therefore, by applying the present invention to a device that transmits data using multiple channels, there is obtained an advantage that a timing error does not occur in a signal between each channel and data can be transmitted and received at a correct timing. .
- FIG. 1 is a block diagram showing a schematic configuration of an optical signal transmission system according to a first embodiment of the present invention.
- FIG. 1 is a block diagram showing a schematic configuration of an optical signal transmission system according to a first embodiment of the present invention.
- FIG. 2 is an explanatory diagram of the operation of the circuit shown in FIG.
- FIG. 3 is a block diagram showing an example of a specific circuit configuration of the optical signal transmission system shown in FIG.
- FIG. 4 is a block diagram showing a schematic configuration of a semiconductor device test apparatus to which the optical signal transmission system according to the first embodiment of the present invention is applied.
- FIGS. 5 (a) to 5 (d) are waveform diagrams showing several examples of pulse pairs whose polarities indicating rising timing and falling timing are inverted from each other.
- FIG. 6 is a block diagram showing a schematic configuration of an optical signal transmission system according to a second embodiment of the present invention.
- FIG. 7 is a waveform diagram for explaining the circuit operation of the optical signal transmission system shown in FIG.
- FIG. 8 is a block diagram showing an example of a specific circuit configuration of the optical signal transmission system shown in FIG.
- FIG. 9 is a block diagram showing a schematic configuration of a semiconductor noise test apparatus to which the optical signal transmission system according to the second embodiment of the present invention is applied.
- FIG. 10 is a circuit diagram showing a specific example of the optical pulse transmission device according to the third embodiment of the present invention.
- FIG. 11 is a timing chart for explaining the operation of the optical pulse transmission device of FIG.
- FIG. 12 is a circuit diagram showing a specific example of the optical pulse detection circuit according to the third embodiment of the present invention.
- FIG. 13 is a timing chart for explaining the operation of the optical pulse detection circuit of FIG.
- FIG. 14 is a circuit diagram showing another specific example of the optical pulse transmitting device according to the third embodiment of the present invention.
- FIG. 15 is a waveform diagram for explaining the operation of the optical pulse transmission device of FIG.
- FIG. 16 is a circuit diagram showing still another specific example of the optical pulse transmission device according to the third embodiment of the present invention.
- FIG. 17 is a timing chart for explaining the operation of the optical pulse transmitting apparatus of FIG.
- FIG. 18 is a circuit diagram showing a specific example of the light intensity modulator according to the fourth embodiment of the present invention.
- FIG. 19 is a block diagram showing an example of an optical transmission system using the light intensity modulator of FIG.
- FIG. 20 is a waveform chart for explaining the operation of the optical transmission system of FIG.
- FIG. 21 is a timing chart for explaining the operation of the light intensity modulator of FIG.
- FIG. 22 is a circuit diagram showing another specific example of the light intensity modulation device according to the fourth embodiment of the present invention. '
- FIG. 23 is a block diagram showing a schematic configuration of an example of a conventional optical pulse transmission system.
- FIG. 24 is a characteristic curve diagram for explaining an example of an injection current vs. output light power characteristic of the light emitting device shown in FIG.
- FIG. 25 is a waveform diagram for explaining the waveform of a pulse transmitted by the conventional optical pulse transmission system shown in FIG.
- FIG. 26 is a circuit diagram showing an example of a light intensity modulator used in a conventional optical transmission system.
- FIG. 27 is a timing chart for explaining an error in data and timing when a binary signal is identified at a fixed identification level.
- FIG. 28 is a characteristic diagram showing the relationship between the light emission delay time of the light emitting element and the light intensity.
- FIG. 29 is a waveform diagram for explaining light intensity modulation from offset light.
- FIG. 30 is a timing chart for explaining the binary signal discriminating operation by the AC coupling method.
- FIG. 31 is a timing chart for explaining a method of optically transmitting a binary electric signal using a pair of polarity inversion pulses according to the rising and falling edges of the signal.
- FIG. 32 is a block diagram showing another example of the light intensity modulator used in the conventional optical transmission system.
- FIG. 33 is a timing chart for explaining the operation of the light intensity modulator shown in FIG. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 is a block diagram schematically showing a configuration of a first embodiment of an optical signal transmission system according to the present invention.
- This optical signal transmission system includes a transmitting device T, a receiving device, and an optical fiber 6 connecting these two devices T and R.
- the transmitting device T includes a rising edge detection circuit 1, a transmission pulse generating circuit 2, and a light intensity modulation circuit 3, and the receiving device R includes an AC coupling receiving circuit 4 and an identification circuit 5. I have.
- the signal transmitted in this optical signal transmission system is not binary data, but the rising edge of the waveform of the binary signal, that is, the amplitude (level) of the rising edge of the transmission signal. ) Is a timing signal that indicates the point beyond.
- FIG. 1 shows a configuration in which only the rising edge is transmitted for simplicity of description, in actuality, as shown by a dotted line in FIG. It includes a similar circuit configuration for transmitting the falling edge, and has a single circuit configuration for transmitting the rising edge and the falling edge of the waveform, respectively. .
- FIG. 2 is a timing chart for explaining the operation of the various circuits shown in FIG. 1.
- a rising edge of a waveform (timing when the amplitude value of the rising edge exceeds 50%) is detected. And shows the waveforms when transmitting.
- the operation of each circuit will be specifically described with reference to FIG.
- the rising edge detection circuit 1 is usually composed of a logic circuit, etc.
- Timing the rising edge of the signal (which means the waveform of the signal to be transmitted) and generates the rising signal (a).
- the transmission pulse generation circuit 2 generates a corresponding positive pulse signal based on the rising timing of the rising signal (a) output from the rising edge detection circuit 1. Then, a negative polarity pulse signal whose polarity is inverted is generated, and a pair of pulses whose polarity is inverted at the rising timing is generated, and this is output as a transmission pulse signal (b).
- the transmission pulse signal (b) As the transmission pulse signal (b), it is necessary to use a signal whose shape and pulse width are sufficiently shorter than the minimum pulse interval of the waveform of the original transmission signal. In other words, the minimum pulse interval of the original transmission signal waveform is limited by the pulse width of the transmission pulse signal (b).
- the transmission pulse signal (b) receives a certain delay when it is generated, and even if it becomes a delayed pulse (e) as shown by the dotted line in FIG. If it is a value, the receiver can use it as a timing signal without any problem.
- the light intensity modulation circuit 3 is a transmission pulse signal generated by the transmission pulse generation circuit 2.
- a light emitting element (not shown) is driven by using the modulation method of performing light intensity modulation on offset light, which is driven based on (b), and a rising edge of a transmission pulse signal waveform is used. At the timing when the amplitude value exceeds a predetermined value, a pair of light pulses whose polarities are inverted is output as a light intensity signal (c).
- This light intensity signal
- the AC-coupled receiving circuit 4 is a circuit that detects the received light intensity signal (c) by a conventionally used AC-coupling method, and has a signal strength similar to the received signal (d) shown at the bottom of FIG. s is detected.
- the received light intensity signal (c) is an optical pulse signal modulated on the basis of the transmission signal and the regression signal (b), whose polarities are inverted to each other at the rising edge. bipolar pulse force? exists, therefore, the detected Ru received signal (d) are never as it contains many pulses offset to one polarity.
- the identification circuit 5 identifies a rising edge (timing exceeding a predetermined amplitude value) from the reception signal (d) detected by the AC coupling reception circuit 4.
- the discrimination level L1 which is the reference for the timing discrimination
- the discrimination operation start which has been set in advance to a sufficiently low level that noise and signal can be separated
- the identification start level L 2 which gives the timing of the following
- the following identification operation is performed.
- the discrimination circuit 5 is instantaneously activated at the point A, and the point B crosses the discrimination level L1 within a certain delay time. Generate a timing pulse.
- the operation state of the identification circuit 5 is maintained for a time corresponding to the pulse width, and the time B when the received signal (d) crosses the identification level L1. Determines identification timing and generates a timing pulse. According to this discriminating operation, the discriminating circuit 5 does not operate when the noise force s does not exist, so that low-level fluctuation due to noise is not erroneously discriminated as a pulse.
- the timing pulse (rising timing) generated from the rising-side identification circuit is converted into, for example, an asynchronous RS (set-reset) flip-flop setup signal.
- the falling edge can be reproduced by using the timing pulse (falling timing) similarly generated from the falling-side identification circuit as the reset signal. Therefore, the original binary transmission signal waveform can be reproduced from these reproduced edges.
- the rising and falling timings of the signal waveform to be transmitted are handled separately, and the pair of pulses inverts each other at each timing based on each timing.
- the offset light is converted into a transmission pulse signal, the offset light is intensity-modulated based on the transmission pulse signal, and the polarity-reversed optical pulse pair is transmitted to the receiving device as a light intensity signal.
- Signal is received by AC coupling and the discriminating circuit is operated only when a pulse is present to detect the rise / fall discrimination timing, and the original transmission signal waveform is obtained from the obtained rising / falling timing signal. It is configured to reproduce electrically.
- circuit configuration described below is an example of a circuit configuration for realizing the present transmission system, and does not limit the configuration of the present invention.
- FIG. 3 is a block diagram showing an example of a specific circuit configuration of the optical signal transmission system shown in FIG.
- the transmitting device T includes a first transmitting circuit (rising edge transmitting circuit) including a rising edge detecting circuit 11a, a transmission pulse generating circuit 12a, a fixed bias LD driving circuit 13a, and a falling edge.
- a second transmission circuit (falling edge transmission circuit) including an edge detection circuit 11b, a transmission pulse generation circuit 12b, and a bias-fixed LD drive circuit 13b is provided.
- An AC-coupled receiving circuit 14a for receiving an optical signal transmitted from the first transmitting circuit via an optical fiber, and a rising timing based on the AC component of the received signal output from the AC-coupled receiving circuit 14a.
- a first receiving circuit comprising an identification circuit 15a for detection, and an AC coupling receiving circuit 14b for receiving an optical signal transmitted from the second transmitting circuit via an optical fiber.
- AC coupling receiver circuit A second receiving circuit (falling edge receiving circuit) comprising an identification circuit 15b for detecting a fall timing from the AC component of the received signal to be detected, and an output of the identification circuit 15a as a set signal, An asynchronous RS flip-flop 16 that uses the output of the identification circuit 15b as a reset signal is provided.
- Rising and falling edge detection circuits 11a and 11b, transmission pulse generation circuits 12a and 12b, AC-coupled reception circuits 14a and 14b correspond to those shown in Figure 1 above. It has the same circuit configuration as that of the circuit and performs the same duplication, so that the description thereof is omitted here.
- Bias-fixed LD drive circuits 13a and 13b on the receiving side are circuits that drive laser diodes (not shown) that are light-emitting elements, and generate transmission pulse generation circuits 12a and 12b.
- the laser diode is driven by using a pair of pulses, which are polarities s mutually inverted at the rising and falling timings, as a drive signal to generate a light intensity modulation signal.
- a bias current is applied to the laser diode in advance to always emit the laser diode (offset light), and modulation according to the drive signal is applied to the drive current of the laser diode.
- the conventional method is used.
- the discriminating circuit 15a is a comparator 150a for timing discrimination, a comparator 151a for discriminating whether or not to operate the comparator 150a, and a delay. It consists of an adjustment circuit 15 2 a, a delay / time constant adjustment circuit 15 3 a and 15 4 a.
- the identification circuit 15b is a comparator for timing identification 150b, a comparator for determining whether or not to operate the comparator 150b, and a delay adjustment circuit. It consists of 15 2 b, delay and time constant adjustment circuit 15 3 b and 15 4 b. Since the identification circuits 15a and 15b have the same circuit configuration, only the configuration of the identification circuit 15a will be described below, and the description of the identification circuit 15b will be omitted.
- the output of the AC-coupled receiving circuit 14a is branched, one of which is compared with one input terminal of the comparator 151a and the other via the delay adjusting circuit 152a. Is supplied to one input terminal of the device 150a.
- the identification start reference voltage is input to the other input terminal of the comparator 15 1 a.
- the comparator 15 Decide whether to operate 150a.
- the output of the comparator 15a is input to the enable signal input terminal of the comparator 150a via the delay / time constant adjusting circuit 1553a. 0a operation can be controlled.
- the other input terminal of the comparator 150a is grounded, and by comparing the ground potential with the input voltage supplied from the AC coupling receiving circuit 14a through the delay adjusting circuit 152a, The rising timing is determined.
- the output of the comparator 150a is input to the S (set) terminal of the asynchronous RS flip-flop 16 via the delay / time constant adjusting circuit 150a.
- the R (reset) terminal of the asynchronous RS flip-flop 16 is connected to the output of the comparator 150 b of the discriminating circuit 15 b by the delay and time constant adjusting circuit 15 4 Entered via b.
- Rising and falling edge detection circuits 11a and 11b binary digital signal waves
- the rising edge detection circuit 11a detects the rising edge of the input transmission signal waveform
- the falling edge detection circuit 11b detects the input transmission signal waveform. Detect falling edge.
- the rising edge of the transmission signal waveform detected by the rising edge detection circuit 11a is supplied to the transmission pulse generation circuit 12a, and the transmission pulse generation circuit 12a receives the timing of the input rising edge. To generate pulse pairs with inverted polarities. Similarly, the transmission pulse generation circuit 12b generates a pair of pulses whose polarities are inverted from each other at the timing of the input falling edge.
- the bias-fixed LD drive circuit 13a drives the laser diode using the polarity inversion pulse pair supplied from the transmission pulse generation circuit 12a as a drive signal.
- modulation corresponding to the drive signal is added to the drive current of the laser diode, and a light intensity modulation signal is generated from the laser diode.
- the bias-fixed LD drive circuit 13b drives the laser diode using the polarity inversion pulse pair supplied from the transmission pulse generation circuit 12b as a drive signal, and generates a light intensity modulation signal from the laser diode. Let it.
- the light intensity modulation signals generated by driving the corresponding laser diodes by the bias-fixed LD driving circuits 13a and 13b are transmitted to the transmitting device via optical fibers, and the corresponding AC-coupled receiving circuit 1 Received at 4a and 14b, respectively.
- each of the AC coupling receiving circuits 14a and 14b Upon receiving the light intensity modulated signal, each of the AC coupling receiving circuits 14a and 14b converts only the AC component of the received light intensity modulated signal into an electric signal. As a result, the original polarity inversion pulse pair force s is generated, and this is output as a received signal.
- the reception signals output from the AC-coupled reception circuits 14a and 14b are input to the identification circuits 15a and 15b.
- the received signal input to the identification circuit 15a is first input to the comparator 151a.
- the comparator 15a detects the input of the pulse force by comparing the voltage of the input received signal with the identification start reference voltage, and outputs a pulse signal.
- This pulse-like output signal is processed into a signal having a sufficiently large pulse width by the delay / time constant adjusting circuit 153a, and is input to the enable signal input terminal of the comparator 150a.
- the comparator 150a starts operation, identifies the central portion of the polarity inversion pulse pair (received signal), that is, the timing at which the polarity force 5 'is inverted, and this identification is performed. Outputs a pulse signal (timing signal) indicating the timing.
- the discrimination circuit 15a has a delay so that it moves faster than the polarity inversion pulse pair (received signal) force s reaches one input terminal of the comparator 150a.
- the delay time of the input path of the polarity inversion pulse pair (received signal) to these comparators 150a and 151a is adjusted by the adjustment circuit 152a and the delay ⁇ time constant adjustment circuit 153a. Have been.
- the timing signal output from the comparator 150a is processed into a signal with a sufficient pulse width by the delay / time constant adjustment circuit 1504a, and then the S (set ') terminal of the asynchronous RS flip-flop 16 Is input to
- the received signal when the received signal is input to the identification circuit 15b, the received signal is input to the comparator 151b.
- the comparator 15 1 b detects the input of the pulse by comparing the input received signal voltage with the identification start reference voltage, and outputs a pulse signal. This pulse-like output signal is delayed by the time constant adjustment circuit 1 5
- the signal is processed into a signal with sufficient pulse width by 3b, and is input to the enable signal input terminal of comparator 150b.
- the comparator 150b starts operation, identifies the central portion of the polarity inversion pulse pair (reception signal), that is, the timing at which the polarity is inverted, and this identification is performed. It outputs a pulse-like signal (timing signal) indicating the timing. .
- the delay time of the input path of the polarity inversion pulse pair (received signal) to these comparators 150b and 151b is adjusted by the adjusting circuit 152b and the delay ⁇ time constant adjusting circuit 153b. ing.
- the timing signal output from the comparator 150b is a delay / time constant adjustment circuit 15
- asynchronous RS flip-flop 16 After processing into a signal of sufficient pulse width in 4b, it is input to the R (reset) terminal of asynchronous RS flip-flop 16.
- -Set and reset signals from identification circuits 15a and 15b as described above Is input to the asynchronous RS flip-flop 16, the asynchronous RS flip-flop 16 rises to logic “1” by the input of the set signal, thereby reproducing the rising edge of the original transmission signal waveform.
- the signal falls to logic "0", thereby reproducing the falling edge of the original transmission signal waveform.
- two transmissions one for rising timing transmission and one for falling timing transmission, an unnecessary time difference between the processing paths is delayed.
- the time constant adjusting circuits 154a and 154b compensate for it.
- the transmission signal waveform reproduced by the asynchronous RS flip-flop 16 becomes a binary signal having the same polarity and timing as before transmission.
- the circuit configuration of the optical signal transmission system described above can be applied to a semiconductor device test apparatus. Next, a semiconductor device S test apparatus to which the optical signal transmission system having the above circuit configuration is applied will be specifically described with reference to FIGS.
- rising and falling edge detection circuits 11a and 11b (not shown), transmission pulse generation circuits 12a and 12b, noise A transmitter consisting of fixed LD driver circuits 13a and 13b is provided.
- a receiving unit composed of flip-flops 16 is provided, and these transmitting and receiving units are connected using an optical fiber.
- the binary data transmitted is one of the values (0 or 1).
- the binary signal generated in the test equipment main body is divided into a rising edge and a falling edge, so as shown in FIG.
- the falling edge detection circuit 11a and 11b can be omitted, and the cost can be reduced.
- the polarity inversion pulse pair indicating the timing at which the rising edge and the falling edge of the transmission signal waveform cross the predetermined amplitude value (level) is as described above.
- the present invention is not limited to those shown in the drawings.
- a pulse pair for the rising timing and a pulse pair for the falling timing may have a polarity as shown in FIGS. 5 (a) to 5 (d).
- FIG. 5A is the same as the polarity inversion pulse pair used in the first embodiment.
- the rising and falling timings of the signal waveform to be transmitted are handled separately, and two transmission paths for transmitting the polarity inversion pulse pairs indicating the respective timings are provided.
- the polarity inversion pulse pairs indicating the rising timing and the falling timing can be distinguished from each other as pulse pairs whose polarities are inverted as shown in Fig. 5 (b) and (c), respectively.
- the transmission path between the transmission side and the reception side can be one.
- FIG. 6 is a block diagram showing a schematic configuration of an optical signal transmission system having a single transmission path according to a second embodiment of the present invention.
- the optical signal transmission system according to the present embodiment includes a transmitting and receiving apparatus T that includes rising and falling edge detection circuits 21a and 21b, transmission pulse generation circuits 22a and 22b, and an optical intensity modulation circuit 2.
- the receiving device R is provided with an AC-coupled receiving circuit 24 and identification circuits 25a and 25b.
- the transmitting device T and the receiving device R are connected by one optical fiber 26.
- the generation operation of the polarity inversion pulse pair in the transmission pulse generation circuits 22a and 22b, and the rising and falling timings in the identification circuits 25a and 25b The operation is basically the same as that of the system of the above-described first embodiment except that the detection operation is different.
- FIG. 7 is a waveform chart for explaining the operation of the optical transmission system shown in FIG. Next, the operation of each circuit will be specifically described with reference to FIG.
- the transmission pulse generation circuits 22a and 22b are bounded by the timing of the rising signal (a) and the falling signal (b) detected by the rising and falling edge detection circuits 21a and 21b. to polarity force? generates a transmission pulse signal consisting of pulse pair for inverting (c) ⁇ Pi (d) from each other.
- the transmission pulse signal (c) generated by the transmission pulse generation circuit 22a and the transmission pulse signal (d) generated by the transmission pulse generation circuit 22b have polarities mutually. The relationship is reversed so that it is possible to distinguish which indicates the rising timing and which indicates the falling timing.
- transmission pulse signals have a shape and pulse width independent of the original transmission signal waveform and are fixed, the pulse width is sufficiently shorter than the minimum pulse interval of the original transmission signal waveform, and The transmission pulse waveforms do not overlap each other with respect to the minimum pulse width.
- the width of each transmission pulse signal limits the minimum pulse width, the minimum pulse interval, and the minimum pulse width of a signal waveform that can be transmitted.
- the light intensity modulation circuit 23 and the AC coupling reception circuit 24 have the same configuration as that shown in FIG. 1 described above.
- the light intensity modulation circuit 23 generates a transmission pulse.
- the pulse signals for transmission from the circuits 22a and 22b are input, and a pair of polarity-reversed optical pulses (light intensity signal (e)) is output based on these inputs. It receives the transmitted light intensity signal and outputs a received signal (f).
- the identification circuit 25a identifies the rising timing from the reception signal (f) detected by the AC coupling reception circuit 4, and the identification circuit 25b identifies the falling timing from the reception signal (f).
- the discriminating level L1 which is a reference for timing discrimination
- the rising discriminating start level L in which the power s amplitude is set sufficiently low that noise and signal can be separated from power s
- the identification circuit 25a is instantaneously activated at the time A when the rising edge of the received signal (f) crosses the identification start level L2, and the identification circuit 25b is instantaneously activated. Then, the identification circuit 25a identifies a point B at which the waveform of the received signal (f) crosses the identification level L1 within a fixed delay time, and generates a timing pulse at this point B.
- the identification circuit 25b When identifying the fall timing, the identification circuit 25b is instantaneously activated at the time C when the falling edge of the received signal (f) crosses the identification start level L3, and at the same time, the identification circuit 25a Is instantaneously disabled, the identification circuit 25b identifies the point D when the waveform of the received signal (f) crosses the identification level L1 within a certain delay time, and generates a timing pulse at this point D .
- the identification circuit 25b is inoperable for a certain period of time from the time A when the rising edge of the received signal (f) crosses the identification start level L2. After identifying the point B when the waveform of the received signal (f) crosses the identification level L1, the identification circuit 25b further incorrectly identifies the point C ′ when the waveform of the received signal (f) crosses the identification level L3. c is not possible to identify Te
- the identification circuit 2 5 b After identifying the point D when the waveform of the received signal (f) crosses the identification level L3, the identification circuit 2 ⁇ a further increases the point A when the waveform of the received signal (f) crosses the identification level L1. 'Is not misidentified.
- each of the discriminating circuits 25a and 25b is not in an operating state. There is nothing to do.
- the timing pulse (rising timing) generated from the identification circuit 25a is used as, for example, a set signal of an asynchronous RS flip-flop circuit, the rising edge can be reproduced.
- the falling edge can be reproduced by using the timing pulse (falling timing) obtained in the same way from the falling edge identification circuit 25b as the reset signal of the asynchronous RS flip-flop circuit.
- the original binary transmission signal waveform can be reproduced.
- circuit configuration described below is an example of a circuit configuration that realizes the present transmission system, and does not limit the configuration of the present invention.
- FIG. 8 is a block diagram showing an example of a specific circuit configuration of the optical signal transmission system shown in FIG. It is a lock figure.
- a rising and falling edge detection circuit 31a and 31b for detecting a rising edge and a falling edge of a transmission signal waveform on the transmission side and these edge detection circuits 31a and 31b Pulse generating circuits 32a and 32b to which the output signal of the input is inputted, and a bias-fixed LD driving circuit 333 using both output signals of the transmission pulse generating circuits 32a and 32b as driving signals.
- an AC-coupled receiving circuit 34 On the receiving side, an AC-coupled receiving circuit 34, an identification circuit 35a and 35b, each receiving the output of the AC-coupled receiving circuit 34, and an output signal of the identifying circuit 35a as a set signal
- an asynchronous RS flip-flop 36 is provided which uses the output signal of the identification circuit 35b as a reset signal, and the transmission side and the reception side are connected by an optical fiber.
- the rising and falling edge detection circuits 31a and 31b, the transmission pulse generation circuits 32a and 32b, and the AC coupling reception circuit 34 have the same circuit configuration as that shown in Fig. 6 above. Since they have and perform the same operation, their description is omitted here.
- the fixed-noise L DJI sleep circuit 33 is a circuit that drives a laser diode ( ⁇ rf shown), which is an element.
- the transmission pulse generation circuits 32a and 32b generate rising and falling timings. and the boundary of the laser diode is driven as the polar force? drive signal pulses pair of mutually inverted, generating a light intensity modulated signal.
- a bias current is applied to the laser diode in advance to keep the laser diode in a state of always emitting light, and the drive is performed.
- a conventional method of adding a modulation current according to a signal to a drive current of a laser diode is used.
- the identification circuit 35a is a comparator for timing identification 350a, a comparator for determining whether or not to operate the comparator 350a, a delay adjustment circuit 352a, Delay 'Time constant adjustment circuit 35 5 a, 35 4 a, and 35 55 a.
- the identification circuit 35b is a comparator 350b for timing identification, a comparison 351b for determining whether or not to operate the comparator 350b, and a delay adjustment circuit 35. 2b, delay 'time constant adjustment circuit 35 3b, 35 4b, and 35 5b.
- the output of the AC coupling receiving circuit 34 is branched into two, Is supplied to one input terminal of the comparator 3501a, and the other is supplied to one input terminal of the comparator 350a via the delay adjustment circuit 3552a.
- the rising edge identification start reference voltage is input to the other input terminal of the comparator 35 1 a.
- the comparator 3 51 51a determines whether to operate the comparator 350a.
- the output signal of the comparator 351a is input to the enable (Enable) signal input terminal of the comparator 150a via the delay and time constant adjustment circuit 353a, and the delay and time constant are adjusted. It is input to the disable signal input terminal of the comparator 35 1 b via the circuit 35 54 a so that the operation of the comparators 350 a and 35 1 b can be controlled. It has become.
- the other input terminal of the comparator 350a is grounded, and the comparator 350a rises timing by comparing the ground potential with the input signal voltage from the AC coupling receiving circuit 34. Is determined.
- the output signal of the comparator 350a is input to the S (set) terminal of the asynchronous RS flip-flop 36 via the delay / time constant adjusting circuit 365a.
- the output of the AC-coupled receiving circuit 34 is also branched into two, one of which is connected to one input terminal of the comparator 351b and the other is connected to the delay adjustment circuit 352b. And supplied to one input terminal of the comparator 350b.
- the other input terminal of the comparator 35 1 b receives a falling identification start reference voltage, which is compared with the input from the AC coupling receiving circuit 34.
- the comparator 351b determines whether to operate the comparator 350b.
- the output signal of the comparator 35 1 b is input to the enable signal input terminal of the comparator 150 b via the delay / time constant adjusting circuit 35 3 b, and the delay / time constant is adjusted.
- the signal is input to the disable signal input terminal of the comparator 351a via the circuit 354b so that the operation of the comparators 350b and 351a can be controlled. I have.
- the other input terminal of the comparator 350b is grounded, and by comparing the ground potential with the input signal voltage from the AC coupling receiving circuit 34, the comparator 350b falls timing. Is determined.
- the output signal of this comparator 350b is delayed Input to the R (reset) terminal of the asynchronous RS flip-flop 36 via the path 355b.
- Rising and falling edge detection circuit 31a and 31b are identical to the optical signal transmission system according to the second embodiment.
- the rising edge detection circuit 31a detects the rising edge of the input transmission signal waveform
- the falling edge detection circuit 31b detects the falling edge of the input transmission signal waveform. Detect edges.
- the rising edge of the transmission signal waveform detected by the rising edge detection circuit 31a is supplied to the transmission pulse generation circuit 32a, and the transmission pulse generation circuit 32a determines the timing of the supplied rising edge. At the boundary, a pair of polarity inversion pulses are generated that invert each other. Similarly, the transmission pulse generating circuit 32b generates a polarity reversal pair and a reversal pair in which the polarities are reversed with respect to the supplied falling edge timing.
- the bias-fixed LD drive circuit 33 drives the laser diode using the polarity inversion pulse pairs generated by the transmission pulse generation circuits 32a and 32b as a drive signal, and generates light comprising the polarity inversion light pulse pairs. Generate an intensity modulated signal. This light intensity modulated signal is transmitted to the receiving side via the optical fiber, and is received by the AC coupling receiving circuit 34. Upon receiving the light intensity modulation signal, the AC coupling receiving circuit 34 converts only the AC component of the received light intensity modulation signal into an electric signal. As a result, the original polarity inversion pulse pair is generated and output as a received signal.
- the reception signal output from the AC coupling reception circuit 34 is branched into two, one of which is input to the identification circuit 35a, and the other is input to the identification circuit 35b.
- the received signal input to the identification circuit 35a is first input to the comparator 351a.
- Comparator 3551a detects that a pulse has been input by comparing the voltage of the input received signal with the reference voltage at the start of rising detection, and outputs a pulse-like signal.
- This pulse-shaped output signal is split into two, one of which is processed by the delay 'time constant adjustment circuit 3 5 3 a, and the other is the delay' time constant adjustment circuit 3 5 4 a, to produce a signal with a sufficient pulse width.
- the signal is input to the enable signal input terminal of the comparator 350a and the disable signal input terminal of the comparator 351b.
- the comparator 350a When the enable signal is input, the comparator 350a starts operating, and identifies the central portion of the polarity inversion pulse pair (received signal), that is, the timing at which the polarity is inverted, and this identification is performed. Outputs a pulse signal (timing signal) indicating the timing.
- the comparator 351b becomes inoperable for a certain period of time, and prevents the comparator 355b from malfunctioning during the inability to operate.
- the discrimination circuit 35a adjusts the delay so that the comparator 351a operates before the polarity inversion pulse pair (reception signal) reaches the one input terminal of the comparator 350a.
- the delay time of the input path of the polarity inversion pulse pair (received signal) to these comparators 350a and 3501a is adjusted by the circuit 352a and the delay / time constant adjusting circuit 355a.
- the delay time of the path is adjusted by the delay / time constant adjusting circuit 354a so that the comparator 351b becomes inoperable. Has been adjusted.
- the timing signal output from the comparator 350a is processed into a signal with a sufficient pulse width by the delay / time constant adjustment circuit 350a, and then the asynchronous RS flip-flop 36 S (set) Input to the terminal.
- the received signal is input to the identification circuit 35b.
- the comparator 35Ib detects that a pulse has been input by comparing the voltage of the input received signal with the reference voltage for starting falling identification, and outputs a pulse-like signal.
- This pulse-shaped output signal is split into two, one of which is a delay and time constant adjustment circuit 353b, and the other is processed by a delay and time constant adjustment circuit 354b to produce signals with sufficient pulse width.
- the signal is input to the enable signal input terminal of the comparator 350b and the disable signal input terminal of the comparator 351a.
- the comparator 350b When the enable signal is input, the comparator 350b starts operating, and identifies the central portion of the polarity inversion pulse pair (received signal), that is, the timing at which the polarity is inverted, and this identification is performed. Outputs a pulse signal (timing signal) indicating the timing.
- the comparator 351a when the disable signal is input, the comparator 351a is disabled for a certain period of time, and prevents the comparator 355a from malfunctioning during this disabled operation.
- the discriminating circuit 35b adjusts the delay so that the comparator 3551 operates before the polarity inversion pulse pair (received signal) force s reaches one input terminal of the comparator 350b.
- the delay time of the input path of the polarity inversion pulse pair (received signal) to these comparators 350b and 351b is adjusted by the 3552ab and the delay ⁇ time constant adjusting circuit 353b. cage, Moreover, the polarity inversion as a pulse pair after the signal is a comparator 3 5 1 a force s inoperative before reaching the delay 'time constant adjustment circuit 3 5 4 delay time by connexion paths b There are 'adjusted.
- the timing signal output from the comparator 355b is processed into a signal with a sufficient pulse width by the delay / time constant adjustment circuit 355b, and then the R (reset) terminal of the asynchronous RS flip-flop 36 Is input to
- the asynchronous RS flip-flop 36 receives the set signal.
- two transmissions, one for the rise timing transmission and the other for the fall timing transmission an unnecessary time difference between the processing paths is delayed.
- the time constant adjustment circuits 3555a and 3555b compensate for this.
- the transmission signal waveform reproduced by the asynchronous RS flip-flop 36 becomes a binary signal having the same polarity and timing as before transmission.
- the comparators and other circuit elements are provided with the comparators used in the case of the electrical transmission method. Further, higher operation performance is required than the other circuit elements and the comparator and other circuit elements used in the first embodiment.
- the circuit configuration of the optical signal transmission system according to the second embodiment described above can also be applied to a semiconductor noise testing device.
- a semiconductor device test apparatus to which the optical signal transmission system having the above circuit configuration is applied will be specifically described with reference to FIG.
- rising and falling edge detection circuits 31a and 31b (not shown), transmission pulse generation circuits 32a and 32b, and bias fixed LD
- a transmitter consisting of a drive circuit 33
- a receiver consisting of an AC coupling receiver 34, identification circuits 35a and 35b, and an asynchronous RS flip-flop 36 is provided on the test head side.
- An optical fiber is used between the transmitter and the receiver. Connect. ⁇
- the value of the binary data to be transmitted (0 or 1) Is converted to a transmission pulse signal consisting of a pair of polarity inversion pulses indicating the timing at which only the rising edge and the falling edge of the signal waveform cross the predetermined amplitude value (level) in the transmitter. Since the original transmission signal waveform is electrically reproduced from the identified rising and falling timings in the receiving unit, the signal can be reproduced without causing polarity and timing errors.
- the binary signal generated in the test equipment main body is divided into a rising edge and a falling edge, as shown in FIG.
- the falling edge detection circuits 31a and 31b can be omitted, and the cost can be reduced.
- FIG. 10 shows a specific example of the optical pulse transmitting apparatus 101 for implementing the optical signal transmission method according to the present invention.
- a light emitting element LD like a laser diode 5 'is used, and constant current circuits 110A, 110B, and 110C are connected to the light emitting element LD.
- the constant current circuits 110A and 110B are connected to the light emitting element LD through the current switches 111A and 111B, respectively, and the constant current circuit 110C is directly connected to the light emitting element LD.
- the following shows the case. Therefore, the current I c flowing through the constant current circuit 110 C is constantly injected into the light emitting element LD.
- the current switches 111A and 111B are turned on when H logic (logic high level) is applied as a control voltage, and turned off when L logic (logic low) is applied. .
- the control terminal of the current switch 1 1 1 A is connected directly to the input terminal IN.
- the control terminal of the current switch 111B is connected to the input terminal IN through a series circuit composed of the inverter 112 and the delay element 113.
- a positive pulse P as shown in FIG. 11A is applied to the input terminal IN.
- the current switch 11A is immediately turned on as shown in Fig. 11B.
- the polarity of the pulse P is inverted by the inverter 112 and supplied to the current switch 111B with a delay by the delay element 113, so that the current switch 111B is controlled to be always on.
- the pulse P is controlled to be turned off for the duration of the pulse width Td.
- the current injected into the light emitting element LD is the sum of the currents Ib and Ic flowing through the constant current circuits 110B and 110C when there is no signal, as shown in FIG. Ca? is injected as Baiasu current pulse P current flows through all of the constant current circuit 1 1 0 A ⁇ 1 1 0 C period is input to the input terminal iN I a, I b, the sum of I c I a + I b + I c power is injected, and at the timing after the pulse P falls, both the current switches 11 A and 11 B are controlled to be in the OFF state. Only the current I (; flowing through 10 C is injected.
- a bias current injected to the light emitting element LD is next I b + I c, the current I a + I b to swing in positive and negative about the bias current I b + I c + I c and I (:?.. mosquito emitting element is injected into Otsu 0 emission intensity of the light emitting element LD is the same waveform as the current waveform shown in FIG. 1 1 D current I c is shown in FIG. 1 1 D In this manner, the light emitting element has a value larger than the threshold current I ON for starting the LD light emission.
- FIG. 12 shows a specific example of the detection circuit 107 provided in the receiving device 102.
- the detection circuit 107 has a current-to-voltage conversion circuit 107A that converts a light-receiving current signal output from the light-receiving element PD into a voltage signal, a smoothing circuit 107B, and hysteresis. This shows a case where the voltage comparator 107 C is used.
- the current-to-voltage conversion circuit 107 A can be composed of an operational amplifier A and a feedback resistor R.
- the smoothing circuit 107B can be constituted by a time constant circuit having a time constant sufficiently larger than the pulse width P of the transmitted pulse P.
- the signal is sent from the transmission side to the non-inverting input terminal of the voltage comparator 107C through this smoothing circuit 107B.
- a reference voltage corresponding to the bias value The output signal of the current-to-voltage conversion circuit 107 A is directly input to the inverting input terminal of the voltage comparator 107 C.
- the smoothing circuit 1 0 7 B is given a reference voltage corresponding to the bias current I b + I c transmitted constantly from the transmitting side.
- the voltage comparator 107C outputs an H logic to the output terminal 107D depending on whether the voltage applied to the inverting input terminal is higher or lower than the reference voltage with respect to the reference voltage applied to the non-inverting input terminal. Either L logic or L logic is output.
- the voltage comparator 107C has a hysteresis characteristic between the two input terminals, even if the voltage of both input terminals is equal to the reference voltage, the non-inverting input terminal When the signal returns to the same reference voltage from the state of swinging to the negative side from the inverting input terminal, the output terminal 107D is held at L logic and returns to the same reference voltage from the state of swinging to the positive side. In this case, it is kept at H logic.
- the current-to-voltage conversion circuit 107 A generates the bias voltage V shown in FIG. and it outputs the B and the pulse waveform V P.
- smoothing circuit 1 0 7 B is input pulse waveform V P is the pulse waveform V P smoothes the reference voltage that matches the bias voltage V B to the non-inverting input terminal of the voltage comparator 1 0 7 C Continue to supply.
- the output terminal 1 0 7 0 of the voltage comparator 1 0 7 C becomes 1 logic. Accordingly, the output terminal 1 0 7 D of the voltage comparator 1 0 7 C outputs a pulse P V shown in FIG. 1 3 C.
- This pulse PV has a rising timing whose pulse waveform V p at the inverting input terminal of the voltage comparator 107 C has a positive-side hysteresis width even if the bias current I b + I c of the light-receiving current signal IP fluctuates.
- FIG. 14 shows another specific example of a device for transmitting an optical pulse.
- the function of aligning the pulse width of the input pulse to an optical pulse with a constant pulse width This is the case where the circuit configuration has a pulsar.
- the electric pulse P input to the input terminal IN is supplied directly to one input terminal of the NOR (NOR) gate 114, and the other input terminal is passed through a series circuit consisting of the inverter 112 and the delay element 113.
- an electric pulse P is supplied to one input terminal of a NAND gate 115 through a series circuit including the inverter 112 and the delay element 113, and the electric pulse P is supplied to the inverter 116 and the delay.
- the signal delayed by the element 117 is supplied to the other input terminal of the NAND gate 115.
- the output signal of 115 is given as a control signal of the current switch 111B.
- Figure 15A shows the pulse P input to the input terminal IN.
- Fig. 15 B is an inverter
- FIG. 15C shows the waveform of the pulse PC supplied to the other input terminal of the NAND gate 1 15 through the inverter 1 1-6 and the delay element 1 17.
- the light emitting element LD flows with a waveform that swings symmetrically in the positive and negative directions around the average current Ib + Ic.
- the light emitting element is driven without changing the average current value, it is easy to obtain the same operation and effect s ′ as described in FIGS. 10 to 13 in the specific example shown in FIG. You can understand.
- the pulse waveform of the light pulse emitted by the light emitting element LD Is limited to a fixed pulse width determined by the delay time Td of the delay element. Therefore, even if the input pulse P is long, the output optical pulse is limited to a constant value, and the smoothing circuit 107 B ( This has the advantage of avoiding the inconvenience of fluctuating the reference voltage output by (see Fig. 12).
- FIG. 16 shows still another specific example of the optical pulse transmitting device 101.
- An example of transmitting the pulse width of the source to the receiving side That is, a case is shown in which the light emitting element is controlled to emit light by generating a positive / negative symmetric signal swinging to the positive side and the negative side at both the rising timing and the falling timing of the pulse P to be transmitted.
- a control circuit for the current switch 111 A in this example, it is composed of two AND gates 118, 119 and NOR gate 120, and the AND gate 118 has an input Pulse P (Fig. 17A) and the pulse PB (Fig. 17B) passed through the inverter 1 1 2 and the delay element 1 1 3 are input to the other AND gate 1 1 9 and the inverter 1 1 2 and the pulse PB (Fig. 17B) through the delay element 1 13 and the pulse P C (Fig. 17C) through the inverter 1 16 and the delay element 1 17 are supplied, and each AND gate 1 1 'Output the outputs of 8 and 1 1 9 through NOR gate 1 20.
- a negative pulse PD shown in FIG. 17D is obtained at the output of the NOR gate 120. Pulse P D of the negative polarity is generated in both the rising timing and the falling timing of the input pulse P, is input to the current switch 1 1 1 A.
- the current switch 111 A is composed of two AND gates 118, 119 and NOR
- 11A is controlled to be off for a period equal to the delay time Td at both the rising and falling timings of the input pulse P.
- the control circuit of the current switch 1 1 1 B is divided into two NOR gates 1 2 1 and 1 in this example.
- the NOR gate 1 2 1 receives a pulse through the input pulse P (Fig. 17A), the inverter 1 1 2 and the delay element 1 1 3
- the pulse Pc (Fig. 17C) extracted through 1 17 is supplied to each NOR gate 1
- Fig. 17 ⁇ shows the voltage output signal of the current-to-voltage converter circuit 107A when the optical pulse driven by the current I shown in Fig. 17F is received by the receiver shown in Fig. 12. Number.
- the time between each zero-cross point of the received voltage output signal corresponds to the pulse width Pw of the input pulse P on the transmitting side, and the output terminal 107D of the voltage comparator 107C is In this case, the pulse PH of negative polarity shown in Figure 17H is output, and the pulse PH having the same pulse width Pw as the pulse width Pw of the input pulse P on the transmitting side can be received.
- the pulse width Pw of the received pulse PH is also a positive / negative symmetrical waveform (FIG. 17F) centered on the average current Ib + Ic, as in the case described with reference to FIGS. Since the light is transmitted, the average value of the light on the optical transmission line does not change according to the presence or absence of the signal. Therefore, as described with reference to FIGS. 10 to 13, the smoothed output voltage of the smoothing circuit 107 B provided in the preceding stage of the voltage comparator 107 C fluctuates according to the transmission and reception of the signal. It is kept constant. In addition, even if the injection current of the light emitting element LD versus the output optical power characteristic (see Fig.
- the pulse width of the received pulse PH exactly matches the pulse width P w of the input pulse P on the transmitting side regardless of the variation in the characteristics of the light emitting element LD because the hysteresis width of the voltage comparator 107 C follows the center of the I do.
- the transmitting device T includes an optical intensity modulator 460
- the receiving device includes an AC-coupled receiving device 461, and an identification circuit 462, and the transmitting device T and the receiving device R is connected by an optical fiber 463.
- FIG. 20 is a timing chart for explaining the operation of the optical transmission system of FIG. 19. As an example, the rising edge of the signal waveform (timing when the amplitude value of the rising edge exceeds 50%) It is shown. Below, each time with reference to Figure 20 The operation of the road will be specifically described.
- the light intensity modulator 460 generates a pair of polarity inversion pulses (b) whose polarities are inverted with each other at the rising edge of the binary digital input signal (a).
- the polarity inversion pulse pair (b) one having a pulse shape and pulse width sufficiently shorter than the minimum pulse interval of the original transmission signal waveform may be used. In other words, the minimum pulse interval of the original transmission signal waveform is limited by the pulse width of the polarity inversion pulse pair (b).
- the polarity inversion pulse pair (b) receives a certain delay when it is generated, and even if it becomes a pulse (e) delayed as shown by the dotted line in FIG. 20, this delay is always constant and known. With this value, the receiver can use it as a timing signal without any problem.
- the light intensity modulation circuit 460 performs light intensity modulation on the offset light conventionally used based on the polarity inversion pulse pair (b).
- a light emitting element (not shown) is driven using a modulation method, and a pair of light pulses whose polarities are inverted with respect to each other at a timing where the amplitude value of a rising edge of a transmission pulse signal waveform exceeds a predetermined value. Output as signal (c). This light intensity signal (c) is transmitted to the receiving device R via the optical fiber 463.
- the AC-coupled receiver circuit 461 is a circuit that detects the received light intensity signal (c) by the conventionally used AC-coupling method, as shown in the received signal (d) shown at the bottom of FIG. Signal power is detected.
- the received light intensity signal (c) is a light pulse signal modulated based on the polarity inversion pulse pair (b) that inverts each other at the rising edge, so that it is always bipolar. the present pulse power s, therefore, test out the received signal (d) are never as it contains many pulses offset to one polarity.
- An identification circuit 462 constituting the signal reproduction processing means identifies a rising edge (a timing exceeding a predetermined amplitude value) from the reception signal (d) detected by the AC coupling reception circuit 461.
- the discrimination level L1 which is a reference for timing discrimination, and the discrimination start timing set in advance to a sufficiently low level that noise and signal strength can be separated.
- the given identification start level L2 see Fig. 20
- the following identification operation is performed.
- the rising edge force of the received signal (d) ?
- the identification circuit 462 is activated instantaneously when the signal crosses the identification start level L2, and the point when the signal crosses the identification level L1 within a certain delay time is identified. To generate a timing pulse.
- the operation of the discrimination circuit 462 is maintained for a time corresponding to the pulse width, and the time when the reception signal (d) crosses the discrimination level L1 is determined. Determined as identification timing and generates a timing pulse. Performed signal reproduction processing power s and based on the number of timing pulses. According to this discriminating operation, the discriminating circuit 462 does not operate when the pulse force s does not exist, so that a low-level fluctuation due to noise is not mistakenly discriminated as a pulse.
- the timing pulse for example, rising timing
- the identification circuit 462 is used as a set signal of, for example, an asynchronous RS (set-reset) flip-flop circuit
- the light intensity modulator 460 generates a pair of polarity inversion pulses based on both the rising and falling timings of the transmission signal. (These polarity inversion pulse pairs have their polarities inverted.)
- detection circuits consisting of logic circuits, etc. for respectively detecting the rising edge and the falling edge of the transmission signal are individually provided, and a light intensity modulator is provided for each of these detection circuits, so that the rising timing and the rising timing are determined.
- the fall timing is transmitted separately.
- the receiving side also has two circuit configurations, a rising timing receiving system and a falling timing receiving system, and the timing pulse force related to the rising and falling edges is generated in each transmission system to perform the signal reproduction processing.
- the rising edge and the falling edge can be reproduced by using the timing pulse generated by each discriminating circuit as the ti # synchronous RS flip-flop times set and reset signals.
- the original binary transmission signal waveform can be reproduced.
- the specific circuit configuration and operation of the light intensity modulator 460 will be described in detail. I do. ⁇
- FIG. 18 is a circuit diagram showing a first specific example of the light intensity modulator according to the third embodiment of the present invention
- FIG. 21 is a timing chart for explaining the operation.
- This light intensity modulation device comprises a drive circuit having current switch circuits 401 to 403, and a semiconductor laser 405 connected to output terminals 404a and 404b of the drive circuit. It is configured.
- the current switch circuit 401 is composed of transistors 4111a to 4111c and a resistor 412 for current adjustment.
- the transistor 41 ia has its collector connected to the output terminal 404 a line (here, the line connected to this output terminal 404 a is referred to as the V CC line), and its base connected to the digital signal input.
- the emitter is connected to the terminal 406a, and its emitter is commonly connected to the emitter of the transistor 411b and the collector of the transistor 411c.
- the transistor 411b has a collector connected to the output terminal 404b, and a base connected to the digital signal input terminal 406b.
- Transistor 4 1 1 c the Emitta force? Via the resistor 4 1 2 is connected to the ground line, thereby the constant current source is configured.
- the current switch circuit 402 is composed of transistors 421a to 421c and a resistor 422 for adjusting current.
- Transistor 4 2 1 a is connected to the digital signal input terminal 4 0 6 a through Sonobe one Ska?
- Delay circuit 4 0 7 a its collector connected to output terminal 4 0 4 b, its Emitta It is commonly connected to the emitter of the transistor 421 b and the collector of the transistor 421 c.
- the transistor 421b has its collector connected to the output terminal 404a line (Vcc line), and its base connected to the digital signal input terminal 406b via the delay circuit 407b. is, the transistor 4 2 1 c, the Emitta force?
- the current switch circuit 4003 includes transistors 431a to 431c and a resistor 432 for current adjustment.
- Transistor 431a has its collector connected to the output terminal 404a line (Vcc line) and its base connected to digital signal input terminal 404 via delay circuits 407a and 407c. 6a connected to its emitter Commonly connected to the emitter of transistor 4311b and the collector of transistor 4311c.
- Transistor 4 3 1 b has its collector connected to output terminal 4 0 4 b and connected to digital signal input terminal 4 6 b via its base delay circuit 4 7 b and 4 7 d.
- the emitter of the transistor 431c is connected to the ground line via the resistor 432, thereby forming a constant current source.
- the resistance of the resistor 432 is set to the same value as the resistance of the resistor 412 of the current switch circuit 401.
- the bases of the transistors 411c, 421c, and 431c of the current switch circuits 401 to 4003 are commonly connected to the base of the transistor 408, and the terminals 410 Connected to a.
- the transistor 408 has its collector connected in common with the base and is connected to the ground line via its emitter resistor 440. Thus, a predetermined current can be supplied to the output terminal 404b for supplying a current to the semiconductor laser 405 in accordance with the current supplied to the terminal 410a.
- It also has a transistor 410 connected to the ground line via an emitter resistance 441, a base connected to the terminal 410b, and a collector connected to the output terminal 404b.
- a predetermined bias current can be supplied to the semiconductor laser 405 in accordance with the current supplied to the terminal 410b.
- differential digital signals whose logic is inverted with respect to each other are input to the digital signal input terminals 406a and 406b.
- the timing mosquito s caused to change in the signal as shown in a differential digital signal input ( 'This Figure 2 1 (a), accordingly switched first-stage current Suitsuchi circuit 4 0 1 force s A change in current as shown in FIG. 21 (b) occurs in the semiconductor laser 405.
- the delay circuits 407a and 407b (or the difference between the response speed of the current switching circuit 401 and the response speed of the current switching circuit 402 itself) cause the current to change. a delay of switch circuit 4 0 1 operation than a predetermined time, the second-stage current switching circuit 4 0 2 force? switches, to change the semiconductor laser 4 0 5 of current as shown in (c) of FIG. 4 2 1 Join.
- the current switch circuits 401 and 402 have inverted logic, and their current adjusting resistors 4122 and 4 2 2 indicates that the resistance value of the resistor 4 2 2 is 1/2 of the resistance value of the resistor 4 1 2, and the change in current by the current switch circuit 4 2 is It is twice the current change due to 0 1.
- the semiconductor laser 405 By the switching by the current switch circuits 401 to 403 described above, the semiconductor laser 405 generates a current changing force as shown in FIG. 21 (e). As a result, the semiconductor laser 405 is driven by the current waveform as shown in FIG. 21 (e), that is, by the polarity inversion pulse pair, and the rising timing and the falling timing as described above. Optical transmission as a pair of polarity-reversed optical pulses whose polarities are reversed from each other.
- the resistance value of the resistance 42 2 of the current source of the current switch circuit 402 is set to 1/2 of the resistance value of the resistance 42 1 of the current source of the other switch circuit.
- the force s is configured so that twice the current is supplied by the current switch circuit 402.
- the present invention is not limited to this configuration.
- the current switch circuit 40 The line to which the two current sources are connected may be connected to a line capable of supplying twice as much current as another switch circuit.
- the input side comparator shown in Fig. 26 is provided on the digital signal input terminal side, and the differential digital signals whose logics are inverted in accordance with the digital input signal.
- the signal may be generated.
- the light intensity modulation device of this example it is possible to use various semiconductor laser light emitting means (the light emitting element), it can also be used optical transmission power s possibly other light emitting means (the light source) .
- the optical transmission system using the above-described light intensity modulation device can be applied to, for example, a semiconductor device test device.
- a transmission unit consisting of a transmission waveform conversion circuit and a light intensity modulation circuit is provided on the test equipment main body side of the semiconductor device test equipment, and an AC coupling reception circuit, identification circuit, asynchronous RS flip-flop, etc. are provided on the test head side.
- a receiver is constructed, and a connection between the transmitter and the receiver is made using an optical fiber.
- the above-described semiconductor device test apparatus has a configuration in which the test apparatus main body side has a transmission section and the test head side has a reception section.
- the reverse configuration (the test apparatus main body side has a reception section and the test head side has a test section) It is also possible to take the configuration of a transmission unit).
- Occurring timing as in the conventional discrimination level is biased to one of the data values of the binary signal, also, the length Since time-fixed DC-like data can also be accurately identified, high-precision optical transmission can be performed with high accuracy even for signals with an indefinite period and a DC component.
- An optical transmission system and method can be provided. There are advantages.
- a transmission method for transmitting a waveform of an optical pulse transmitted through an optical transmission line from a bias value by an equal amount in the directions of positive and negative polarities and transmitting a positive / negative symmetric waveform that is equal to the bias value on average is possible.
- a DC component was added to the transmitted pulse waveform, and on the receiving side, a reference voltage was generated by the smoothing circuit 107B on the receiving side, so that the injection current vs. emission light power characteristics of the light emitting element LD fluctuated.
- the voltage comparator 107 C will maintain a hysteresis width centered on the reference voltage. Therefore, if the hysteresis width is maintained at a constant value, the pulse detection point detected on the receiving side does not move, and the occurrence of jitter is suppressed.
- the pulse reception detection point is specified as a zero-cross point of a positive / negative symmetric waveform, the pulse crosses the bias point at the highest speed in the received signal. This has the advantage that the most accurate reception point detection can be performed.
- the edges of both pulse waveforms do not become discontinuous in the polarity inversion part as in the related art, so that high timing accuracy is achieved. in and thus force s can perform optical transmission of signals.
- an optical transmission system or a semiconductor device test apparatus using an optical intensity modulator exhibiting the above-mentioned effects can increase the signal transmission speed, improve the frequency characteristics, and reduce the weight, Advantages such as higher reliability can be obtained.
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Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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DE69835259T DE69835259T8 (de) | 1997-01-22 | 1998-01-22 | System und verfahren zur optischen pulsübertragung |
EP98900703A EP0895368B1 (en) | 1997-01-22 | 1998-01-22 | Optical pulse signal transmission and method |
US09/155,163 US6381054B1 (en) | 1997-01-22 | 1998-01-22 | Optical pulse transmission system, optical pulse transmitting method, and optical pulse detecting method |
JP53412598A JP3632031B2 (ja) | 1997-01-22 | 1998-01-22 | 光パルス伝送システム、これを利用する装置及び光パルス伝送方法 |
KR1019980707426A KR100328618B1 (ko) | 1997-01-22 | 1998-01-22 | 광펄스전송시스템,광펄스전송방법및광펄스검출방법 |
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JP927197 | 1997-01-22 | ||
JP9/9271 | 1997-01-22 | ||
JP1871297 | 1997-01-31 | ||
JP9/18712 | 1997-01-31 | ||
JP23426397 | 1997-08-29 | ||
JP9/234263 | 1997-08-29 |
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US09/155,163 A-371-Of-International US6381054B1 (en) | 1997-01-22 | 1998-01-22 | Optical pulse transmission system, optical pulse transmitting method, and optical pulse detecting method |
US09/960,153 Division US6819876B2 (en) | 1997-01-22 | 2001-09-20 | Optical pulse transmission system, optical pulse transmitting method and optical pulse detection method |
US09/957,952 Division US6778783B2 (en) | 1997-01-22 | 2001-09-21 | Optical pulse transmission system, optical pulse transmitting method and optical pulse detecting method |
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WO1998032247A1 true WO1998032247A1 (fr) | 1998-07-23 |
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PCT/JP1998/000246 WO1998032247A1 (fr) | 1997-01-22 | 1998-01-22 | Systeme de transmission d'impulsions optiques, procede de transmission d'impulsions optiques, et procede de detection d'impulsions optiques |
Country Status (8)
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US (3) | US6381054B1 (ja) |
EP (1) | EP0895368B1 (ja) |
JP (1) | JP3632031B2 (ja) |
KR (1) | KR100328618B1 (ja) |
CN (1) | CN1153382C (ja) |
DE (1) | DE69835259T8 (ja) |
TW (1) | TW399373B (ja) |
WO (1) | WO1998032247A1 (ja) |
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- 1998-01-22 KR KR1019980707426A patent/KR100328618B1/ko not_active IP Right Cessation
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JP2002023680A (ja) * | 2000-07-03 | 2002-01-23 | Mitsubishi Electric Corp | 定電流発生回路および表示装置 |
WO2003043248A1 (en) * | 2001-11-11 | 2003-05-22 | Huawei Technologies Co., Ltd. | Optical signal modulation method and the optical transmission system |
WO2003061160A1 (fr) * | 2002-01-09 | 2003-07-24 | Advantest Corporation | Circuit de modulation de phase, appareil d'essai, et systeme de communication |
JP2010258405A (ja) * | 2009-04-03 | 2010-11-11 | Sumitomo Electric Ind Ltd | レーザダイオード駆動回路及び光送信器 |
WO2011033921A1 (ja) * | 2009-09-15 | 2011-03-24 | 学校法人慶應義塾 | 集積回路 |
WO2014057598A1 (ja) * | 2012-10-09 | 2014-04-17 | 日本電気株式会社 | 光送信システム、光位相変調器、及び光変調方法 |
US9425898B2 (en) | 2012-10-09 | 2016-08-23 | Nec Corporation | Optical transmission system, optical phase modulator, and optical modulation method |
US9966979B2 (en) | 2015-01-28 | 2018-05-08 | Kabushiki Kaisha Toshiba | Transmission circuit, reception circuit and communication system |
KR20200062729A (ko) * | 2018-11-27 | 2020-06-04 | 현대오트론 주식회사 | 라이다 장치 및 라이다의 신호 처리 방법 |
KR102283233B1 (ko) * | 2018-11-27 | 2021-07-29 | 현대모비스 주식회사 | 라이다 장치 및 라이다의 신호 처리 방법 |
Also Published As
Publication number | Publication date |
---|---|
US20020012145A1 (en) | 2002-01-31 |
DE69835259T2 (de) | 2007-07-19 |
EP0895368A1 (en) | 1999-02-03 |
US20020008892A1 (en) | 2002-01-24 |
DE69835259T8 (de) | 2007-10-31 |
CN1216182A (zh) | 1999-05-05 |
US6381054B1 (en) | 2002-04-30 |
KR20000064702A (ko) | 2000-11-06 |
US6819876B2 (en) | 2004-11-16 |
DE69835259D1 (de) | 2006-08-31 |
CN1153382C (zh) | 2004-06-09 |
TW399373B (en) | 2000-07-21 |
KR100328618B1 (ko) | 2002-08-27 |
US6778783B2 (en) | 2004-08-17 |
EP0895368A4 (en) | 2000-05-31 |
JP3632031B2 (ja) | 2005-03-23 |
EP0895368B1 (en) | 2006-07-19 |
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