WO1997029517A2

WO1997029517A2 - U/v radiation detector

Info

Publication number: WO1997029517A2
Application number: PCT/CH1997/000025
Authority: WO
Inventors: Daniel Bolliger; Piero Malcovati; Pasqualina Sarro
Original assignee: Laboratorium Für Physikalische Elektronik
Priority date: 1996-02-05
Filing date: 1997-01-28
Publication date: 1997-08-14
Also published as: WO1997029517A3

Abstract

In the u/v radiation detector, a photodiode (1) and an electronic evaluation system with bipolar transistors (29, 33) are integrated on a semiconductor substrate (2). The semiconductor layers used for the photodiode (1) and the bipolar transistors (29, 33) are produced separately, making it possible to optimise the individual components. The electronic evaluation system is produced by means of standard IC process steps, while the photodiode (1) involves additional intermediate steps. The photodiode (1) consists of three interlaced semiconductor layers (9-11) of different types of conductivity arranged in an epitaxial layer (5) on the semiconductor substrate (2). The photodiode semiconductor layers (9-11) are in contact through contact windows in oxide layers (14, 15, 17) at contact points with a first structured metal layer (16) forming a conductor system. A second metal layer (18) screens the electronic components from electromagnetic radiation. The spectral sensitivity is increased by means of an interference filter (23) and/or an absorption filter (24).

Description

UV RADIATION DETECTOR

The invention relates to a radiation detector which is particularly suitable for the detection of ultraviolet (UV) radiation, and a method for producing the same, according to the preambles of the independent claims.

Ultraviolet-sensitive radiation detectors made from semiconductor materials, in particular from silicon, are known. They are used, for example, in flame monitoring in combustion plants. Common to all is the pursuit of high spectral selectivity, i. H. after a high sensitivity at those UV wavelengths for which the emission of a burner flame is high, and after a low sensitivity at the other wavelengths. If this requirement is met, only the burner flame is actually monitored and extraneous light in the combustion chamber does not cause false signals.

The patent specification EP-296 371 tries to achieve a high photodiode sensitivity in the wavelength range between 200 nm and 400 nm by limiting the depth of the effective sensor volume. It is known (cf. S. Sze, "Physics of Semiconductor Devices", Wiley, New York, 1981) that the majority of UV radiation penetrating into silicon is absorbed in silicon after a penetration depth of 10 nm. In contrast, the penetration depth of longer-wave light (in the visible and infrared spectral range) is orders of magnitude greater, so that it is practically not absorbed in the thin sensor volume near the surface and does not contribute to the output signal. The depth of the effective sensor volume is limited by means of an additional potential threshold built into the silicon in a special manufacturing step. Additional optical absorption and interference filters as well as lenses in front of the photodiode can further improve the spectral sensitivity and selectivity.

The photocurrents of the UV radiation detector disclosed in EP-296 371 are very small, typically 1 pA to 1 nA. This makes the UV radiation detector sensitive to external electromagnetic interference. It is therefore necessary to install a signal amplifier very close to the photodiode. This can be achieved with many discrete components, for example in the patent specification CH-680 390. However, this increases the assembly effort and the arrangement is complex; in addition, with such a detector, the electrical connection paths between the individual components are long and therefore prone to failure.

In the patent specification EP-579 045, the photodiode and the evaluation electronics are integrated on the same chip. Such an integration brings with it the problem that the UV photodiode with a limited depth of the active sensor volume requires a special manufacturing process which is incompatible with processes used in the manufacture of integrated circuits (IC). For this reason, bipolar transistors and resistors must be developed and used for the evaluation electronics. EP 579 045 solves this problem by coupling doping values and layer thicknesses of the photodiode and the transistors to one another, ie using the same doped semiconductor layers for the photodiode and transistors at the same time. The disadvantage is that a compromise must be sought between the partially diametrically opposed requirements for good UV photodiodes and good transistors, which is unsatisfactory for both components. The evaluation circuit disclosed in EP-579 045 also has the disadvantage that it uses special electronic elements such as special bipolar transistors or high-impedance resistors which cannot be produced using standard processes.

In the case of the above-mentioned UV radiation detectors belonging to the prior art, the maximum sensitivity is at a wavelength of 310 nm. This is a serious disadvantage when used in flame monitoring. With a conventional arrangement of a flame detector in a fire system, it cannot be ruled out that extraneous light will fall into the combustion chamber. Sunlight in particular can have a greater intensity at 310 nm than the burner flame; Even light from fluorescent tubes can cover the flame signal at 310 nm. Thus, the above-mentioned UV radiation sensors would have to be operated in complete darkness and could only be used with great uncertainty in industrial burners into which stray light penetrates.

The integrated arrangement disclosed in EP-579 045 also has the disadvantage that unfiltered scattered light can fall onto the UV photodiode and the transistors without hindrance. In this way, parasitic currents are generated in the photodiode and in the transistors, which are still powerful be reinforced. External light in the combustion chamber leads to a large error signal.

Another disadvantage of EP-579 045 is the very long response time of up to 2.5 s of the electrical evaluation circuit. This makes the UV radiation detector disclosed therein unsuitable for flame monitoring in firing systems, since the risk that a flame failure will not be registered quickly enough and fuel will continue to be fed into the hot combustion chamber unburned for seconds poses a great security risk represents.

The use of a high-impedance resistor at the output of the amplifier circuit for transimpedance conversion, as disclosed in EP-579 045, means that the input of the signal processing stage to be used subsequently has to be extremely high-impedance, which is not common. It can even cause incompatibility issues.

It is therefore an object of the present invention to provide a UV radiation detector which does not have the disadvantages listed above, and to specify a method for its production. In particular, the photodiode and the evaluation electronics should be integrated on one chip; however, the semiconductor layers, which are used on the one hand for the photodiode and on the other hand for the transistors, should be able to be produced in a decoupled manner, so that a separate optimization of the UV sensor and the transistors is achieved without mutual impairment. The maximum sensitivity of the UV radiation detector should be at a wavelength below 250 nm, so that it is insensitive when used as a flame monitor on scattered radiation from the sun and artificial light sources. The sensitive spectral band should be adjustable in the manufacturing process.

The object is achieved by the UV radiation detector according to the invention and the method according to the invention for its production, as defined in the independent patent claims.

In the method according to the invention for producing a UV radiation detector, a bipolar standard process is used, as is customary in the manufacture of ICs. The evaluation electronics are produced with such a standard process. The photodiode is produced in a few additional additional steps that are shifted between the standard process steps. The manufacture of the photodiode is consequently decoupled from that of the evaluation electronics. Both components can therefore be optimized independently of one another in such a way that each individual component exhibits ideal behavior. The manufacturing method according to the invention is divided into method steps such that structures produced in previous method steps are not significantly impaired by the process variants and / or process temperatures used in one method step.

Specifically, the additional steps inserted into the standard process are the following: use of a thin TEOS oxide with a very low thermal budget, which is compatible with the bipolar transistors previously produced in standard process steps; Implantations of the photodiode layers; Contacting method for a thin PN junction with implanted polysilicon; two step etching process for the Opening the contact window; Adaptation of standard bipolar transistors; brief annealing of the photodiode layers without changing the properties of the bipolar transistors.

Basing on a standard process has great advantages. First, the design of the evaluation electronics is simple, because standard processes usually have libraries with common electronic components, so that they do not have to be newly developed. Second, manufacturing is quick and inexpensive because the technology is available.

The evaluation electronics circuit according to the invention uses a feedback-controlled differential amplifier with load current at both inputs and adjustable step response time. A constant input current is added to the photocurrent in an input stage; In a differential amplifier, the total current and the constant input current are amplified by an essentially identical amplification factor and converted into voltages, the difference of which serves as the output voltage. Only standard elements are used for the evaluation electronics.

Advantageous embodiments of the UV radiation detector according to the invention and advantageous variants of the production method result from the dependent patent claims. The UV detector can be efficiently shielded from stray light by applying a second metallization to its surface with the exception of the active sensor surface. Interference filters directly on the active sensor surface and / or absorption filters in front of the photodiode additionally improve the spectral selectivity. The invention is described in detail below with reference to figures. Show:

1 shows a schematic cross section through a photodiode according to the invention,

2 shows schematic doping concentrations in the photodiode according to FIG. 1,

3 shows schematic electronic band structures in the photodiode according to FIG. 1,

4 shows a schematic cross section through a vertical bipolar transistor,

5 shows a schematic cross section through a lateral bipolar transistor,

6 shows a schematic cross section through a contact window produced using a two-stage etching process according to the invention,

7 shows an electrical circuit diagram of an input stage of an amplifier according to the invention,

8 shows an electrical circuit diagram of a differential amplifier of an amplifier according to the invention and

9 shows an electrical circuit diagram of a feedback-controlled differential amplifier according to the invention. For the purpose of a clearer representation, individual elements of FIGS. 1, 4 and 5 are not drawn to scale in the vertical direction. For the same reason, the same vertical and horizontal scales are not used in FIGS. 1, 4, 5 and 6.

In the UV radiation detector according to the invention, a photodiode and an evaluation circuit are integrated in a single integrated circuit on the same chip. For the sake of clarity, however, schematic cross sections through exemplary embodiments of photodiode and transistors are shown separately in FIGS. 1 and 4 and 5. The integrated circuit is located on a surface of a generally doped semiconductor substrate and essentially consists of semiconductor layers which differ in their position, geometry and doping with different charge carriers of different concentrations.

In the case of doped semiconductor materials, a distinction must be made between semiconductor materials of a first conductivity type P or N and semiconductor materials of a second conductivity type N or P. In the following, the assumption applies that the first conductivity type is P and the second conductivity type is N; it is well understood that the reverse is also possible with the UV radiation detector according to the invention. The designation P ⁺ denotes a semiconductor material of the first conductivity type which is more strongly doped with foreign atoms than one which is labeled P; the same applies to N ⁺ with respect to N.

FIG. 1 shows a schematic cross section through an embodiment of a photodiode 1 according to the invention. A UV radiation detector according to the invention can be used with one or even with several such photodiodes be equipped. A semiconductor substrate 2 is preferably doped so that it belongs to the first conductivity type P; For example, the semiconductor substrate 2 is one having an impurity concentration of 10 ¹⁴ -10 ¹⁷ ^{cm -3,} preferably 5 "10 ^1S ^{cm" 3,} doped monocrystalline, preferably <100> oriented, silicon wafer. Immediately on a surface 3 of boron or phosphorus There is a first, structured semiconductor layer 4 of the second conductivity type N ⁺ , a so-called buried layer 2, on the semiconductor substrate 2. The entire surface 3 of the semiconductor substrate 2 is covered with a second semiconductor layer 5 of the second conductivity type N, preferably one 3.5 μm thick epitaxial layer made of monocrystalline silicon doped with a concentration of IO ¹⁶ cm ^"3 . Connection regions 6 of the second conductivity type N ⁺ connect the buried layer 4 to the surface 7 of the epitaxial layer 5. An insulation ring 8 (of which only one cross-sectional area is shown in FIG. 1) of the first conductivity type P ⁺ laterally surrounds the photodiode 1 and isolates them electrically from the other components of the UV radiation detector.

The photodiode 1 essentially consists of a sequence of differently doped structured semiconductor layers in the epitaxial layer 5. A first photodiode semiconductor layer 9 of the first conductivity type P lies at a depth of approximately 800 to approximately 350 nm below the surface 7 of the Epitaxial layer 5. A second photodiode semiconductor layer 10 of the second conductivity type N ⁺ adjoins it and ranges from approximately 350 nm to approximately 100 nm. A third photodiode semiconductor layer 11 of the first conductivity type P ⁺ lies directly below the surface 7 of the epitaxial layer 5 and is approximately 100 nm thick. The three photodiode semiconductor layers 9-11 are interleaved: at their edge, the first photodiode semiconductor layer 9 extends to the surface 7 of the epitaxial layer 5, so that the second photodiode semiconductor layer 10 on the surface 7 in the first photodiode half - layer 9 is arranged; The same applies analogously to the second and third photodiode semiconductor layers 10 and 11. The first and second photodiode semiconductor layers 9 and 10 have connection regions 12 and 13 of the first conductivity type P ⁺ and the second semiconductor type N, respectively Mistake.

On the surface 7 of the epitaxial layer 5 there is a first, structured oxide layer 14 outside the photodiode 1 and in the area of the photodiode 1 a second, structured oxide layer 15, which are interrupted in particular in the connection regions 12, 13, so that contact windows are formed . A first, structured metal layer 16 on the first and second oxide layers 14 and 15 forms a conductor system with corresponding contacts in the connection regions 12, 13; it is preferably 600 nm thick and preferably consists of aluminum with approximately 1% silicon. A third, structured oxide layer 17 separates the first metal layer 16 from a second, structured metal layer 18. The second metal layer 18 is preferably 600 nm thick and preferably consists of aluminum with approximately 1% silicon. It mainly serves to keep electromagnetic radiation away from the electronic components and thus to avoid unwanted parasitic photo currents and error signals. A 150-400 nm thick, preferably 200 nm thick polycrystalline silicon layer 19 of the first conductivity type P ⁺ essentially forms the connection region 20 of the third photodiode semiconductor layer 11. It prevents 16 metal tips from being deposited by the extraordinarily thin third layer when the first metal layer 16 is applied Photodiode semiconductor layer 11 penetrate ("spiking") and form undesirable short-circuits of the PN junction between the third and second photodiode semiconductor layers 10 and 11. There are no metal layers above the actual photodiode 1, so that there an entry window 21 (only partially shown in FIG. 1) enables the access of electromagnetic radiation 22 to be detected to the photodiode 1. The entrance window 21 can be provided with an interference filter 23 which only allows a desired part of the electromagnetic spectrum, for example UV radiation with wavelengths between 200 nm and 250 nm, to pass. Methods for calculating such interference filters 23 are known per se (cf. B. Baltes, D. Bradley, "Interference filters for the far ultraviolet (1700 Å to 2400 Ä)", Appl. Opt. 5, 971-975 (1966)) . With a suitable choice of the interference filter layers, the transmission of the interference filter 23 can be matched to the desired spectral band, ie the wavelength at which the UV radiation detector has its maximum sensitivity can be set during manufacture. For example, an interference filter 23 for the wavelength of 310 nm can consist of a sequence of the following layers listed in the direction of incidence of the light: 37.5-42.5 nm, preferably 40.0 nm, SiO ₂ ; 12.5-17.5 nm, preferably 15 nm, Al; 70-76 nm, preferably 72.5 nm, SiO ,; 17-23 nm, preferably 19.8 nm, Al; 68-98 nm, preferably 83 nm, Si0 ₂ . This coating of the entry window 21 also serves to protect the photodiode 1 from external influences. An additional, suitably chosen absorption filter 24, which is attached in front of the entrance window 21, can additionally increase the spectral selectivity of the UV radiation detector.

The structure and the mode of operation of the photodiode 1 according to the invention according to FIG. 1 are further explained with reference to FIGS. 2 and 3. FIG. 2 shows schematically doping concentrations C (logarithmically plotted) in the photodiode 1 along the line II-II shown in broken lines in FIG. 1, as a function of the depth d. Therein line 25 means the concentration of charge carriers of the first conductivity type P, line 26 the concentration of charge carriers of the second conductivity type N and the line 27 the concentration of charge carriers of the first conductivity type P ⁺ . The individual regions 5, 9, 10, 11 and 19 correspond to the first, second and third photodiode semiconductor layers or the polycrystalline silicon layer.

FIG. 3 schematically shows the electronic band structures in the photodiode along the line II-II shown in dash-dot lines in FIG. 1, ie electrical potentials E as a function of the depth d. The line E _v corresponds to the valence band, the line E _{c to} the conduction band; E _F represents the Fermi level. A potential barrier 28 in the region of the second photodiode semiconductor layer 10 is clearly recognizable. Electromagnetic radiation 22 incident through the entrance window 21 is absorbed in the semiconductor materials and generates charge carriers. If the corresponding semiconductor material belongs to the first conductivity type P, the majority carriers are holes and the minority carriers are electrons, and vice versa. A course of the band structures, as shown in FIG. 3, is a direct consequence of the doping profiles shown in FIG. 2 and has the following two advantages.

First, the band structure contributes to the spectral selectivity of the photodiode. Such selectivity is achieved by the potential barrier 28 for holes and electrons caused by the second and third photodiode semiconductor layer, which limits the depth of the active sensor volume. This limitation means that practically only UV radiation with its small penetration depth (typically 10 nm or less in silicon) contributes to the photodiode output signal, but longer-wave electromagnetic radiation with greater penetration depths does not. Charge carriers that are generated beyond the potential barrier 28 can This is because they do not cross barrier 28 and therefore do not contribute to the photodiode output signal.

Second, the charge carriers are locally separated from one another by the band structure shown in FIG. 3 before they can recombine. The greatest doping concentration is in the second oxide layer 15 above the photodiode 1; the holes drift toward the boundary between the third photodiode semiconductor layer 11 and the second oxide layer 15 because of the internal electric field, while the electrons move in the opposite direction.

The doping concentrations and the band structures in the region of the entry window 21 are qualitatively similar to those in FIGS. 2 and 3.

FIGS. 4 and 5 show bipolar transistors which are known per se and can be produced using the method according to the invention on the same semiconductor substrate 2. They have the buried layer 4 already described on the occasion of FIG. 1 with a connection region 6, the epitaxial layer 5 and an insulation ring 8. Analogously to the photodiode 1 in FIG. 1, the bipolar transistors are covered with a first oxide layer 14 with contact windows, a first metal layer 16, a third oxide layer 17 and a second metal layer 18.

FIG. 5 shows a vertical bipolar transistor 29, for example of the NPN

Type. The epitaxial layer 5 acts as a collector, the buried layer 4 reducing the collector resistance. The base is covered by an approximately 200 nm thick, structured transistor semiconductor layer 30 of the first guide. Ability type P formed with a connection region 31. The emitter is formed by a second, structured transistor semiconductor layer 32 of the second semiconductor type N.

FIG. 6 shows a lateral bipolar transistor 33, for example of the PNP type. Here collector 34 and emitter 35 are formed analogously to the base connection region 31 of the vertical bipolar transistor from FIG. 5. The epitaxial layer 5 acts as a base.

In the method according to the invention for producing a UV radiation detector, a semiconductor substrate 2 with a surface 3 is assumed. Preferably, a doped semiconductor substrate 2 is selected which belongs to the first conductivity type P, for example one with a foreign atom concentration of 10 ¹⁴ -10 ¹⁷ cm ^"3 , preferably 5" 10 ¹⁵ cm ^"3 , doped with boron or phosphorus, Preferably <100> -oriented silicon wafer with a polished surface 3. The method according to the invention essentially consists of the following process steps carried out in succession: a) pretreatment of one surface 3 of the semiconductor substrate 2, b) production of bipolar transistors 29, 33 and parts of at least one photodiode 1 over this surface 3 of the semiconductor substrate 2, c) production of at least one photodiode 1 by successively implanting different ions with energies determining the depth of the implantation by means of appropriately structured photoresist layers and d) producing contact windows for contacting transistors 29, 33 and photodiode 1 and manufacture of a conductor system. The pretreatment of the surface 3 of the semiconductor substrate 2 comprises the production of the buried layer 4 and the epitaxial layer 5, the production of the insulation rings 8 and the connections 6 and the deposition of the first oxide layer 14; it is known per se. There are some process steps with high temperatures, typically over 1000 ° C.

The buried layer 4 is a first semiconductor layer of the second conductivity type N ^+, structured by means of photolithography, and is preferably produced by means of ion implantation, for example of antimony ions, and then annealed at approximately 1200 ° C. The second semiconductor layer 5 of the second conductivity type N is preferably deposited by means of epitaxy and is, for example, an arsenic-doped single-crystalline silicon layer with an arsenic concentration of approximately IO ¹⁶ cm ^"3. The insulation rings 8 of the first conductivity type P ⁺ and the connections 6 of the second Conductivity type N ⁺ are defined by means of photolithography and produced by implantation and diffusion of foreign atoms.The first oxide layer 14 is preferably deposited thermally at a temperature of approximately 1000 ° C., so that it has a thickness of approximately 330 nm.

The manufacture of bipolar transistors is known per se; A process which is advantageous for the invention is described below. For the vertical bipolar transistors 29 (as shown in FIG. 4), the base connection regions 31 are preferably first produced, then the bases 30 themselves and then the emitters 32. Simultaneously with the corresponding transistor elements, connection regions 12, 13 of the photo diode are produced in the method according to the invention. The base connection regions 31 and the photodiode connection regions 12 of the first semiconductor type P ⁺ are preferably made by implanting boron ions using a correspondingly structured photoresist layer made. The bases 30 of the first conductivity type P are preferably produced by implanting boron ions through a correspondingly structured photoresist layer. To produce the emitters 32 and the photodiode connection regions 13 of the second conductivity type N, a previously structured oxide mask, which can be formed by the suitably structured first oxide layer 14, is preferably required; arsenic ions are preferably implanted through these. Finally, the dopants are activated and tempered in a chemically inert environment, preferably for 10-90 minutes at 900-1250 ° C. in an argon environment.

For the lateral bipolar transistors 33 (as shown in FIG. 5), collectors 34 and emitters 35 of the first conductivity type P ^{+ are produced} analogously to the manufacture of the base connection regions 31 in the vertical bipolar transistors 29.

The above-described steps of the manufacturing method according to the invention can be carried out using processes customary in IC manufacturing. New special process steps are sometimes required for the production of the photodiode 1 described below. The consequent separation of the transistor production and the photodiode production according to the invention results in the decisive advantage that both components can be optimized independently of one another.

Before the photodiode production, the active photodiode region is first defined by producing a window in the first oxide layer 14 by means of photolithography and etching. Then a second oxide layer 15 applied as an implant oxide. This is preferably done by deposition of a 10-40 nm thick tetraethyl orthosilicate (TEOS) oxide layer using the gravure chemical vapor depositon process, for example at 700 ° C. for 4 minutes. Such a TEOS oxide layer 15 has the advantage that it can be manufactured with a low thermal budget.

The three photodiode semiconductor layers 9-11 of the photodiode 1 (shown in FIG. 1) are preferably produced in succession from the first, deepest, to the third photodiode semiconductor layer lying directly below the surface of the epitaxial layer 5. The implantation energies determine the depth, the implanted ions the conductivity type and the surface density the concentration of the layers 9-11. For the first photodiode semiconductor layer 9, ions of the first conductivity type, for example boron ions with a surface density of 10 ¹² -10 ¹⁴ cm ^"2 , preferably 3-10 ¹³ cm ^{" 2} , and an energy of 120-300 keV are used. preferably 170 keV implanted. For the second photodiode semiconductor layer 10, ions of the second conductivity type are used, for example phosphorus ions with a surface density of 10 ¹² -5 "10 ¹⁴ cm ^{" 2} , preferably 3 "10 ¹³ cm ^{" 2} , and with an energy of 90-250 keV , preferably 170 keV, implanted. For the third photodiode semiconductor layer 11, ions of the first conductivity type, for example boron ions with a surface density of 5 "10 ¹³ -5" 10 ¹⁵ cm ^"2 , preferably 1.5" IO ¹⁴ cm ^'2 , and with an energy of 4- 12 keV, preferably 8 keV, implanted.

For the contacting of bipolar transistors 29, 33 and photodiode 1, contact windows are produced at the contact points provided. This is done by means of photolithography and etching of the oxide layers 14, 15 present in each case at the contact points provided. First, electrical contacting of the third photodiode semiconductor layer 11 is prepared. For this purpose, the second oxide layer 15 is removed from the provided contact points by means of photolithography and etching. A 150-400 nm thick, preferably 200 nm thick, polycrystalline silicon layer 19 is deposited by means of gravure chemical vapor deposition methods over the photo diode 1 or also over the entire surface of the processed semiconductor substrate. Ions of the first conductivity type P ⁺ are implanted at the intended contact points through a photoresist layer, for example boron ions with a surface density of 10 ¹⁴ -5 "10 ¹⁵ cm ^{" 2} , preferably IO ¹⁵ cm ^"2 , and with an energy of 20-50 keV, preferably 25 keV. The resulting high doping concentration at the transition from the polycrystalline silicon layer 19 to the monocrystalline semiconductor permits low-resistance contact to the third photodiode semiconductor layer 11, which is only about 100 nm thick, without impairing its doping profile at the transition to the second photodiode semiconductor layer 10. Thereafter, if necessary, the polycrystalline silicon layer 19 is removed by means of photolithography and etching outside the photo diode 1. Finally there are two tempering steps, the thermal budget of which is such that the existing doping profiles do not diffuse out. In a first annealing step, the processed semiconductor substrate is annealed for 10-200 minutes, preferably 20 minutes, at 550-750 ° C., preferably 600 ° C., in a chemically inert environment, preferably an Ar environment. In a second annealing step, the processed semiconductor substrate is annealed for 3-20 s, preferably for about 5 s, at 900-1200 ° C, preferably at 970 ° C, in a chemically inert environment, preferably in an N ₂ environment .

During the subsequent metallization, the polycrystalline silicon layer 19 acts as a diffusion barrier and effectively prevents bring the first metal layer 16 metal tips through the extraordinarily thin third photodiode semiconductor layer 11 ("spiking") and undesired short-circuits of the PN junction between the third photodiode semiconductor layer 11 and the second photodiode semiconductor layer 10 form. In addition, the doping ratios allow low-resistance contacting of the third photodiode semiconductor layer 11.

Etching contact windows at the locations at which the first oxide layer 14 and the second oxide layer 15 are located one above the other with known, simple etching processes would have major disadvantages. On the one hand, a strong under-etching of the second oxide layer is observed with wet etching. On the other hand, dry etching leads to a rough contact surface, which results in an unacceptably high contact resistance. In order to eliminate these disadvantages, a new, two-stage etching process is used in the manufacturing method according to the invention. In a first etching step, dry etching is carried out, for example for about 30 seconds. In a second etching step, the remaining oxide (approx. 20 nm to 50 nm) is wet-etched away. The etching end point can be determined, for example, using a hydrophobicity test. FIG. 6 shows a schematic cross section through a contact window produced with the two-stage etching process according to the invention at a stage in which photoresist 36 has not yet been removed.

It is known that it is advantageous to immerse the entire processed substrate briefly in hydrofluoric acid (HF) immediately before the metallization in order to remove a naturally grown oxide layer. To produce electrical contacts and a conductor system, a first metal layer 16 is applied to the processed surface, preferably an approximately 600 nm thick layer of aluminum and 1% silicon by means of cathode sputtering at approximately 300 ° C. This first metal layer 16 is structured by means of photolithography and etching.

It is advantageous to cover practically the entire detector surface with the exception of the entrance window 21 with a second metal layer 18, which has the task of shielding the electronic components from unwanted electromagnetic radiation. For this purpose, a third oxide layer 17 is deposited on the processed surface, preferably 800 nm by means of plasma deposition at 350 ° C. This third oxide layer 17 can be structured by means of photolithography and etching. The second metal layer 18 is applied over the third oxide layer 17, preferably an approximately 1400 nm thick layer of aluminum and 1% silicon by means of cathode sputtering at approximately 300 ° C. This second metal layer 18 can also be structured by means of photolithography and etching. Finally, the processed semiconductor substrate is annealed at approximately 350-500 ° C., preferably at 400 ° C., in a chemically inert environment.

An interference filter 23 with transmission in the ultraviolet, which can simultaneously serve as a protective layer, is advantageously produced on the entrance window 21 of the photodiode 1. An interference filter 23 with maximum transmission around the wavelength of 310 nm can be produced, for example, by first reducing the oxide 15, 17 remaining on the active sensor surface by means of photolithography and etching to 68-98 nm, preferably 83 nm becomes. Then one after the other on the entry window 21 through a correspondingly structured photolithography layer a 17-23 nm thick, preferably 19.8 nm thick, Al layer, then a 70- 76 nm thick, preferably 72.5 nm thick, SiO 2 layer, then a 12.5-17.5 nm thick, preferably 15.0 nm thick, Al layer and then a 37.5-42.5 nm thick, preferably 40.0 nm thick, Si0 ₂ layer applied by means of vapor deposition or sputtering. Finally, the processed semiconductor substrate is annealed for 10-60 minutes, preferably 15 minutes, at 350-500 ° C., preferably 400 ° C., in a chemically inert environment, preferably in an N ₂ environment. Other layer combinations which lead to interference filters 23 with different transmission properties are possible. By producing a suitable interference filter 23, the spectral sensitivity and selectivity of the UV radiation detector can thus be selected and adjusted in the method according to the invention.

The evaluation electronics should on the one hand be able to process the electrical signal supplied by the photodiode 1 and on the other hand be able to be produced by the described production method. The photocurrents I _Ph supplied by the photodiode 1 according to the invention are in the picoampere range; the bipolar transistors 29, 33 described above and manufactured using the method according to the invention are, however, suitable for less small currents. Therefore, a constant input current I _{Bl is} symmetrically added to the photocurrent I _Pn in the evaluation electronics; the bipolar transistors 29, 33 can thus be operated at their optimum operating point.

FIG. 7 shows an exemplary embodiment of an input stage 37 of the evaluation circuit according to the invention. It allows good electrical isolation of the photodiode 1 from the electronic components of the UV radiation detector even at higher temperatures. The real photodiode 1 is schematically divided into an ideal UV photodiode in FIG. Iode 1.1, which is only sensitive to ultraviolet electromagnetic radiation, and a parasitic IR photodiode 1.2, which is sensitive to visible and IR radiation. The constant input current I _Bj is _fed into each of three identical input branches 38-40. Only the constant input current I _Bl flows in a first input branch 38. A second input branch 39 is connected to the anodic side of the ideal UV photodiode 1.1. There the UV photocurrent I _{Ph is added} to the constant input current I _Bi . In a third input branch 40, the cathodic currents of the two photodiodes are added to the constant input current I _Bl and led to earth; the anodic current of the IR photodiode is also led to earth. Three identical transistors Q _u , Q ₁₃ and Q ₁₅ are kept at the same base-emitter voltage by a constant voltage V _Bi . The constant input current I _Bl flows in a first output branch 41 of the input stage 37, while the total current I _Bl + I _Pn flows in a second output branch 42. These currents are fed into a differential amplifier 43.

An exemplary embodiment of a differential amplifier 43 of the evaluation circuit according to the invention is shown in FIG. 8; it is a totally symmetrical two-stage differential amplifier 43. The two input currents are conducted through two input branches 44, 45 into the differential amplifier 43. There they are multiplied by the factors ß ₁₆ and ß ₁₈ or ß ₁₉ and ß ₂₀ .

FIG. 9 shows a circuit diagram of an exemplary embodiment of an evaluation circuit according to the invention. It consists of the input stage 37, an amplifier 46 and a feedback loop / current source 47. The supply voltage is, for example, V _in = 5 V. The two currents amplified in the differential amplifier 43 are combined with one in the amplifier 46 Factor K is reflected in the transistors Q ₂₄ and Q ₂₃ and finally converted into voltages by resistors R ₃ and R ₂ , the difference V _{0 of which} serves as the output voltage. The evaluation circuit according to the invention is completely symmetrical, ie Q ₁₆ = Q ₂₀ , Q ₁₈ = Q ₁₉ and R ₂ = R ₃ . In this case the output voltage V _{0 is} given by V ₀ = ß ₁₆ ß ₁₈ KR ₃ I _Ph ; V ₀ is therefore independent of the input current I _Bi . Exemplary values of the preceding sizes are ß ₁₆ ß ₁₈ = 140, K = 2, R ₃ = 28 kΩ. This results in a resulting amplifier resistance of V ₀ / I _Ph = 1.1 GΩ for photocurrents I _Ph in the range of fractions from picoampere to nanoampere; a photodiode output current of I _Ph = 1 pA is thus converted into an output voltage of approximately V ₀ 1 mV.

Because of the large resulting amplifier resistance and in order to keep the noise low, the input current I _Bl must be small and well controlled. This is ensured by the feedback loop / current source 47, which is a partial copy of the amplifier stage 46: Q ₄ = Q ₁₈ , Q ₅ = Q ₁₆ and R _! = R ₃ . The feedback loop / current source 47 feeds the correct input current I _{Bi back} into the amplifier 46. The stability of the feedback loop is ensured by a compensation capacitor 48 of, for example, C _c = 12 pF. By changing a reference voltage V _Bi , the input current I _{Bl can be} precisely according to

can be set.

The charge carriers, which must charge the junction capacitance of the photodiode 1 of typically 2.7 nF, are supplied by both the input current I _Bj and the photocurrent I _Pn . The input current I _Bi in the large The order of a few nanoamperes is much larger than the photocurrent I _Ph in the order of a few picoamperes. By setting the input current I _Bl between 1 nA and 10 nA, the step response time can therefore be set between 500 ms and 50 ms. This is a major advantage of the circuit according to the invention.

If the UV photodetector is equipped with several photodiodes 1, the circuit must be modified slightly. Such modifications are easy for the person skilled in the art to make and are also part of the invention.

Claims

PATENT CLAIMS

1. A method for producing a UV radiation detector, consisting of at least one UV photodiode (1) and evaluation electronics with bipolar transistors (29, 33), the photodiode (1) and evaluation electronics on a surface (3) of a semiconductor substrate (2) of the first conductivity type (P), characterized by the following process steps carried out in succession:

a) pretreatment of one surface (3) of the semiconductor substrate (2),

b) production of bipolar transistors (29, 33) and parts of the at least one photodiode (1) over one surface (3) of the semiconductor substrate (2),

c) production of the at least one photodiode (1) by successively implanting different ions with energies determining the depth of the implantation by means of appropriately structured photoresist layers and

d) Production of contact windows for contacting the bipolar transistor (29, 33) and the photodiodes (1) and production of a

Conductor system.

2. The method according to claim 1, characterized in that process variants and / or process temperatures in such a step can be chosen so that structures produced in previous method steps are not significantly impaired.

Method according to Claim 1 or 2, characterized in that a single-crystalline silicon wafer of the first conductivity type (P) doped with a foreign atom concentration of 10 ^14-10 ¹⁷ cm ^{'3 is selected} as the semiconductor substrate (2).

4. The method according to any one of claims 1-3, characterized in that the pretreatment of one surface (3) of the semiconductor substrate (2) consists in the following steps:

al) production of a first, structured by means of photolithography

Semiconductor layer (4) of a second conductivity type (N ⁺ ) by means of ion implantation,

a2) production of a second, unstructured semiconductor layer (5) of the second conductivity type (N) by means of epitaxy,

a3) production of insulation rings (8) of the first conductivity type (P ⁺ ) by means of photolithography, implantation and diffusion of foreign atoms,

a4) Production of connections (6) of the second conductivity type (N ⁺ ) to the first semiconductor layer by means of photolithography, implantation and diffusion of foreign atoms and a5) deposition of a first oxide layer (14) by means of thermal oxidation.

5. The method according to any one of claims 1-4, characterized in that the production of bipolar transistors (29, 33) and parts of the at least one photodiode (1) consists in the following steps:

bl) implantation of ions of the first conductivity type (P ⁺ ) through a correspondingly structured photoresist layer for the purpose of producing connecting regions (12, 31, 34, 35),

b2) implantation of ions of the first conductivity type (P) through a correspondingly structured photoresist layer for the purpose of producing bases (30),

b3) implantation of ions of a second conductivity type (N) through a correspondingly structured oxide layer for the purpose of producing emitters (32) and connection regions (13) and

b4) Activation and annealing of the dopants for 10-90 minutes at 900-1250 ° C. in a chemically inert environment.

6. The method according to any one of claims 1-5, characterized in that for the at least one photodiode (1) three photodiode semiconductor layers (9-11) structured by means of photolithography are produced, the implantation energies being selected such that a first phase Todioden semiconductor layer (9) deepest, a third photodiode semiconductor layer (11) immediately below the surface (7) and a second photodiode semiconductor layer (10) between the first (9) and the third th (11) photodiode semiconductor layer comes to lie, and wherein for the first (9) and third (11) photodiode semiconductor layer ions of the first conductivity type (P, P ⁺ ) and for the second photodiode semiconductor layer (10) ions of the second conductivity type (N ⁺ ).

7. The method according to claim 6, characterized in that for the manufacture of the first photodiode semiconductor layer (9) boron ions are implanted with a surface density of 10 ¹² -10 ¹⁴ cm ^'2 and an energy of 120-300 keV Production of the second photodiode semiconductor layer (10) phosphorus ions with a surface density of 10 ¹² -5 -10 ¹⁴ cm ^"2 and with an energy of 90-250 keV are implanted and that for the production of the third photodiode semiconductor layer (11 ) Boron ions with a surface density of 5 * 10 ¹³ -5 - 10 ¹⁵ cm ^"2 and with an energy of 4-12 keV can be implanted.

8. The method according to any one of claims 4-7, characterized in that before the photodiode production, first in the region of the at least one photodiode, the first oxide layer (14) is removed by means of photolithography and etching, and then a 10-40 nm thick second oxide layer ( 15) is deposited as tetraethyl orthosilicate (TEOS) using the gravure chemical vapor deposit process.

9. The method according to any one of claims 1-8, characterized in that contact windows for contacting bipolar transistors (29, 33) and photodiodes (1) are produced by removing oxide (14, 15) from the intended contact points by means of photolithography and etching becomes.

10. The method according to claims 8 and 9, characterized in that a two-stage etching process is used to remove oxide (14, 15) at those points at which the first oxide layer (14) and the second oxide layer (15) are located one above the other is etched dry in a first etching step and remaining oxide is etched away wet in a second etching step.

11. The method according to any one of claims 6-10, characterized in that after the production of the photodiode semiconductor layers (9-11) an electrical contacting of the third photodiode semiconductor layer (11) is prepared by using oxide (15) from the contact points provided ¬ removed by photolithography and etching, a 150-400 nm thick polycrystalline silicon layer (19) by means of gravure chemical vapor

Deposition method over which the photodiode (1) is deposited, semiconductor layers of the first conductivity type (P ⁺ ) are produced by means of photolithography and ion implantation with an ^areal density of 10 ¹⁴ -5 10 ¹⁵ cm ² and with an energy of 20-50 keV and the processed semiconductor substrate is annealed for 10-200 minutes at 550-750 ° C in a chemically inert environment and for 3-20 s at 900-1200 ° C in a chemically inert environment.

12. The method according to any one of claims 1-11, characterized in that for the purpose of producing electrical contacts and a conductor system, a first metal layer (16) applied by means of sputtering, structured by means of photolithography and etching and at 350-500 ° C in a chemically inert environment is annealed.

13. The method according to any one of claims 1-12, characterized in that a second metal layer (18) is applied over the electronic components for the purpose of shielding electronic components from electromagnetic radiation.

:>

14. The method according to claim 13, characterized in that a third oxide layer (17) is deposited and structured by means of photolithography and etching, the second metal layer (18) is applied and structured by means of photolithography and etching and the processed semiconductor substrate at 350- 500 ° C in a chemically inert environment.

5 15. The method according to any one of claims 1-14, characterized in that an interference filter (23) with transmission in the ultraviolet spectral range is produced on the at least one photodiode (1).

16. The method according to claim 15, characterized in that the interference filter (23) is produced by reducing the oxide thickness on the photodiode (1) by means of photolithography and etching to 68-98 nm, onto the remaining oxide layer above the Photodiode (1) through a correspondingly structured photolithography layer one after the other a 17-5 23 nm thick Al layer, a 70-76 nm thick Si0 ₂ layer, a 12.5-17.5 nm thick Al layer and a 37.5-42.5 nm thick Si0 ₂ -Layer are applied by means of evaporation or cathode sputtering and the processed semiconductor substrate is annealed for 10-60 minutes at 350-500 ° C. in a chemically inert environment. 0

17. UV radiation detector, obtainable by the method according to one of claims 1-16, consisting of at least one photodiode (1) with an entrance window (21) for electromagnetic radiation (22) and evaluation electronics with bipolar transistors (29, 33) , the at least one photodiode (1) and the evaluation circuit being arranged in a second semiconductor layer (5) of the second conductivity type (N) on a surface (3) of a semiconductor substrate (2) of a first conductivity type (P), one first semiconductor layer (4) of the second conductivity type (N ⁺ ) is located between the semiconductor substrate (2) and the second semiconductor layer (5), which at least one photodiode (1) consists essentially of a first photodiode semiconductor layer (9) of the first conductivity type (P), from a second photodiode semiconductor layer (10) of the second conductivity type (N ⁺ ) and from a third photodiode semiconductor layer (11) of the first Lei ability type (P ⁺ ), the second photodiode semiconductor layer (10) on the surface (7) in the first

Photodiode semiconductor layer (9) is arranged and the third photodiode semiconductor layer (11) is arranged on the surface (7) in the second photodiode semiconductor layer (10) and the photodiode semiconductor layers (9-11) are contacted at contact points through contact windows in oxide layers (14, 15) on the surface of the second semiconductor layer (5) with a first, structured metal layer (16), characterized in that at the contact point of the third photodiode semiconductor layer (11) poly crystalline silicon layer (19) of the first conductivity type (P ⁺ ) between the third photodiode semiconductor layer (11) and the first metal layer (16).

18. UV radiation detector according to claim 17, characterized in that the polycrystalline silicon layer (19) is 150-400 nm thick. - 32 -

19. UV radiation detector according to claim 17 or 18, characterized in that there is a third oxide layer (17) above the first metal layer (16) and a second metal layer (18) above it, which is used to shield electronic components from electromagnetic radiation serves.

20. UV radiation detector according to one of claims 17-19, characterized ge indicates that the entrance window (21) is provided with an optical interference filter (23).

21. UV radiation detector according to one of claims 17-20, characterized ge indicates that an optical absorption filter (24) is attached in front of the entrance window (21).

22. Evaluation circuit for evaluating a photocurrent I _Pn for a UV radiation sensor according to one of claims 17-21, characterized by an input stage (37) in which a constant input current (I _Bl ) is added to the photocurrent (I _Ph ), from which a Total current (I _Bl + I _Pn ) results, and by an amplifier (46) with bipolar transistors (29, 33), in which the total current (I _Bi + I _Pn ) and the constant input current (I _Bl ) by an essentially same gain factor and converted into voltages, the difference as

Output voltage (V ₀ ) is used.

23. Evaluation circuit according to claim 22, characterized in that the constant input current (I _Bl ) is so large that the bipolar transistors (29, 33) of the amplifier (46) can be operated at their optimum operating point.

24. Evaluation circuit according to claim 22 or 23, characterized by a feedback loop (47) in which the constant input current (I _Bl ) is controlled and stabilized.

25. Evaluation circuit according to one of claims 22-24, characterized gekenn¬ characterized in that the constant input current (I _Bl ) with a reference voltage (V _Bl ) is adjustable.

26. Evaluation circuit according to claim 25, characterized in that the step response time of the circuit can be set by setting the constant input current (I _Bl ).