US9270512B2 - Nonlinearity compensation for reception of OFDM signals - Google Patents
Nonlinearity compensation for reception of OFDM signals Download PDFInfo
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- US9270512B2 US9270512B2 US14/541,312 US201414541312A US9270512B2 US 9270512 B2 US9270512 B2 US 9270512B2 US 201414541312 A US201414541312 A US 201414541312A US 9270512 B2 US9270512 B2 US 9270512B2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
- H04J11/0023—Interference mitigation or co-ordination
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/30—Monitoring; Testing of propagation channels
- H04B17/391—Modelling the propagation channel
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/30—Monitoring; Testing of propagation channels
- H04B17/391—Modelling the propagation channel
- H04B17/3912—Simulation models, e.g. distribution of spectral power density or received signal strength indicator [RSSI] for a given geographic region
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03178—Arrangements involving sequence estimation techniques
- H04L25/03305—Joint sequence estimation and interference removal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03821—Inter-carrier interference cancellation [ICI]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
- H04L27/366—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3845—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier
- H04L27/3854—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier using a non - coherent carrier, including systems with baseband correction for phase or frequency offset
- H04L27/3863—Compensation for quadrature error in the received signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W16/00—Network planning, e.g. coverage or traffic planning tools; Network deployment, e.g. resource partitioning or cells structures
- H04W16/14—Spectrum sharing arrangements between different networks
Definitions
- FIG. 1 shows an example transmitter operable to generate inter-carrier correlated (ICI) orthogonal frequency divisions multiplexed (OFDM) signals.
- ICI inter-carrier correlated
- OFDM orthogonal frequency divisions multiplexed
- FIG. 2 shows an example receiver operable to recover information from received ICI OFDM signals.
- FIG. 3 shows an example implementation of the reduced state sequence estimation (RSSE) circuitry of FIG. 2 .
- RSSE reduced state sequence estimation
- FIG. 4A shows a first example implementation of the nonlinear distortion model determination circuitry of FIG. 2 .
- FIG. 4B shows a second example implementation of the nonlinear distortion model determination circuitry of FIG. 2 .
- FIG. 5 shows a first example implementation of the interference estimation circuitry of FIG. 2 for use with a generalized third-order nonlinear distortion model.
- FIG. 6 shows a first example implementation of the interference estimation circuitry of FIG. 2 for use with a digital clipping nonlinear distortion model.
- FIGS. 7A-7D show an example implementation in which the receiver of FIG. 2 performs two or more iterations over the subcarriers of an OFDM symbol to recover the data of the OFDM symbol in the presence of nonlinear distortion.
- circuits and circuitry refer to physical electronic components (i.e. hardware) and any software and/or firmware (“code”) which may configure the hardware, be executed by the hardware, and or otherwise be associated with the hardware.
- code software and/or firmware
- a particular processor and memory may comprise a first “circuit” when executing a first one or more lines of code and may comprise a second “circuit” when executing a second one or more lines of code.
- and/or means any one or more of the items in the list joined by “and/or”.
- x and/or y means any element of the three-element set ⁇ (x), (y), (x, y) ⁇ .
- x, y, and/or z means any element of the seven-element set ⁇ (x), (y), (z), (x, y), (x, z), (y, z), (x, y, z) ⁇ .
- the terms “e.g.,” and “for example” set off lists of one or more non-limiting examples, instances, or illustrations.
- circuitry is “operable” to perform a function whenever the circuitry comprises the necessary hardware and code (if any is necessary) to perform the function, regardless of whether performance of the function is disabled, or not enabled, by some user-configurable setting.
- FIG. 1 shows an example transmitter operable to generate inter-carrier correlated (ICI) orthogonal frequency divisions multiplexed (OFDM) signals. Shown is a transmitter that comprises encoder circuitry 102 , mapper circuitry 104 , inter-subcarrier interference (ICI) generation circuitry 106 , inverse fast Fourier transform (IFFT) circuit 108 , and analog front end (AFE) 110 .
- ICI inter-carrier correlated
- OFDM orthogonal frequency divisions multiplexed
- the encoder circuitry 102 receives a vector of bits B ′ which are the bits of a particular OFDM symbol.
- the encoder circuitry 102 converts the bits B ′, to a vector of bits B , in accordance with a forward error correction (FEC) algorithm (e.g., Reed-Solomon, Low-Density Parity Check, Turbo, and/or the like).
- FEC forward error correction
- the mapper circuit 104 is operable to map the vector B to a vector A according to a selected modulation scheme.
- a quadrature amplitude modulation (QAM) scheme having an alphabet size of M M-QAM
- the mapper may map each Log 2 (M) bits of B to a value represented as a complex number and/or as in-phase (I) and quadrature-phase (Q) components.
- M-QAM is used for illustration in this disclosure, aspects of this disclosure are applicable to any modulation scheme (e.g., pulse amplitude modulation (PAM), amplitude shift keying (ASK), phase shift keying (PSK), frequency shift keying (FSK), etc.).
- PAM pulse amplitude modulation
- ASK amplitude shift keying
- PSK phase shift keying
- FSK frequency shift keying
- points of the M-QAM constellation may be regularly spaced (“on-grid”) or irregularly spaced (“off-grid”).
- the constellation used by the mapper 104 may be optimized for best bit-error rate (BER) performance (or adjusted to achieve a target BER) that is related to log-likelihood ratio (LLR) and to optimizing mean mutual information bit (MMIB) (or achieving a target MMIB).
- BER bit-error rate
- LLR log-likelihood ratio
- MMIB mean mutual information bit
- the ISC generation circuitry 106 is operable to process A to generate a vector C .
- the elements of A are referred to herein as “virtual subcarrier values” of the particular OFDM symbol and the elements of C are referred to herein as the corresponding “physical subcarrier values” of the particular OFDM symbol, where: the vector A comprises N values, the vector C comprises P values, N and P are positive integers, N ⁇ 2, and N ⁇ P.
- the N elements of A are represented herein as a 1 :a N , with any particular one of the values represented as a n .
- the P elements of C are represented herein as c 1 :c P , with any particular one of the values represented as c P .
- the processing performed by the circuitry 106 may comprise cyclic filtering and/or decimation such that each of the ISC values of C depends on a plurality (perhaps all) of the elements of A .
- the circuitry 106 may be similar to, or the same as, circuits 104 and 106 of the above incorporated Unites States Patent Application Publication US2013/0343473.
- ⁇ (an integer) pilot symbols may be inserted at the IFFT and the total number of physical subcarriers may be P+ ⁇ , where P is thus the quantity of data-carrying subcarriers.
- the inverse fast Fourier transform (IFFT) circuit 108 is operable to convert the physical subcarrier value vector C (of length P) to a corresponding vector of P time-domain samples (i.e., the time-domain representation of the particular OFDM symbol).
- the analog front end (AFE) 110 is operable to convert the P time-domain values output by IFFT 108 to an analog representation, upconvert the resulting analog signal, and amplify the upconverted signal for transmission onto a channel 112 .
- the transmitter front-end 118 may comprise, for example, a digital-to-analog converter (DAC), mixer, and/or power amplifier.
- the front-end 118 may introduce nonlinear distortion and/or phase noise (and/or other non-idealities) to the transmitted signal 117 .
- the nonlinear distortion introduced by the circuit 118 may be represented as NL Tx which may be, for example, a polynomial, or an exponential (e.g., Rapp model).
- the model of the nonlinear distortion may incorporate memory (e.g., Volterra series).
- the transmitted values C after being converted to the time domain, experiencing the nonlinear distortion introduced by the AFE 110 , and passing through the channel 112 (which may also introduce nonlinear distortion and/or noise), emerge as a signal 113 .
- FIG. 2 shows an example receiver operable to recover information from received ICI OFDM signals.
- the receiver comprises an analog front-end 202 , time domain preprocessing circuitry 204 , a fast Fourier transform (FFT) circuit 208 , frequency domain preprocessing circuitry 206 , nonlinear distortion model determination circuitry 214 , interference estimation circuitry 210 , and reduced state sequence estimation (RSSE) circuitry 212 .
- FFT fast Fourier transform
- RSSE reduced state sequence estimation
- the AFE 202 is operable to process the signal 113 corresponding to a particular OFDM signal to a vector of S ′ samples of the particular OFDM symbol. Such processing may comprise, amplification, downconversion (to IF or baseband), and analog-to-digital conversion.
- the receiver front-end 202 may comprise, for example, a low-noise amplifier, a mixer, and/or an analog-to-digital converter.
- the AFE 202 may, for example, sample the received signal 113 P times per OFDM symbol period resulting in a S ′ of length P (where pilot symbols are used, the AFE 202 may sample P+ ⁇ times per OFDM symbol).
- the receiver front-end 202 may introduce nonlinear distortion and/or phase noise to the signal S ′.
- the nonlinear distortion introduced by the front end 202 may be represented as NL Rx which may be, for example, a polynomial, or an exponential (e.g., Rapp model).
- the model of the nonlinear distortion may incorporate memory (e.g., Volterra series).
- the time domain preprocessing circuitry 204 is operable to perform time-domain processing of the samples S ′ to generate received physical subcarrier value vector S .
- Such processing may include, for example, timing acquisition, phase correction, frequency correction, decimation, DC removal, IQ mismatch correction, filtering, windowing, removal of pilot symbols, cyclic prefix removal, and/or the like.
- the FFT 208 is operable to convert the time-domain physical subcarrier value vector S (of length P) to a corresponding vector of P frequency-domain samples (i.e., convert the time-domain representation of S to the frequency-domain representation of S ).
- the frequency domain preprocessing circuitry 206 is operable to perform frequency domain processing of the output of the FFT 208 to generate a vector Y , which is a vector of N received virtual subcarrier values. Such processing may include, for example, performing the inverse of the ICI generation circuitry 106 ( FIG. 1 ), and performing per-subcarrier equalization.
- the elements of Y are represented herein as y 1 :y N , with any particular one of the values represented as y n .
- the RSSE circuitry 212 is operable to perform reduced state sequence estimation on the vector Y to generate a vector ⁇ which is the receiver's decision vector (“best guess” as to the transmitted virtual subcarrier value vector A ). Details of an example implementation of RSSE circuitry 212 are described below with reference to FIG. 3 .
- the nonlinear distortion model determination circuitry 214 is operable to determine a model, NL, that represents/enables reproduction of (to a desired accuracy) the nonlinear distortion experienced by the signal S ′ in the transmitter, the channel, and/or the receiver.
- the nonlinear distortion introduced by the AFE 110 of the transmitter may be dominant and NL may be a representation of NL Tx .
- the nonlinear distortion model, NL may be, for example, a logical and/or mathematical expression, a look-up table, and/or any other suitable representation of the nonlinear distortion. Any one or more of a variety of model types may be used for NL, with each model type being characterized by one or more parameters.
- the model type and/or parameter values may be communicated directly by the transmitter (e.g., during handshaking) and/or may be learned by the receiver by processing signals received from the transmitter (e.g., selection of the model type and/or training of the parameter values may be based on preambles sent by the transmitter).
- NL may comprise an AM/AM parameter whose value is dependent on transmitted signal strength, and an AM/PM parameter whose value is dependent on transmitted signal strength.
- received signal strength may be used as a proxy for transmitted signal strength and the received signal strength may be applied to the look-up table to determine appropriate values of the AM/AM and AM/PM parameters.
- the interference estimation circuitry 210 is operable to estimate the interference, F , present in the received virtual subcarrier values Y , based on Y and based on NL. Details of example implementations of 210 are described below with reference to FIGS. 5 and 6 .
- FIG. 3 shows an example implementation of the reduced state sequence estimation (RSSE) circuitry of FIG. 2 .
- the example RSSE circuitry 212 shown in FIG. 3 comprises nonlinear distortion circuitry 302 , metric calculation circuitry 306 , survivor selection circuitry 308 , buffering circuitry 310 , successor generation circuitry 312 , and buffering circuitry 314 .
- FIG. 2 depicts the RSSE circuitry 212 processing received virtual subcarrier value having index n (where 1 ⁇ n ⁇ N) of a particular OFDM symbol.
- the buffer circuitry 310 is operable to, upon completion of processing a particular received virtual subcarrier value of the OFDM symbol being processed, latch the selected survivor vectors such that those survivors are available for processing the next received virtual subcarrier value of the OFDM symbol.
- FIG. 3 which shows processing of received virtual subcarrier value having index n
- the survivors selected upon completion of processing the received virtual subcarrier value having index n ⁇ 1 ( ) are latched by the buffer 310 and output to the successor generation circuitry 312 .
- Each survivor comprises up to n elements corresponding to one or more of subcarriers 0 through n ⁇ 1. Elements of survivor are represented herein as , where D is the memory depth of the RSSE circuitry.
- the successor generation circuitry 312 is operable to extend each of the M survivors from the previous iteration, , to K successors, resulting in successors .
- Elements of successor vector are represented herein as , where is the element by which survivor was extended to create successor .
- the number of successors generated thus depends on the number of survivors, M, retained for each received virtual subcarrier value and the number of possible symbol transmitted virtual subcarrier values for which it is desired to search. Higher values of M and K may achieve improved results at the expense of increased size and complexity.
- the value of K may be chosen to be the size of the constellation used by mapper 104 ( FIG. 1 ) (e.g., for 64QAM K may be set to 64) such that each survivor is extended by each possible transmitted virtual subcarrier value.
- the nonlinear distortion circuitry 302 is operable to, for each of the M ⁇ K successors , generate a candidate vector by introducing nonlinear distortion to the successor G n m,k .
- Elements of candidate vector are represented herein as , where is the estimated constellation symbol of the (m,k) candidate for subcarrier index n, is the estimated constellation symbol of the (m,k) candidate for subcarrier index n ⁇ 1, and so on (where n is less than D, D-n elements may be values from an initialization of the RSSE circuitry).
- the nonlinear distortion introduced to each successor is determined based on NL from the nonlinear distortion model determination circuitry 214 ( FIGS. 1 , 4 A, and 4 B). In this manner, the circuitry 302 attempts to reproduce (to desired/necessary accuracy) the nonlinear distortion experienced by the signal 113 (or S ′ where nonlinear distortion of the AFE 202 is accounted for in NL)).
- the metric calculation circuitry 306 is operable to calculate branch a path metric, PM n m,k for each of the candidates , and output the path metrics to the survivor selection circuitry 308 .
- the branch metric for candidate may be calculated based on F . The manner in which the branch metric is calculated varies for different implementations. Some example branch metric calculations are described below with reference to FIGS. 5 , 6 , 7 B, 7 C, and 7 D.
- the survivor selection circuitry 308 is operable to compare the path metrics for each of the candidates and select the M best candidates (corresponding to the M best path metrics) as the survivors .
- the buffer circuitry 314 is operable to buffer samples of signal Y and/or initialization samples and may shift the samples out as signal Y n .
- the first n elements of Y n may be equal to the first n elements of Y and the remaining (D ⁇ n) elements of Y n may be known values used for initialization of the RSSE circuitry.
- FIG. 4A shows a first example implementation of the nonlinear distortion model determination circuitry of FIG. 2 .
- the example implementation of nonlinear distortion model determination circuitry 214 shown in FIG. 4A comprises circuitry 402 operable to estimate the nonlinear distortion experienced by S (the output of time-domain processing circuitry 204 in FIG. 2 ) in the time domain.
- the estimation of the nonlinear distortion may be based on, for example, preambles present in S ′, the received signal strength of 113 , and/or based on control information (e.g., a model type best suited for the transmitter from which signal 113 originated, initial nonlinear distortion model parameters, power level at signal 113 was transmitted, and/or the like) communicated to the receiver (e.g., during handshaking and/or in frame headers of S ).
- control information e.g., a model type best suited for the transmitter from which signal 113 originated, initial nonlinear distortion model parameters, power level at signal 113 was transmitted, and/or the like
- T time domain nonlinear distortion model
- FIG. 4B shows a second example implementation of the nonlinear distortion model determination circuitry of FIG. 2 .
- the frequency domain NL is determined in the frequency domain directly from Y .
- FIG. 5 shows a first example implementation of the interference estimation circuitry of FIG. 2 for use with a generalized third-order nonlinear distortion model.
- the example implementation of the interference estimation circuitry 210 in FIG. 5 comprises interference calculation circuitry 502 .
- the notation f n m,k represents an estimate of the aggregate interference present in the received virtual subcarrier value having index n for candidate .
- the aggregate interference estimate may, for example, be a complex number representing the magnitude and phase of the interference.
- the estimated aggregate interference may depend only on n (the received virtual subcarrier index) and may be the same for all of the candidates (i.e., each of the estimates f n 1,1 :f n M,K takes on the same value), but in other instances, the interference estimates may differ among the candidates .
- the aggregate interference estimate for candidate may be calculated exhaustively taking into account each of the other N ⁇ 1 virtual subcarriers.
- the aggregate interference estimate for candidate may be calculated taking into account only a selected subset of the other N ⁇ 1 virtual subcarriers. This may reduce the amount of calculations necessary.
- indexes of virtual subcarriers having power above a determined threshold may be included in the set Q (based on the assumption that low-energy virtual subcarriers will experience relatively little nonlinear distortion and thus not contribute a lot of interference).
- the branch metric (represented as BM n m,k ) for candidate may be calculated.
- FIG. 6 shows a first example implementation of the interference estimation circuitry of FIG. 2 for use with a digital clipping nonlinear distortion model.
- the interference estimation circuitry 210 comprises clipped subcarrier determination circuit 602 and interference estimation circuit 604 .
- the clipped subcarrier determination circuit 602 is operable to determine which transmitted virtual subcarriers values were digitally clipped in the transmitter during the transmission that resulted in signal 113 .
- the circuit 602 then outputs the indexes of the clipped subcarriers to the circuit 604 as vector I .
- the transmitter may directly send such information (e.g., in a header) and the circuit 602 may simply extract the information.
- the circuit 602 may determine which transmitted virtual subcarrier values were digitally clipped based on the magnitude of the received virtual subcarrier values.
- the interference F may be determined by NL and I .
- the branch metric for candidate may be calculated.
- FIGS. 7A-7D show an example implementation in which the receiver of FIG. 2 performs two or more iterations over the OFDM symbol to generate decisions as to the transmitted virtual subcarrier values of the OFDM symbol in the presence of nonlinear distortion.
- Shown in FIG. 7A is another example implementation of interference estimation circuitry 210 , which comprises nonlinear distortion circuitry 702 and combiner 704 .
- the nonlinear distortion circuitry 702 is operable to introduce nonlinear distortion to the received virtual subcarrier vector Y to generate Y ′.
- the nonlinear distortion introduced is determined based on NL from the nonlinear distortion model determination circuitry 214 ( FIGS. 1 , 4 A, and 4 B). In this manner, the circuitry 702 attempts to reproduce (to desired/necessary accuracy) the nonlinear distortion experienced by the signal 113 (or the signal S ′ where nonlinear distortion of the AFE 202 is accounted for in NL).
- the combiner 704 combines Y and Y ′ such that the output is the difference between Y and Y ′.
- the output of combiner 704 is —an initial approximation of the interference introduced by the nonlinear distortion experienced by Y . It is acknowledged that, because there is interference present in Y as a result of the nonlinear distortion that Y experienced en route to the circuitry 210 (at least a portion of which NL is attempting to model), this is not going to be an exact measure of the actual interference present in Y . Nevertheless, if the strength of the interference present in Y is relatively small compared to the desired signal strength, the amount of additional interference contributed by the existing interference during application of NL may be small enough that is a suitable approximation.
- a first iteration of processing the particular OFDM symbol is carried out by the RSSE circuitry 212 as shown in FIG. 7B .
- the RSSE circuitry 212 As is shown, during the first iteration on the particular OFDM symbol, is input to the metric calculation circuitry 306 , and the N subcarriers are processed sequentially.
- the sequential processing during the first iteration on the particular OFDM symbol comprises: extending, by successor generation circuitry 312 , each of the M selected survivors ( ) from the previous subcarrier to K successors ( ); distorting, by nonlinear distortion circuitry 302 , each of the M ⁇ K successors to generate candidates ; calculating, by metrics calculation circuitry 306 , metrics for each candidate n m.k using ; and selecting, by survivor selection circuitry 308 , the M best survivors .
- the metrics for candidate during the first iteration on the particular OFDM symbol are based on and y n+1 :y N (as a result of using ).
- FIGS. 7C and 7D illustrate an embodiment where a second iteration is performed in an attempt to improve the reliability of the estimates.
- circuitry 702 and 704 for the second iteration on the particular OFDM symbol, (rather than Y as was used in FIG. 7A ) is used by circuitry 702 and 704 for calculating F , which, as shown in FIG. 7D , is then input to metric calculation circuitry 306 for calculating metrics during the second iteration on the particular OFDM symbol.
- the successors are processed similarly to the first iteration.
- the sequential processing during the second iteration on the particular OFDM symbol comprises: extending, by successor generation circuitry 312 , each of the M selected survivors ( ) from the previous subcarrier to K successors ( ) distorting, by nonlinear distortion circuitry 302 , each of the M ⁇ K successors to generate candidates ; calculating, by metrics calculation circuitry 306 , metrics for each candidate using ; and selecting, by survivor selection circuitry 308 , the M best survivors .
- the metrics for candidate during the first iteration on the particular OFDM symbol are based on and (as a result of using F ).
- the M selected survivors are , and the best of these ( ) is selected for output to downstream circuitry such as a FEC decoder. In other implementations, additional iterations may be performed to refine these survivors even further.
- an electronic receiver may comprise nonlinear distortion modeling circuitry (e.g., 214 ), interference estimation circuitry (e.g., 210 ), and sequence estimation circuitry (e.g., 212 ).
- the receiver may receive an orthogonal frequency division multiplexing (OFDM) symbol in the form of an electromagnetic signal (e.g., 113 ).
- the nonlinear distortion modeling circuitry may generate a nonlinear distortion model (e.g., NL) that models nonlinear distortion introduced to the received electromagnetic signal en route to the sequence estimation circuitry.
- the interference estimation circuitry may estimate inter- subcarrier interference present in the received OFDM symbol based on the generated nonlinear distortion model.
- the sequence estimation circuitry may sequentially process a plurality of received virtual subcarrier values (e.g., Y ) of the OFDM symbol using the estimated inter-subcarrier interference.
- the processing may result in decisions as to a plurality of transmitted virtual subcarrier values (e.g., ) that correspond to the plurality of received virtual subcarrier values.
- the estimating of the inter-subcarrier interference may comprise applying the nonlinear distortion model to one or more candidate vectors (e.g., G n m,k ) generated by the sequence estimation circuitry.
- the estimating of the inter-subcarrier interference may comprise determining which one or more of the transmitted virtual subcarrier values were digitally clipped in a transmitter from which the received electromagnetic signal originated.
- the estimating of the inter-subcarrier interference may comprise calculating the inter-subcarrier interference based on which one or more of the plurality of transmitted virtual subcarrier values were digitally clipped in the transmitter and based on the generated nonlinear distortion model.
- the determining which one or more of the plurality of transmitted virtual subcarrier values were digitally clipped in the transmitter may comprise determining magnitude of each of the plurality of received virtual subcarrier values.
- the estimating of the inter- subcarrier interference may comprise applying the nonlinear distortion model to the received electromagnetic signal to generate an intermediate electromagnetic signal (e.g., Y ′).
- the estimating of the inter-subcarrier interference may comprise subtracting the received electromagnetic signal from the intermediate electromagnetic signal, a result of the subtraction being the estimate of the inter-subcarrier interference.
- the plurality of received virtual subcarrier values may comprise a first received virtual subcarrier value (e.g., y 0 ) and a second received virtual subcarrier value (e.g., y 1 ).
- the sequential processing may comprise processing the first received virtual subcarrier value to generate a decision as to a first one of the plurality of transmitted virtual subcarrier values (e.g., ) using an estimate of interference present in the first received virtual subcarrier value (e.g., f 0 ) that is based on the second received virtual subcarrier value.
- the sequential processing may comprise processing the second received virtual subcarrier value to generate a decision as to a second one of the plurality of transmitted virtual subcarrier values (e.g., ) using an estimate of interference present in the second received virtual subcarrier value (e.g., f 1 ) that is based on the generated decision as to the first one of the plurality of transmitted virtual subcarrier values.
- the plurality of received virtual subcarrier values may comprise a third received virtual subcarrier value (e.g., y 2 ).
- the estimate of interference present in the second received virtual subcarrier value may be based on the third received virtual subcarrier value.
- the sequential processing may comprise processing the third received virtual subcarrier value to generate a decision as to a third one of the plurality of transmitted virtual subcarrier values (e.g., ) using an estimate of interference present in the third received virtual subcarrier value (e.g., f 3 ) that is based on the generated decision as to the first one of the plurality of transmitted virtual subcarrier values and on the generated decision as to the second one of the plurality of transmitted virtual subcarrier values.
- a decision as to a third one of the plurality of transmitted virtual subcarrier values e.g., ) using an estimate of interference present in the third received virtual subcarrier value (e.g., f 3 ) that is based on the generated decision as to the first one of the plurality of transmitted virtual subcarrier values and on the generated decision as to the second one of the plurality of transmitted virtual subcarrier values.
- the sequential processing may comprise generating a plurality of branch metrics (e.g., BM 0 1,1 :BM N ⁇ 1 M,K ), wherein each of the plurality of branch metrics is based on a corresponding one of the received virtual subcarrier values, a candidate vector generated by the sequence estimation circuitry, and the estimated inter-subcarrier interference.
- the estimating of the inter-subcarrier interference may considers all others of the received virtual subcarrier values or only a subset of all others of the plurality of received virtual subcarrier values.
- the subset of all others of the plurality of received virtual subcarrier values may correspond to those of the plurality of received virtual subcarrier values having a magnitude above a determined threshold.
- the present method and/or system may be realized in hardware, software, or a combination of hardware and software.
- the present methods and/or systems may be realized in a centralized fashion in at least one computing system, or in a distributed fashion where different elements are spread across several interconnected computing systems. Any kind of computing system or other apparatus adapted for carrying out the methods described herein is suited.
- a typical combination of hardware and software may be a general-purpose computing system with a program or other code that, when being loaded and executed, controls the computing system such that it carries out the methods described herein.
- Another typical implementation may comprise an application specific integrated circuit or chip.
- Some implementations may comprise a non-transitory machine-readable (e.g., computer readable) medium (e.g., FLASH drive, optical disk, magnetic storage disk, or the like) having stored thereon one or more lines of code executable by a machine, thereby causing the machine to perform processes as described herein.
- a non-transitory machine-readable (e.g., computer readable) medium e.g., FLASH drive, optical disk, magnetic storage disk, or the like
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Abstract
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