US5283831A - Method of synchronizing the pseudo-random binary sequence in a descrambler - Google Patents
Method of synchronizing the pseudo-random binary sequence in a descrambler Download PDFInfo
- Publication number
- US5283831A US5283831A US07/915,860 US91586092A US5283831A US 5283831 A US5283831 A US 5283831A US 91586092 A US91586092 A US 91586092A US 5283831 A US5283831 A US 5283831A
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- US
- United States
- Prior art keywords
- binary sequence
- pseudo
- receiver
- bit
- random binary
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
- H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0605—Special codes used as synchronising signal
- H04J3/0611—PN codes
Definitions
- the present invention relates to the communication of digitally encoded data, and in particular to systems in which the data is scrambled in accordance with a binary sequence before transmission. As described below, the present invention has been found to be particularly advantageous in connection with the encoding of video signals but is also applicable to different forms of data.
- the coder may encode the input signal using, for example 5-bit hybrid DPCM (differential pulse code modulation) as described in the paper by M. C. W. Van Buul, "Hybrid D-PCM, A combination of DPCM and PCM", IEEE Trans. on Communications, Vol. COM-26, No. 3, 3/78 pp 362-8.
- 5-bit hybrid DPCM differential pulse code modulation
- the parallel 5-bit codewords output by such a coder are converted to a serial bit-stream before being scrambled by the pseudo-random code sequence. Then at the receiver the serial data is unscrambled using a matching PRBS generator before being assembled into 5-bit codewords which are decoded to reconstitute the original video signal.
- the PRBS generator in the receiver should be aligned with that in the transmitter so that corresponding bits in the pseudo-random sequence are applied to the same elements of data in the scrambler and descrambler. As described in the present applicant's earlier British applications numbers 8804552 and 8721603, this is achieved by searching for a video line synchronisation or frame alignment word, or other predetermined fixed component of the received data and aligning the PRBS generator accordingly. While this is sufficient to ensure appropriate descrambling of the serial data it is also necessary to ensure that the conversion of the serial data to parallel 5-bit words is carried out in correct alignment with the transmitter to avoid corruption of the data.
- a method of communicating data from a transmitter to a receiver comprising coding an input signal with n-bit codewords, where n is an integer, converting the n-bit codewords to a serial bit-stream, generating with a pseudo-random binary sequence generator in the transmitter a fixed length n x m bit pseudo-random binary sequence, where m is an integer, generating a word synchronization signal in response to a predetermined point in each repetition of the pseudo-random binary sequence in said transmitter pseudo-random binary sequence generator, synchronizing the coding of the input signal in accordance with the word synchronization signal, scrambling the serial bit-stream with the pseudo-random binary sequence, transmitting the scrambled data to the receiver, generating with a pseudo-random binary sequence generator in the receiver a corresponding binary sequence, generating a corresponding word alignment signal in response to the predetermined binary sequence, descrambling the data at the receiver with the corresponding binary sequence, synchronizing the corresponding binary
- the method of the present invention scrambles the data using a repeating PRBS having a fixed length which is an integral multiple of the length of the codewords. For example, in the case of the 5-bit codewords discussed above a PRBS length of 255 bits is used, giving 16 orthogonal PRBS sequences. Since an integral number of codewords fits inside each PRBS frame a fixed phase relationship can be maintained between the codewords and the PRBS frame. For example, the PRBS generator and the encoder outputting the codewords can be aligned so that the first bit of the PRBS sequence always corresponds to the first bit of a codeword. This has the important consequence that in the receiver word alignment can be maintained simply by synchronizing the decoder with the descrambling PRBS sequence. The need for an additional synchronization method for the decoder and the consequent disadvantages of additional transmission overheads or degradation in the data are therefore avoided.
- the receiver pseudo-random binary sequence generator is driven by a controllable oscillator means, and the synchronization of said corresponding binary sequence is obtained by detecting at the receiver a predetermined element in the received data, and locking the frequency of the oscillator means in response to the detection of the predetermined element.
- the predetermined element may be fixed bit pattern or alternatively a marker signal superimposed in the analogue domain.
- a system for communicating data comprising a transmitter including a coder arranged to code an input signal with n-bit codewords, where n is an integer, and to convert the n-bit codewords to a serial bit-stream, and scrambling means including a pseudo-random binary sequence generator and arranged to scramble the serial bit-stream with a fixed length n x m bit pseudo-random binary sequence, where m is an integer, to output the scrambled data and to provide a word synchronization signal in response to a predetermined point in each repetition of the pseudo-random binary sequence, the coder being arranged to synchronize the coding of the input signal in accordance with the word synchronization signal; and a receiver arranged to receive the scrambled data and including descrambling means including a pseudo-random binary sequence generator and arranged to descramble the data with a corresponding binary sequence and to provide a corresponding word synchronization signal in response to a
- the receiver pseudo-random binary sequence generator is driven by a controllable oscillator means, and the receiver further comprises monitor means arranged to detect at the receiver a predetermined element in the received data and the oscillator means is responsive to the output of the monitor means to lock its frequency in response to detection of the predetermined element.
- the pseudo-random binary sequence in the transmitter and the receiver is a maximum length sequence.
- FIG. 1 is a block diagram of a data transmitter
- FIG. 2 is a block diagram of a data receiver.
- a video signal is input to a coder 1 which, in the present example, codes the data using a hybrid differential pulse code modulation (HDPCM) scheme.
- the coding scheme produces 5-bit codewords which are converted into a serial bit-stream by a parallel-to-serial converter 2.
- the resulting serial data is combined at an XOR gate 3 with a fixed length pseudo-random binary sequence output by a PRBS generator 4.
- the scrambled data is then output onto the transmission channel, which in the present example is a passive optical network (not shown).
- the PRBS sequence used by the generator 4 is 255 bits long.
- the length is chosen so that an integral number of video frames fit inside each PRBS frame.
- a 25-bit sequence makes possible 16 orthogonal PRBS sequences and so this system can support 16 different channels.
- Other sequence lengths are possible.
- the next longest suitable sequence in a 5-bit coder is 4095 bits and this will support many more different channels.
- the present invention may also be applied to other codec word lengths, but only odd numbers of bits are suitable for use with sequences which are of length 2'-1, where k is an integer, i.e. m-sequences.
- a 3-bit codec may be used with a 63-bit, 255-bit, 1023-bit, or 4095-bit PRBS, a 7-bit codec with a 4095-bit PRBS or a 9-bit codec with a 4095-bit PRBS.
- the PRBS sequence length is an integral multiple of the word lengths, making it possible to maintain a fixed phase relationship between the PRBS generator and the coder at the word-level. It is possible therefore to use the PRBS generator 4 to clock the coder 1, by generating a word alignment pulse at a fixed point in each repetition of the binary sequence. This may be done using logic circuitry to detect, for example, the point at which the sequence ends and repetition occurs and generating a pulse accordingly.
- FIG. 2 shows a data receiver which, using a PRBS generator 5 matched to that in the transmitter and a decoder 6, descrambles and decodes the data received from the transmission channel.
- the receiver includes a voltage controlled crystal oscillator (VCXO) 7 which generates a bit-rate clock for the decoder 6.
- VXO voltage controlled crystal oscillator
- the incoming serial data is fed in parallel to two D-type latches 8,9 which are clocked by the VCXO 7 but with a phase difference of one half of a bit period between them.
- the output from one latch 8 is taken to an XOR gate 10 where it is combined with the output of the receiver PRBS generator 5.
- the descrambled data leaving the XOR gate 10 is then input to the decoder 6 where it is assembled into 5-bit words and decoded using a process complementary to that adopted in the coder 1.
- the video signal is then reconstituted and output.
- the data from the other latch 9 is used in synchronizing the receiver PRBS generator 5 to the PRBS generator used int eh transmitter 1 to scramble the data.
- the output from this latch 9 is combined with the output from the PRBS generator 5 at a further XOR gate 11.
- the output from the XOR gate 11 is analysed by a synchronization, constituting the monitor means of the present invention, which is arranged to monitor the data to detect the occurrence of a predetermined synchronization word which will have been added to the video data in the coder 1: alternatively a line synchronization signal may be detected.
- a line synchronization signal may be detected.
- the absence of such a word indicates that the data is being corrupted by an error in alignment between the PRBS generators 4, 5 in the transmitter and receiver.
- the monitor 12 provides to a loop filter 13 a logic "one" control pulse.
- the loop filter 13 which is designed to ensure the stability of the control loop, provides the time average of its input signal to the VCXO 7 to advance or retard its phase and hence achieve locking of the oscillator frequency. In this manner any error in phase is corrected and the receiver PRBS generator 5 is kept locked in alignment with the transmitter generator 4.
- the VCXO 7 and the loop filter 13 together constitute a controllable oscillator means of the present invention.
- the monitor 12 may receive scrambled data and align the PRBS generator on the basis of a detected feature of those scrambled data.
- the decoder 6 is aligned to the generator 5 using logic circuits to generate a word alignment pulse, in the same manner as described above for the transmitter.
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Power Engineering (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Television Signal Processing For Recording (AREA)
- Power Conversion In General (AREA)
- Emergency Protection Circuit Devices (AREA)
- Time-Division Multiplex Systems (AREA)
- Enzymes And Modification Thereof (AREA)
- Medicines That Contain Protein Lipid Enzymes And Other Medicines (AREA)
- Medicines Containing Material From Animals Or Micro-Organisms (AREA)
- Television Systems (AREA)
- Manufacturing Of Micro-Capsules (AREA)
- Mobile Radio Communication Systems (AREA)
- Inspection Of Paper Currency And Valuable Securities (AREA)
- Eye Examination Apparatus (AREA)
- Measuring Pulse, Heart Rate, Blood Pressure Or Blood Flow (AREA)
Abstract
Description
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9008151 | 1990-04-10 | ||
GB909008151A GB9008151D0 (en) | 1990-04-10 | 1990-04-10 | Data communication |
Publications (1)
Publication Number | Publication Date |
---|---|
US5283831A true US5283831A (en) | 1994-02-01 |
Family
ID=10674233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/915,860 Expired - Fee Related US5283831A (en) | 1990-04-10 | 1991-04-10 | Method of synchronizing the pseudo-random binary sequence in a descrambler |
Country Status (13)
Country | Link |
---|---|
US (1) | US5283831A (en) |
EP (1) | EP0524235B1 (en) |
JP (1) | JPH05505919A (en) |
AT (1) | ATE142067T1 (en) |
CA (1) | CA2072260C (en) |
DE (1) | DE69121708T2 (en) |
DK (1) | DK0524235T3 (en) |
ES (1) | ES2091923T3 (en) |
FI (1) | FI924512A (en) |
GB (1) | GB9008151D0 (en) |
HK (1) | HK109497A (en) |
NO (1) | NO304868B1 (en) |
WO (1) | WO1991015910A1 (en) |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5448640A (en) * | 1993-03-18 | 1995-09-05 | Electronics And Telecommunications Research Institute | Parallel distributed sample descrambling circuit for cell-based asynchronous transfer mode physical layer |
EP0680215A2 (en) * | 1994-04-30 | 1995-11-02 | Robert Bosch Gmbh | Method for processing and reproducing data and circuits therefor |
US5784422A (en) * | 1996-08-05 | 1998-07-21 | Transcrypt International, Inc. | Apparatus and method for accurate synchronization with inbound data packets at relatively low sampling rates |
US5881154A (en) * | 1995-01-17 | 1999-03-09 | Kokusai Denshin Denwa Co., Ltd. | Data scramble transmission system |
US5995630A (en) * | 1996-03-07 | 1999-11-30 | Dew Engineering And Development Limited | Biometric input with encryption |
US20020181708A1 (en) * | 2001-05-29 | 2002-12-05 | Lg Electronics Inc. | Apparatus and method for generating scrambling code in mobile communication system |
US6557136B1 (en) * | 1999-11-10 | 2003-04-29 | Maxtor Corporation | Method and system for limiting the maximum number of consecutive zeroes in a block for communications or storage |
US6658113B1 (en) | 1997-11-18 | 2003-12-02 | Transcrypt International, Inc. | Apparatus and method for concealing data bursts in an analog scrambler using audio repetition |
US6907062B2 (en) * | 2001-08-06 | 2005-06-14 | Broadcom Corporation | PRBS generator selection in modem communication |
US20050213754A1 (en) * | 2002-05-10 | 2005-09-29 | Tsutomu Shimosato | Encryption device and decryption device |
US20050231402A1 (en) * | 2002-02-25 | 2005-10-20 | Lockheed Martin Corporation | Analog scrambler |
US20060156215A1 (en) * | 2005-01-11 | 2006-07-13 | International Business Machines Corporation | Error type identification circuit for identifying different types of errors in communications devices |
US7412640B2 (en) | 2003-08-28 | 2008-08-12 | International Business Machines Corporation | Self-synchronizing pseudorandom bit sequence checker |
US7786902B1 (en) * | 2003-12-12 | 2010-08-31 | Marvell International Ltd. | Circuits, architectures, systems, methods, algorithms and software for conditional modulation coding |
US20140321645A1 (en) * | 2013-04-29 | 2014-10-30 | Electronics And Telecommunications Research Institute | Apparatus and method for converting random binary sequence into random integer |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05210481A (en) * | 1991-09-18 | 1993-08-20 | Ncr Internatl Inc | Direct access type video bus |
GB2342015B (en) * | 1998-09-23 | 2003-11-05 | Sony Uk Ltd | Synchronising digital signals |
DE19860125A1 (en) | 1998-12-17 | 2000-06-21 | Deutsche Telekom Ag | Method and arrangement for bit error structure measurements of data transmission channels |
TWI273259B (en) * | 2004-11-09 | 2007-02-11 | Via Tech Inc | Built-in test architecture |
Citations (7)
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US4383322A (en) * | 1980-05-02 | 1983-05-10 | Harris Corporation | Combined use of PN sequence for data scrambling and frame synchronization in digital communication systems |
EP0094254A2 (en) * | 1982-05-11 | 1983-11-16 | Tandem Computers Incorporated | Integrated scrambler-encoder using PN sequence generator |
EP0107175A1 (en) * | 1982-10-21 | 1984-05-02 | Siemens Aktiengesellschaft | Method for the digital transmission of information |
DE3312400A1 (en) * | 1983-03-25 | 1984-09-27 | Siemens AG, 1000 Berlin und 8000 München | Method for transmitting binary signals of at least two channels |
US5060266A (en) * | 1990-03-07 | 1991-10-22 | Ericsson Ge Mobile Communications Holding Inc. | Continuous cipher synchronization for cellular communication system |
US5068872A (en) * | 1989-11-27 | 1991-11-26 | Raytheon Company | Apparatus and method for short cycling sequences of a p-code generator |
US5128998A (en) * | 1989-09-28 | 1992-07-07 | Clarion Co., Ltd. | Head or arbitrary bit pulse generating circuit and sampling pulse generating circuit in a pseudo noise code generator |
-
1990
- 1990-04-10 GB GB909008151A patent/GB9008151D0/en active Pending
-
1991
- 1991-04-10 JP JP91507000A patent/JPH05505919A/en active Pending
- 1991-04-10 DK DK91907631.5T patent/DK0524235T3/da active
- 1991-04-10 DE DE69121708T patent/DE69121708T2/en not_active Expired - Fee Related
- 1991-04-10 US US07/915,860 patent/US5283831A/en not_active Expired - Fee Related
- 1991-04-10 ES ES91907631T patent/ES2091923T3/en not_active Expired - Lifetime
- 1991-04-10 EP EP91907631A patent/EP0524235B1/en not_active Expired - Lifetime
- 1991-04-10 AT AT91907631T patent/ATE142067T1/en not_active IP Right Cessation
- 1991-04-10 WO PCT/GB1991/000570 patent/WO1991015910A1/en active IP Right Grant
- 1991-04-10 CA CA002072260A patent/CA2072260C/en not_active Expired - Fee Related
-
1992
- 1992-10-07 FI FI924512A patent/FI924512A/en unknown
- 1992-10-09 NO NO923933A patent/NO304868B1/en not_active IP Right Cessation
-
1997
- 1997-06-26 HK HK109497A patent/HK109497A/en not_active IP Right Cessation
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
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US4383322A (en) * | 1980-05-02 | 1983-05-10 | Harris Corporation | Combined use of PN sequence for data scrambling and frame synchronization in digital communication systems |
EP0094254A2 (en) * | 1982-05-11 | 1983-11-16 | Tandem Computers Incorporated | Integrated scrambler-encoder using PN sequence generator |
EP0107175A1 (en) * | 1982-10-21 | 1984-05-02 | Siemens Aktiengesellschaft | Method for the digital transmission of information |
US4606042A (en) * | 1982-10-21 | 1986-08-12 | Siemens Aktiengesellschaft | Method for digital transmission of messages |
DE3312400A1 (en) * | 1983-03-25 | 1984-09-27 | Siemens AG, 1000 Berlin und 8000 München | Method for transmitting binary signals of at least two channels |
US5128998A (en) * | 1989-09-28 | 1992-07-07 | Clarion Co., Ltd. | Head or arbitrary bit pulse generating circuit and sampling pulse generating circuit in a pseudo noise code generator |
US5068872A (en) * | 1989-11-27 | 1991-11-26 | Raytheon Company | Apparatus and method for short cycling sequences of a p-code generator |
US5060266A (en) * | 1990-03-07 | 1991-10-22 | Ericsson Ge Mobile Communications Holding Inc. | Continuous cipher synchronization for cellular communication system |
Cited By (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5448640A (en) * | 1993-03-18 | 1995-09-05 | Electronics And Telecommunications Research Institute | Parallel distributed sample descrambling circuit for cell-based asynchronous transfer mode physical layer |
EP0680215A2 (en) * | 1994-04-30 | 1995-11-02 | Robert Bosch Gmbh | Method for processing and reproducing data and circuits therefor |
EP0680215A3 (en) * | 1994-04-30 | 1998-04-22 | Robert Bosch Gmbh | Method for processing and reproducing data and circuits therefor |
US5881154A (en) * | 1995-01-17 | 1999-03-09 | Kokusai Denshin Denwa Co., Ltd. | Data scramble transmission system |
US5995630A (en) * | 1996-03-07 | 1999-11-30 | Dew Engineering And Development Limited | Biometric input with encryption |
US5784422A (en) * | 1996-08-05 | 1998-07-21 | Transcrypt International, Inc. | Apparatus and method for accurate synchronization with inbound data packets at relatively low sampling rates |
US6658113B1 (en) | 1997-11-18 | 2003-12-02 | Transcrypt International, Inc. | Apparatus and method for concealing data bursts in an analog scrambler using audio repetition |
US6557136B1 (en) * | 1999-11-10 | 2003-04-29 | Maxtor Corporation | Method and system for limiting the maximum number of consecutive zeroes in a block for communications or storage |
US20020181708A1 (en) * | 2001-05-29 | 2002-12-05 | Lg Electronics Inc. | Apparatus and method for generating scrambling code in mobile communication system |
US7346165B2 (en) * | 2001-05-29 | 2008-03-18 | Lg Electronics Inc. | Apparatus and method for generating scrambling code in mobile communication system |
US6907062B2 (en) * | 2001-08-06 | 2005-06-14 | Broadcom Corporation | PRBS generator selection in modem communication |
US6973188B1 (en) | 2002-02-25 | 2005-12-06 | Lockheed Martin Corporation | Analog scrambler |
US20050231402A1 (en) * | 2002-02-25 | 2005-10-20 | Lockheed Martin Corporation | Analog scrambler |
US7333608B2 (en) | 2002-02-25 | 2008-02-19 | Lockheed Martin Corporation | Analog scrambler |
US20050213754A1 (en) * | 2002-05-10 | 2005-09-29 | Tsutomu Shimosato | Encryption device and decryption device |
US7519182B2 (en) * | 2002-05-10 | 2009-04-14 | Sony Corporation | Encryption device and decryption device |
US7412640B2 (en) | 2003-08-28 | 2008-08-12 | International Business Machines Corporation | Self-synchronizing pseudorandom bit sequence checker |
US20080276139A1 (en) * | 2003-08-28 | 2008-11-06 | International Business Machines Corporation | Self-Synchronizing Pseudorandom Bit Sequence Checker |
US7757142B2 (en) | 2003-08-28 | 2010-07-13 | International Business Machines Corporation | Self-synchronizing pseudorandom bit sequence checker |
US7786902B1 (en) * | 2003-12-12 | 2010-08-31 | Marvell International Ltd. | Circuits, architectures, systems, methods, algorithms and software for conditional modulation coding |
US20060156215A1 (en) * | 2005-01-11 | 2006-07-13 | International Business Machines Corporation | Error type identification circuit for identifying different types of errors in communications devices |
US7509568B2 (en) | 2005-01-11 | 2009-03-24 | International Business Machines Corporation | Error type identification circuit for identifying different types of errors in communications devices |
US20140321645A1 (en) * | 2013-04-29 | 2014-10-30 | Electronics And Telecommunications Research Institute | Apparatus and method for converting random binary sequence into random integer |
US9042545B2 (en) * | 2013-04-29 | 2015-05-26 | Electronics And Telecommunications Research Institute | Apparatus and method for converting random binary sequence into random integer |
Also Published As
Publication number | Publication date |
---|---|
DE69121708D1 (en) | 1996-10-02 |
DE69121708T2 (en) | 1997-02-20 |
GB9008151D0 (en) | 1990-06-06 |
WO1991015910A1 (en) | 1991-10-17 |
ES2091923T3 (en) | 1996-11-16 |
NO923933L (en) | 1992-10-09 |
JPH05505919A (en) | 1993-08-26 |
NO923933D0 (en) | 1992-10-09 |
FI924512A0 (en) | 1992-10-07 |
EP0524235A1 (en) | 1993-01-27 |
FI924512A (en) | 1992-10-07 |
HK109497A (en) | 1997-08-22 |
EP0524235B1 (en) | 1996-08-28 |
CA2072260A1 (en) | 1991-10-11 |
CA2072260C (en) | 1996-12-10 |
DK0524235T3 (en) | 1997-02-10 |
NO304868B1 (en) | 1999-02-22 |
ATE142067T1 (en) | 1996-09-15 |
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