US5098305A - Memory metal electrical connector - Google Patents
Memory metal electrical connector Download PDFInfo
- Publication number
- US5098305A US5098305A US07/324,906 US32490689A US5098305A US 5098305 A US5098305 A US 5098305A US 32490689 A US32490689 A US 32490689A US 5098305 A US5098305 A US 5098305A
- Authority
- US
- United States
- Prior art keywords
- memory metal
- metal wire
- wire
- circuit boards
- irregularly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 200
- 239000002184 metal Substances 0.000 title claims abstract description 200
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 51
- 239000000956 alloy Substances 0.000 claims abstract description 51
- 238000000034 method Methods 0.000 claims abstract description 39
- 230000006399 behavior Effects 0.000 claims abstract description 33
- 230000000712 assembly Effects 0.000 claims abstract description 16
- 238000000429 assembly Methods 0.000 claims abstract description 16
- 229910000734 martensite Inorganic materials 0.000 claims description 44
- 230000009466 transformation Effects 0.000 claims description 35
- 229910001000 nickel titanium Inorganic materials 0.000 claims description 33
- 229910017518 Cu Zn Inorganic materials 0.000 claims description 26
- 229910017752 Cu-Zn Inorganic materials 0.000 claims description 26
- 229910017943 Cu—Zn Inorganic materials 0.000 claims description 26
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 22
- 230000000694 effects Effects 0.000 claims description 16
- 238000001816 cooling Methods 0.000 claims description 15
- 239000000203 mixture Substances 0.000 claims description 15
- KHYBPSFKEHXSLX-UHFFFAOYSA-N iminotitanium Chemical compound [Ti]=N KHYBPSFKEHXSLX-UHFFFAOYSA-N 0.000 claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 14
- 229910020630 Co Ni Inorganic materials 0.000 claims description 13
- 229910002440 Co–Ni Inorganic materials 0.000 claims description 13
- 229910017535 Cu-Al-Ni Inorganic materials 0.000 claims description 13
- 229910017755 Cu-Sn Inorganic materials 0.000 claims description 13
- 229910017773 Cu-Zn-Al Inorganic materials 0.000 claims description 13
- 229910017767 Cu—Al Inorganic materials 0.000 claims description 13
- 229910017927 Cu—Sn Inorganic materials 0.000 claims description 13
- 229910003310 Ni-Al Inorganic materials 0.000 claims description 13
- 229910004696 Ti—Cu—Ni Inorganic materials 0.000 claims description 13
- 229910007610 Zn—Sn Inorganic materials 0.000 claims description 13
- 229910052793 cadmium Inorganic materials 0.000 claims description 13
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 claims description 13
- TVZPLCNGKSPOJA-UHFFFAOYSA-N copper zinc Chemical compound [Cu].[Zn] TVZPLCNGKSPOJA-UHFFFAOYSA-N 0.000 claims description 13
- 229910052697 platinum Inorganic materials 0.000 claims description 13
- BSWGGJHLVUUXTL-UHFFFAOYSA-N silver zinc Chemical compound [Zn].[Ag] BSWGGJHLVUUXTL-UHFFFAOYSA-N 0.000 claims description 13
- 229910052716 thallium Inorganic materials 0.000 claims description 13
- 229910052725 zinc Inorganic materials 0.000 claims description 13
- 229910052733 gallium Inorganic materials 0.000 claims description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 11
- 229910052759 nickel Inorganic materials 0.000 claims description 11
- 229910052719 titanium Inorganic materials 0.000 claims description 11
- 239000010936 titanium Substances 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000001747 exhibiting effect Effects 0.000 claims 21
- 238000006073 displacement reaction Methods 0.000 claims 13
- 238000010792 warming Methods 0.000 claims 4
- 229910001092 metal group alloy Inorganic materials 0.000 abstract description 9
- 238000010276 construction Methods 0.000 abstract description 6
- 230000008901 benefit Effects 0.000 abstract description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 44
- 239000010931 gold Substances 0.000 description 31
- 229910052737 gold Inorganic materials 0.000 description 30
- 230000035882 stress Effects 0.000 description 29
- 210000000569 greater omentum Anatomy 0.000 description 12
- 238000003780 insertion Methods 0.000 description 12
- 230000037431 insertion Effects 0.000 description 12
- 230000008569 process Effects 0.000 description 12
- 238000003825 pressing Methods 0.000 description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 10
- 230000007704 transition Effects 0.000 description 10
- 230000007246 mechanism Effects 0.000 description 9
- 125000006850 spacer group Chemical group 0.000 description 9
- 229910001566 austenite Inorganic materials 0.000 description 8
- 238000004891 communication Methods 0.000 description 7
- HLXZNVUGXRDIFK-UHFFFAOYSA-N nickel titanium Chemical compound [Ti].[Ti].[Ti].[Ti].[Ti].[Ti].[Ti].[Ti].[Ti].[Ti].[Ti].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni].[Ni] HLXZNVUGXRDIFK-UHFFFAOYSA-N 0.000 description 7
- 238000012856 packing Methods 0.000 description 7
- HZEWFHLRYVTOIW-UHFFFAOYSA-N [Ti].[Ni] Chemical compound [Ti].[Ni] HZEWFHLRYVTOIW-UHFFFAOYSA-N 0.000 description 6
- 239000012530 fluid Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 239000002826 coolant Substances 0.000 description 5
- 238000009826 distribution Methods 0.000 description 5
- 150000002739 metals Chemical class 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 4
- 230000000295 complement effect Effects 0.000 description 4
- 238000007906 compression Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 238000012423 maintenance Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 230000009471 action Effects 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 3
- 230000006835 compression Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000004033 plastic Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052790 beryllium Inorganic materials 0.000 description 2
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- UCHOFYCGAZVYGZ-UHFFFAOYSA-N gold lead Chemical compound [Au].[Pb] UCHOFYCGAZVYGZ-UHFFFAOYSA-N 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000012966 insertion method Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000005086 pumping Methods 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- DMFGNRRURHSENX-UHFFFAOYSA-N beryllium copper Chemical compound [Be].[Cu] DMFGNRRURHSENX-UHFFFAOYSA-N 0.000 description 1
- 239000013590 bulk material Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001447 compensatory effect Effects 0.000 description 1
- 239000012809 cooling fluid Substances 0.000 description 1
- 239000011162 core material Substances 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006355 external stress Effects 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000002706 hydrostatic effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000003446 memory effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22F—CHANGING THE PHYSICAL STRUCTURE OF NON-FERROUS METALS AND NON-FERROUS ALLOYS
- C22F1/00—Changing the physical structure of non-ferrous metals or alloys by heat treatment or by hot or cold working
- C22F1/006—Resulting in heat recoverable alloys with a memory effect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/50—Fixed connections
- H01R12/51—Fixed connections for rigid printed circuits or like structures
- H01R12/52—Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
- H01R12/523—Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures by an interconnection through aligned holes in the boards or multilayer board
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R4/00—Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation
- H01R4/01—Connections using shape memory materials, e.g. shape memory metal
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
- H05K3/308—Adaptations of leads
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0612—Layout
- H01L2224/0613—Square or rectangular array
- H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected
- H01L2224/06135—Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13144—Gold [Au] as principal constituent
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
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- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/78251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
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- H01L2224/85035—Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball"
- H01L2224/85045—Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball" using a corona discharge, e.g. electronic flame off [EFO]
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
Definitions
- circuit boards populated with integrated circuit packages are interconnected by a variety of connectors, wires, or cables.
- the physical arrangement of the circuit boards in relation to one another is also accomplished in a wide variety of configurations.
- One popular high-density interconnect technique is to stack the circuit boards in a sandwiched relationship to one another and electrically interconnect the circuit boards with interboard connectors. This packing technique achieves a fair amount of packing density, limited by the interboard spacing requirements of heat dissipation and connector spacing.
- the present invention provides a new apparatus and method for high-density signal and power interconnections between circuit boards which uses "memory metal" jumper wires to overcome the wasted space and speed disadvantages of the prior art.
- the present invention provides for z-axis interconnection of sandwiched circuit boards in the x-y plane by using memory metal wires connected through the axially-aligned through-plated holes of the circuit boards.
- memory metal wire refers to a wire comprised of certain metallic alloys in which a kinked metal wire is given its kinked shape in the austenitic phase above the forming temperature. The memory metal wire is maintained in use in the austenitic phase below the forming temperature but above the martensitic transformation temperature.
- the shape memory behavior is found in a variety of alloys such as Ni-Ti, Ag-Zn, Au-Cd, Au-Cu-Zn, Cu-Al, Cu-Al-Ni, Cu-Au-Zn, Cu-Sn, Cu-Zn, Cu-Zn-Al, Cu-Zn-Ga, Cu-Zn-Si, Cu-Zn-Sn, Fe-Pt, In-Tl, Ni-Al, Ni-Ti, Ni-Ti-X (where X is a ternary element), Ti-Co-Ni, Ti-Cu-Ni and others.
- nickel-titanium (Nitinol) alloys are used with the specific composition of the alloys selected so that the transition temperature remains well below the ambient operating temperature of the electronic assembly.
- a substantially straight or non-kinked leader section of the kinked memory metal wire comprising nickel-titanium alloy is inserted through axially aligned plated holes of two or more circuit boards in a substantially perpendicular direction (z-axis) to the planar surface (x-y axes) of the boards.
- the leader section of the memory metal wire is selected to be slightly longer than the distance through the axially aligned holes such that a portion of the leader wire protrudes through one side of the sandwich of circuit boards. The protruding leader section is gripped and the tail of the memory wire is pulled until the kinked portion of the memory metal wire is substantially straightened.
- the temperature of the kinked memory metal wire is lowered below the transition temperature to place the alloy of the wire into the martensitic phase.
- the wire is then longitudinally stressed substantially straight. While in the martensitic phase, the wire will remain substantially straight after the stress is removed.
- the wire is then inserted into the axially aligned holes of a plurality of circuit boards.
- the wire is then warmed or allowed to warm above the transition temperature so that the alloy of the wire enters the austenitic phase. Above the transition temperature, the memory metal wire reestablishes its original kinked shape to effect electrical connection between the circuit boards.
- the kinked memory metal wires are selected to maintain an average of two contact points per plated through hole per circuit board. Alternate shapes of the kinked memory metal wires maybe used to ensure this minimum average of contacts per hole is maintained.
- FIG. 1 is a side view of an integrated circuit die onto which flying gold leads, are ball bonded and straightened by a modified ball bonding machine.
- FIGS. 2A-2F show the steps to construct a flying lead on an integrated circuit die.
- FIG. 4 shows the relative positions of the integrated circuit chip and the circuit board prior to compression of the flying leads into the plated holes.
- FIG. 5 shows the relative positions of the integrated circuit chip and the circuit board after the flying leads having been compressed inside the plated holes of the circuit board.
- FIG. 5a is a closeup view of a ball-bonded flying lead that has been compressed into a plated hole on the circuit board.
- FIG. 6 is a larger view of the compression process whereby a plurality of integrated circuit chips having flying leads are attached to a single printed circuit board through the application of seating force on caul plates which sandwich the circuit board/chip combination.
- FIG. 7 is a greatly enlarged view of a plated hole pattern for a typical PC board onto which integrated circuit dice are attached.
- FIG. 9 is a side view of the module assembly of FIG. 8 showing the details of the logic jumpers and power jumpers for signal and power interconnection between the sandwich assembly of printed circuit boards.
- FIG. 10A is an enlarged cross-sectional view of a single logic jumper of a preferred shape which has been placed within the axially-aligned plated holes of the sandwiched printed circuit boards of the module assembly of FIG. 9.
- FIG. 10B is an enlarged cross-sectional of a single logic jumper of an alternate preferred shape which has been placed within the axially-aligned plated holes of the sandwiched printed circuit boards of the module assembly of FIG. 9.
- FIG. 10C is an enlarged cross-sectional of a single logic jumper of an alternate preferred shape showing the conformance of the memory metal jumper wire to the misaligned holes of a printed circuit board stack thus compensating for out-of-tolerance alignments of the poorly axially aligned plated holes.
- FIG. 11A shows a preferred shape of a memory metal wire.
- FIG. 11B shows an alternate preferred shape of a memory metal wire.
- FIG. 12 shows the steps of inserting, stretching, positioning, and releasing the memory metal jumper wires within the axially aligned plated holes of a single stack assembly of PC boards on a module assembly.
- FIG. 13 is a schematic stress-strain curve for memory metal alloys showing the complementary relationship of pseudoelastic and shape-memory behavior.
- FIG. 14 shows an alternate preferred shape of a memory metal wire.
- the preferred embodiment of the present invention relates to the high-density packing of circuit boards in a sandwiched arrangement.
- the application of this technology is designed for speed improvements, improved heat dissipation, and improved packing density required for modern supercomputers such as the Cray-3 manufactured by the assignee of the present invention.
- the integrated circuit chips are attached to the circuit board by flying gold leads, as discussed below and disclosed in copending patent application Ser. No. 07/053,142 which is assigned to the same assignee of the present invention and which is incorporated herein by reference.
- the placing of integrated circuit chips directly onto the circuit boards eliminates the bulky packages normally used to contain integrated circuit chips. By removing the chips from the packages and placing them directly on the circuit boards the integrated chips can be surrounded by liquid coolant to improve cooling and allow circuit boards to be more closely placed thereby reducing inter-board propagation delay of signals. Improved cooling techniques are extremely important when using gallium arsenide (GaAs) integrated circuit chips due to the high power and high heat dissipation requirements of these chips as described in copending patent application Ser. No. 07/104,758 which is assigned to the same assignee of the present invention and which is incorporated herein by reference.
- GaAs gallium arsenide
- FIG. 1 shows the preferred embodiment for attaching flying gold leads to a silicon or gallium arsenide (GaAs) chip or die before attaching the die to the circuit board.
- the leads are made of a malleable conductive material such as soft gold wire which is approximately 3 mils in diameter. Those skilled in the art will readily recognize that hard gold or other metals may be used.
- the GaAs chips used in the preferred embodiment contain 52 bonding pads which have a sputtered soft gold finish.
- the objective of the die bonding operation is to form a gold-to-gold bond between the wire and the pad.
- a Hughes automatic thermosonic (gold wire) ball bonding machine Model 2460-II is modified to perform this operation.
- the unmodified ball bonding machine is available from Hughes Aircraft Company, of Carlsbad, Calif. This machine was designed and normally used to make pad-to-lead frame connections to IC packages and has been modified to perform the steps of flying lead bonding as described below. The modifications include hardware and software changes to allow feeding, flaming off, bonding and breaking heavy gauge gold bonding wire (up to 0.0030 inch diameter gold wire).
- the Hughes automatic ball bonding machine has an X-Y positioning bed which is used to position the die for bonding.
- the die is loaded on the bed in a heated vacuum fixture which holds up to 16 dice.
- the Hughes bonding machine is equipped with a vision system which can recognize the die patterns without human intervention and position each bonding pad for processing. An angular correction as well as an X-Y position is available to the machine.
- the soft gold wire that is used for the flying leads in the preferred embodiment is sometimes referred to as sticky gold or tacky gold.
- This gold bonding wire is formed from a 99.99% high-purity annealed gold. The process of annealing the high-purity gold results in a high elongation (20-25% stabilized and annealed), low tensile strength (3.0 mil, 50 gr. min.) gold wire which is dead soft.
- the wire composition (99.99% pure Au non-Beryllium doped) is as follows:
- the flying lead die bonding procedure begins with the forming of a soft gold ball at the tip of the gold wire.
- the wire is fed from a supply spool (not shown) through a nitrogen-filled tube 109 (shown in FIGS. 2A-2F) to a ceramic capillary 100.
- the inside of the capillary is just slightly larger than the wire diameter.
- the nitrogen in the connecting tube 109 can be driven either toward the capillary or away from the capillary toward the supply spool. This allows the gold wire to be fed or withdrawn from the capillary tip.
- the gold ball 106 formed at the end of the gold wire 101 is thermosonically bonded to bonding pad 105 of chip 104.
- the capillary tip 102 of capillary 100 is capable of heating the ball bond to 300° C. concurrent with pressing the ball 106 onto the pad 105 and sonically vibrating the connection until a strong electrical and mechanical connection is formed.
- the capillary 100 is then withdrawn from the surface of the die 104 and the wire 101 is extruded from the tip 102.
- a notching mechanism added to the Hughes ball bonder to perform the specific notching operation described herein, is used to make a notch 107 at the appropriate height of the flying lead to break the connection and to stiffen the lead.
- Wire clamp 108 grasps the gold wire 101 and the capillary is withdrawn upward, breaking the flying lead at 107 and concurrently performing a nondestructive test of the ball bond to bonding pad connection.
- Step 1 begins with the feeding of a predetermined amount of wire through the capillary 100.
- a mechanical arm then positions an electrode 114 below the capillary tip 102 and a high-voltage electrical current forms an arc which melts the wire and forms a gold ball with a diameter of approximately 6 mils.
- This is termed electrostatic flame-off (EFO).
- EFO electrostatic flame-off
- Specified ball size range is attainable through EFO power supply output adjustment up to 10 milliamps.
- the clamps 108 are closed and the nitrogen drag is off. This action occurs above the surface of the integrated circuit chips so as to avoid any damage to the chip during the EFO ball forming process.
- step 2 the nitrogen drag 109 withdraws the supply wire 101 into the capillary 100 and tightens the ball against the capillary tip 102.
- the capillary tip 102 is heated to 200° C. (range of ambient to 300° C.) to assist in keeping the gold wire 101 in a malleable state.
- the die fixture is also heated to 200° C. (range of ambient to 300° C.) to avoid wire cooling during the bonding process.
- the die fixture is made of Teflon-coated aluminum. As shown in FIG. 1, a vacuum cavity or vacuum plate 103 holds the die 104 in position on the fixture during the bonding process.
- step 3 the bonding machine lowers the capillary 100 to the surface of a bonding pad 105 and applies high pressure (range of 30-250 grams) to the trapped gold ball 106 along with ultrasonic vibration at the capillary tip 102.
- the capillary tip 102 is flat, with a 4-mil inside diameter and an 8-mil outside diameter.
- the ball 106 is flattened to about a 3-mil height and a 6-mil diameter.
- Ultrasound is driven through the ceramic capillary 100 to vibrate the gold ball 106 and scrub the bonding pad surface. The sound is oriented so that the gold ball 106 moves parallel to the die surface.
- the Hughes ball bonding machine has the ability to vary the touch-down velocity, i.e., soft touch-down for bonding GaAs, which is program selectable.
- the ultrasonic application is also program selectable.
- step 4 the capillary 100 is withdrawn from the die surface 104, extending the gold wire 101 as the head is raised.
- the nitrogen drag is left off and the capillary is raised to a height to allow enough gold wire to form the flying lead, a tail length for the next flying lead, and a small amount of clearance between the tail length and the capillary tip 102.
- the Hughes ball bonder device is capable of selecting the height that the capillary tip can move up to a height of approximately 0.750 inch.
- an automatic notching mechanism 115 moves into the area of the extended gold wire 101 and strikes both sides of the wire with steel blades. This is essentially a scissor action which cuts most of the way through the gold wire 101, forming a notch 107.
- the notch 107 is made 27 mils above the surface of the die.
- the notching mechanism has been added to the Hughes ball bonder for the precise termination of the flying leads.
- the Hughes ball bonder has been modified to measure and display the notch mechanism height.
- the activation signal for the notch mechanism is provided by the Hughes ball bonder system for the proper activation during the sequence of ball bonding.
- the flying lead length is adjustable from between 0.0 mils to 50.0 mils.
- notching function can be accomplished with a variety of mechanisms such the scissor mechanism disclosed above, a hammer-anvil system, and a variety of other mechanisms that merely notch or completely sever the wire 101.
- step 6 clamp 108 closes on the gold wire 101 above the capillary 100 and the head is withdrawn until the gold wire breaks at the notched point.
- This stretching process serves several useful purposes. Primarily, the gold wire is straightened by the stretching force and stands perpendicular to the die surface. The stretching produces a work-hardened lead. In addition, the bond is nondestructively pull-tested for adhesion at the bonding pad. The lead 101 is terminated at a 27-mil height above the die surface 104 in the preferred embodiment.
- the capillary head for the bonding mechanism is positioned over a new bonding pad and the process of steps 1-6 begin again. The bonding wire 101 is partially retracted into the capillary once again, and the clamps are closed, as shown in step 1, so that a new ball may be formed by the EFO.
- the die positions are roughly determined by the loading positions in the vacuum fixture.
- the Hughes automatic bonding machine is able to adjust the X-Y table for proper bonding position of the individual die.
- An angular correction is automatically made to adjust for tolerance in placing the die in the vacuum fixture. This is done through a vision system which recognizes the die pad configurations.
- a minimum bonding rate of 2 die pads per second is possible.
- the bonding pattern of the integrated circuit die 104 matches the plated hole pattern on the circuit board 110.
- the top view of integrated circuit die 104 in FIG. 3 shows the bonding pad 105 in the upper right corner.
- the circuit board 110 shown in FIG. 3 shows a corresponding plated hole 111 which is aligned to receive the bonding lead from bonding pad 105 when circuit board 110 is placed over integrated circuit 104 and the flying leads are inserted into the hole pattern on the circuit board.
- each bonding pad of integrated circuit 104 has a corresponding plated hole on circuit board 110 aligned to receive the flying leads.
- the circuit board assembly operation begins with the die insertion in the circuit board.
- the circuit board is held in a vacuum fixture during the insertion process. This is to make sure that the board remains flat. Insertion can be done by hand under a binocular microscope or production assembly can be done with a pick-and-place machine.
- An alternative method of inserting the flying leads into the plated holes of circuit boards is to lay the integrated circuits on a flat surface with the flying leads pointed upwards. The circuit board may then be dropped over the integrated circuit die so that the flying leads pass through the plated holes and protrude from the opposite side of the circuit board.
- the side view of the sandwiched circuit board 110, integrated circuit chip 104, and caul plates 112 and 113 in FIGS. 4 and 5 illustrates the position of the gold leads 101 before and after the pressing operation, respectively.
- the 3-mil diameter wire 101 in a 5-mil diameter hole 111 means the initial fill is 36 percent of the available volume. After pressing, the fill has increased to 57 percent as a result of the 9.2-mil shortening of the gold lead 101.
- the lead typically buckles in two or more places, and these corners are driven into the sides of the plated hole 111 of the circuit board.
- the assembly is completed in one pressing operation.
- the circuit board 110 can now be removed from the press with the integrated circuit chip 104 securely attached and electrically bonded to the plated holes of the circuit board.
- FIG. 6 shows a broader view of an alternate circuit board press which may be used to attach the integrated circuits to the printed circuit board.
- the upper caul plate 112 is a seating caul plate which is aligned through alignment pins 114 with the circuit board 110 and the lower caul plate 113 which is a die fixture plate to hold the dice during the pressing process.
- the alignment pins 114 are used to prevent the printed circuit board 110 from sliding or otherwise moving during the pressing process.
- a seating force is applied to the top of upper caul plate 112 which forces the excess flying lead material down into the plated holes of printed circuit board 110.
- integrated circuits 104 are mechanically and electrically bonded to printed circuit board 110. It will be appreciated by those skilled in the art that many variations of the above-described pressing operation can be used which results in the same or equivalent connection of the flying leads to the PC boards.
- the chips may be tab bonded to the surface of the PC boards in either a flip chip (inverted) fashion or with the active portion of the integrated circuit facing away from the circuit board.
- the integrated circuit chips may be placed on the circuit face-down with conductive bumps positioned on the circuit board to align with the bonding pads of the integrated circuit to effect the electrical connection.
- alternate methods for attaching unpackaged integrated circuit chips to PC boards may be used to assist in the cooling low profile construction of the populated PC boards.
- a sandwiched assembly of printed circuit boards populated with integrated circuit chips is interconnected in the z-axis direction using memory metal wires.
- a leader portion of a kinked-shaped memory metal wire is inserted through the stack assembly of circuit boards and gripped on the other side.
- Tension is then placed on the memory metal jumper wire until it is stretched so that it is substantially straightened.
- the straightened wire is then positioned so that the part of the wire formally kinked is placed through axially aligned plated holes between layered circuit boards.
- the wire is then released so that it reforms its kinked shape and forms an electrical connection substantially perpendicular to the planar surfaces of the printed circuit boards.
- the memory metal wire refers to a wire comprised of certain metallic alloys in which a kinked metal wire is given its kinked shape in the austenitic phase above the forming temperature. When used as an electrical connector, the memory metal wire is maintained in the austenitic phase below the forming temperature but above the martensitic transformation temperature.
- the memory metal wire may be plated with a better electrical conductor such as gold plated over a copper strike.
- the memory metal wire is straightened when stressed and reforms to its kinked shape when the stress is removed in the austenitic phase.
- this unusual behavior is called the shape-memory effect.
- Shape-memory behavior is connected with thermoelastic martensitic transformation.
- the preferred embodiment of the present invention uses the pseudoelastic behavior of the memory metal alloys in the austenitic phase. As stress increases along the length of the kinked wire, the wire straightens out as long as the stress does not plastically deform the wire. When the stress is removed, the kinked shape is recovered.
- the shape memory behavior is found in a variety of alloys such as Ag-Zn, Au-Cd, Au-Cu-Zn, Cu-Al, Cu-Al-Ni, Cu-Au-Zn, Cu-Sn, Cu-Zn, Cu-Zn-Al, Cu-Zn-Ga, Cu-Zn-Si, Cu-Zn-Sn, Fe-Pt, In-Tl, Ni-Al, Ni-Ti, Ni-Ti-X (where X is a ternary element), Ti-Co-Ni, Ti-Cu-Ni and others.
- nickel titanium (Nitinol) alloys are used with the specific composition of the alloys selected so that the transition temperature remains well below the ambient operating temperature of the electronic assembly.
- FIG. 7 is an example of a printed circuit board hole pattern for the type of circuit boards used in the Cray-3 supercomputer manufactured by the assignee of the present invention.
- each circuit board provides sixteen plated hole patterns for the acceptance of sixteen integrated circuits having flying leads.
- the sixteen integrated circuits are attached to each of the circuit boards of the type found in FIG. 7 through the pressing process previously described for circuit board assembly or by using alternate TAB bounding or bump bonding. Caul plates of a size slightly larger than the circuit boards of the type shown in FIG. 7 are used during the pressing process to attach the integrated circuit chips to the circuit boards.
- Each plated hole pattern on circuit board 110 of FIG. 7 corresponds to the hole pattern disclosed in FIG. 3.
- Each corner of circuit board 110 includes four plated via holes which are used to distribute power and are used for alignment during the pressing operation.
- sixteen of the circuit boards 110 shown in FIG. 7 are arranged in a module assembly 200 of the type shown in FIG. 8.
- the circuit boards 110 are arranged in a 4 ⁇ 4 matrix on each level of the module.
- FIG. 8 A top view of a module assembly is shown in FIG. 8.
- the module assembly is 4.76 inches wide, 4.22 inches long, and 0.196 inch thick, nominal.
- At one edge of the module assembly are four power blades 201a-201d. These machined metal blades are both the mechanical connection to the cabinet into which the module assemblies are placed and the electrical connection to the power supplies.
- At an opposite edge of the module assembly are eight signal edge connectors 202a-202h. These connectors form the communication paths to the other module assemblies within the machine.
- the bundles of wires between the circuit boards of the module assembly 200 and the board edge connectors 202a-202h are provided with strain relief members 240a-240h respectively. Each strain relief is a plastic member which protrudes from the edge of the circuit boards.
- the interconnected wires pass through holes in the strain relief members between the circuit boards and the floating connectors 202a-202h. In this fashion, the flexing of the wires during the connection and disconnection of connectors 202a-202h does not strain the soldered connection of the wires to the circuit boards.
- the strain relief members 240a-240h also serve as spacers between the circuit boards in a fashion similar to spacers 203 described below.
- Electrical communication between the integrated circuit chips of each board 110 is accomplished by means of the prefabricated foil patterns on the surface and buried within each circuit board.
- the electrical communication between circuit boards 110 in the X-Y plane is by means of memory metal jumpers along the Z-axis (perpendicular to the planar surface of the circuit boards and the module assembly) effecting electrical connection between the circuit boards 110, two logic plates sandwiched in the center of the module assembly and a centrally located power distribution board sandwiched between the logic plates.
- the z-axis memory metal jumper wires may be used for electrical communication signals and for power distribution.
- the Z-axis jumpers may be placed in any of the area on circuit boards 110 that is not occupied by an integrated circuit. In the preferred embodiment of the assembly module, anywhere from 200-1000 z-axis logic jumpers may be used for a single circuit board stack. 6400-11,000 jumpers may be used for a module 200.
- FIG. 9 shows a side sectional view of a module assembly.
- the assembly 200 is constructed as a sandwich comprising four layers of circuit boards, two layers of logic plates (circuit board interconnect layers), and one layer of power distribution.
- FIG. 9 depicts a completely assembled module assembly with the exception of the single edge connectors and strain-relief members, which have been omitted for purposes of this discussion.
- the assembly 200 in application is stacked with other assemblies in a fluid cooling tank and positioned so that the planar surface of the module assembly is stacked in a vertical direction.
- the view of the circuit board assembly 200 of FIG. 9 is actually a top-down look at the module in application.
- a type of cooling apparatus suitable for cooling the circuit board module assemblies of the present invention is described in U.S. Pat. No. 4,590,538 assigned to the assignee of the present invention and incorporated herein by reference.
- Cooling channels 230 are provided between the circuit boards of the module assembly to allow the vertical rise of cooling fluid through the module assembly to remove the excess heat produced by the integrated circuits in operation. Heat transfer occurs between the chips of circuit boards 1 through 4 (levels 212, 214, 219, 221, respectively) and the fluid passing through channels 230 over the chips. There is also heat transfer from the chips to the circuit boards to the logic jumpers 231 to the passing fluid surrounding the module. The former is the primary heat transfer vehicle from the chips of the circuit boards. Position between logic plates 216 and 217 is the power plate 210 for the distribution of power to the various circuit boards.
- the cooling channels 230 between the circuit boards and surrounding the integrated circuit chips are created by spacing the circuit boards from one another in a spaced relationship using corner spacers aligned in the corners of the circuit boards with power jumpers 232.
- the power jumpers serve the dual purpose of distributing power from power plate 210 and in maintaining the position of the circuit boards in relation to one another by holding the corner spacers 203 in place.
- the strain reliefs 240a-240h also serve as board spacers.
- the module assembly 200 as shown in FIG. 9 depicts one of the four power blades 201 shown to the left.
- the power plate shown as layer 210 is a power distribution plate or circuit board which connects to the four power blades and is used to distribute electrical power throughout the module for powering the integrated circuits.
- the connection between the integrated circuits on the circuit boards and the power plates is by Z-axis memory metal power jumpers 232 which are described in more detail below.
- the integrated circuits 104 are shown in FIG. 9 as rectangles at levels 213, 215, 218 and 220.
- the flying leads from these integrated circuits 104 are attached to circuit boards 212, 214, 219 and 221, respectively.
- circuit board 212 with integrated circuits 104 is assumed to have been previously assembled with the aforementioned flying lead attachment of integrated circuits to circuit boards or one of several alternative attachment techniques.
- the spaces between the integrated circuits at levels 213, 215, 218 and 220 are coolant flow paths which also allow the memory metal logic jumpers 231 to pass through the levels of the module. Spacers are also found between the circuit boards at levels 212, 214, 219 and 221 positioned at the corners of the circuit boards to maintain the circuit boards in a spaced relationship to one another.
- the remaining areas between the circuit board layers allows the free flow of coolant and allows the unobstructed passage of power and logic jumpers.
- the memory metal logic jumper wires 231 and the memory metal power jumper wires 232 are inserted, stretched and, positioned through the board stack before relaxation to interconnect all of the axially aligned through-plated holes on the circuit boards (levels 212, 214, 219, 221), the power plates (level 210) and the logic plates (levels 216, 217).
- the memory metal logic jumpers 231 and the memory metal power jumpers 232 are made in the preferred embodiment of the present invention of a nickel-titanium alloy.
- the memory metal jumpers are released within the axially aligned plated holes to form electrical connections in the Z-axis direction.
- Jumpers 231 in FIG. 9 are similar to the power jumpers 232 also shown in FIG. 9 except for size and diameter.
- the power jumpers 232 may be larger than the logic jumpers 231 to connect to power plates 210 and 223 to supply power to the circuit boards.
- FIG. 10A shows a closeup view of a single power jumper 232 of a preferred sinusoidal shape inserted through the various levels of assembly 200.
- This cross-sectional view of FIG. 10A is not drawn to scale and is offered as a schematic illustration of how the memory metal wires are inserted within the plated hole of the circuit boards, power plates and logic plates. Corner spacers are used at levels 213, 215, 218 and 220 to maintain the circuit boards in a spaced relationship. Buried plated interconnect or surface interconnect on circuit boards and logic plates form the interconnection between the power jumpers and the plated holes for the flying leads of integrated circuits. Logical or electrical communication between integrated circuits and the board edge connectors is achieved therefrom. It will be appreciated by those skilled in the art that logic jumpers will appear similar to the power jumpers shown in FIG. 10A, except that the power jumpers electrically connect to plated holes on the power plate 210 of the assembly 200 and are somewhat larger in diameter.
- FIG. 10B shows a closeup view of a single logic jumper 231 of a second preferred shape inserted through the various levels of assembly 200.
- This cross-sectional view of FIG. 10B is not drawn to scale and is offered as schematic illustration of the memory metal wires inserted within the plated holes of the circuit boards, power plates, and logic plates.
- an average of two contacts per plated hole of each circuit board is accomplished with a minimum of one contact providing the necessary electrical and mechanical bonding between circuit boards.
- Logic jumpers 231 do not contact the power plate, and a clearance hole is provided in the power plate to ensure non-contact.
- FIG. 10C is similar to the closeup side sectional views of FIGS. 10A and 10B except that the misalignment of circuit boards is exaggerated in the X, Y and Z planes to illustrate the compensatory qualities of the memory metal jumper wire when used as a z-axis interconnect between stacked circuit board assemblies.
- it is difficult to provide for exact alignment of the axially-aligned through-plated holes of each individual circuit board.
- a tolerance range is effected in which the plated through holes axially-align within a tolerance of plus or minus 0.8 mils.
- circuit boards and circuit boards spacers do not always provide for perfect parallel alignment of the circuit boards resulting in cocked or warped misalignment of the parallel boards.
- These out-of-tolerance alignments of the circuit boards at hole dimensions of 5.8 mils diameter result in difficult maintenance of electrical connectivity along the z-axis.
- the memory metal jumper wires are extremely tolerant of this misalignment due to their pseudoelastic property. Misalignment or out-of-tolerance alignment of as much as plus or minus 0.8 mils is compensated for the misalignment by the jumper wires.
- the extreme miniaturization of the circuit board assembly of the present invention results in out-of-alignment dimensions which do not shrink in proportion to the circuit board miniaturization.
- pin misalignment actually rises as a percent of the dimensions of the circuit boards as miniaturization is increased.
- the z-axis jumper must have a high degree of compliance to compensate for the increasing percent out-of-tolerance.
- the jumper wires in the z-axis direction provide for mechanical holding of the circuit boards together to maintain the module without the need for fasteners.
- the memory metal jumpers also contribute to the heat dissipation within the module and provide thermal paths for heat conduction away from the circuit boards and into the fluid channels.
- nickel-titanium alloys used in the preferred embodiment of the present invention have poor electrical conductivity. This poor conductivity may be corrected by providing an outer plating such as a gold plating on a copper strike to provide the necessary high conductivity required for low impedance z-axis electrical connections.
- the core material of nickel titanium offers a pseudoelastic material properties which offers the required pin elasticity and compliance to absorb the positional tolerances and misalignments of the circuit boards.
- the high normal forces in a lateral direction due to the pseudoelastic properties ensures good mechanical and electrical performance of the wire.
- the low mass of the nickel titanium alloys for the jumper pins provides for a z-axis jumper wire which is less susceptible to shock and vibration which could cause intermittent connections. Due to the aforementioned fluid emersion cooling techniques, the volume of coolant forced through the coolant passages and around the circuit boards results in an unavoidable vibration due to the pumping action and fluid currents through the module. This continual vibration due to the pumping could result in loosening of a less pseudoelastic material or a higher mass material.
- a plurality of stands of Nitinol alloy could be used to accomplish the z-axis jumper wire.
- a higher normal force may be achieved in random directions on the walls of the thorough plated holes of the individual circuit boards.
- the overall dimensions of the leader potion of the stranded kink memory metal jumper would still need to be to less than inside diameter than the through plated holes to allow for proper insertion of the pins.
- the modules 200 are interconnected using memory metal jumper wires.
- the memory metal wire that is used for the jumpers in a preferred embodiment of the present invention is a nickel-titanium alloy which is sometimes referred to as Nitinol.
- the nickel titanium alloy wire will have the following parameters:
- Nitinol alloy memory metal is available from Raychem under the brand name "Tinel" alloy designation BB. Although in the preferred embodiment of the present invention, specific characteristics of the Nitinol alloy have been described, those skilled in the art will readily recognize that wide variety of nickel titanium alloys could be used with various properties depending upon the particular application of the memory metal jumper wires used in z-axis interconnect of printed circuit boards. Those skilled in the art will readily recognize that the metallic qualities of nitinol are varied extensively by the addition of third metals and by varying the relative percent composition of nickel and titanium to achieve the desired metallic qualities such as hardness, and transition temperature.
- the transition temperature of the memory metal wire must be selected to be below the operating temperature of the electronic assembly so that the memory wire is maintained in the austenitic phase below the forming temperature but above the martensitic transformation temperature.
- Nitinol alloys are described as the best mode of practicing the invention, those skilled in the art will also readily recognize that a wide variety of shape memory metals having superelastic qualities could be substituted therefore.
- Types of shape memory metal alloys include but are not limited to Ag-Zn, Au-Cd, Au-Cu-Zn, Cu-Al, Cu-Al-Ni, Cu-Au-Zn, Cu-Sn, Cu-Zn, Cu-Zn-Al, Cu-Zn-Ga, Cu-Zn-Si, Cu-Zn-Sn, Fe-Pt, In-Tl, Ni-Al, Ni-Ti, Ni-Ti-X (where X is a ternary element), Ti-Co-Ni, Ti-Cu-Ni and others.
- the inventors of the present invention fashioned large scale logic jumpers having a kinked portion out of non-martensitic beryllium-copper alloys. It was observed that the non-martensitic BeCu alloys exhibit sufficient lateral stresses on plated through holes when used as a z-axis jumper connector as long as the kinked portion of the jumper is not plastically deformed beyond a certain point. Non-memory metals such as non-martensitic BeCu alloys, however, tend to plastically deform under continued stress and hence have been found unsuitable for logic jumpers or power jumpers or power jumpers in the preferred embodiment of the present invention in long term applications since they tend to plastically deform over time.
- FIGS. 11A and 11B shown alternate preferred shapes of the memory metal jumpers of the preferred embodiment of the present invention.
- FIG. 11 A shows a detailed view of a shape memory metal wire having a sinusoidal kinked portion which is used for the interconnection of through-plated holes on stacked circuit board assemblies.
- the shape memory metal wires have a nominal diameter of 4.2 mils while the inside diameter of the plated through holes of the circuit board assemblies is nominally 5.8 mils.
- the unstrained pitch of the sinusoidal shaped memory metal jumper of FIG. 11A is 8.6 mils maximum.
- a 0.0205-inch pitch is typical for interconnecting circuit boards having a nominal width of 16 mils.
- the nominal circuit board pitch is 31.8 mils center-to-center, and the smaller 0.0205 pin pitch is used to obtain an average of two contact points per board level.
- the circuit board assembly is approximately 0.196 inch thick when stacked with four circuit boards populated by integrated circuit die, two logic plates and a single center power plate.
- the kinked portion of the memory metal pin is typically 0.246 inch with leader and tail portions of substantially straight dimensions on either end on the kinked portion.
- FIG. 11B shows kinked portions of the logic or power memory metal jumper having more squared corners.
- the dimensions of the memory metal jumper of FIG. 11B are substantially similar to those of FIG. 11A.
- the pins may be manufactured according to the teachings of the present invention as individual jumpers having a short tail section, a long leader section and a central kinked portion.
- the shape memory metal wire may be produced as a continuous string of jumper wires provided on a spool in which the memory metal wire is alternately presented as leader sections or kinked sections. In this fashion, the bulk material may be cut to the desired lengths from the spool for use in automated insertion equipment.
- the four circuit boards, the power plate and the two logic plates of a module assembly are stacked with guide pins through the corner power jumper holes and corner spacers prior to insertion of the memory metal jumper wires in the preferred embodiment of the present invention.
- These memory metal wires are in the preferred embodiment 4.2 mils in diameter and 276 mils in length through the kinked portion.
- the leader section 260 of the memory metal jumper is first inserted through the circuit board stack so that the end of the leader section protrudes through the other side.
- the leader section and the tail section is then grasped or clamped and the tail section 262 is pulled away from the leader section to substantially straighten the kinked portion 261 of the memory metal jumper.
- the stretching of the memory metal jumper wire causes at least partial stress-induced martensitic transformation of the memory metal (as described more fully below).
- the leader section 260 is then pulled so that the substantially straightened portion 261a of the kinked memory metal jumper is pulled through and positioned through the stack of circuit boards and positioned within the plated through holes.
- the tail 262 of the memory metal jumper is then released so that the jumper will reform into its kinked position and so that electrical connections are made within the axially aligned plated through-holes of the stack.
- the tail and leader sections may be left extending from the stack so that the stack may be easily disassembled during maintenance.
- the disassembly could then be accomplished by grasping the tail and leader sections of the memory metal jumper, stretching the jumper until it is substantially straight and withdrawing the jumper from the stack.
- the leader section of the jumper could be snipped off. In this case, during maintenance, the tail end of the jumper could be grasped and the jumper could be dragged from the plated holes, allowing disassembly of the stack.
- both the leader and tail sections could be snipped off flush with the surfaces of the outer circuit boards.
- the module power blades 201 are attached to the power plates 210 and added to the partial module assembly using power jumpers 232 in an insertion method similar to the insertion method of jumpers for the individual circuit board stacks. In this case, a kinked memory metal power jumper is inserted in a similar insertion cycle, as described above for the logic jumpers of a single circuit board stack assembly.
- the module power blades are attached as a last step by inserting memory metal wires into cavities in the machined power blades.
- the kinked memory metal jumper 231 may be inserted in the board stack by dragging the kinked portion through the plated holes.
- the leader section is first inserted into the plated through holes in a Z-axis direction of the board stack.
- a clamp is only applied to the leader section 260.
- the clamp on the leader section is then used to drag the kinked portion of the memory metal jumper 231 through the board stack.
- the temperature of the kinked memory metal wire may be lowered below the transition temperature to place the alloy of the wire into the martensitic phase.
- the wire is then longitudinally stressed substantially straight. While in the martensitic phase, the wire will remain substantially straight after the stress is removed.
- the wire is then inserted into the axially aligned holes of a plurality of circuit boards.
- the wire is then warmed or allowed to warm above the transition temperature so that the alloy of the wire enters the austenitic phase. Above the transition temperature, the memory metal wire reestablishes its original kinked shape to effect electrical connection between the circuit boards. Removal of the wires may be accomplished using the techniques described above.
- the stresses in a single direction may sum to force misalignment of the circuit boards from one another.
- the memory metal logic jumpers and power jumpers are inserted at relatively random depths and/or rotations so that the sum tension along any one given direction in a circuit board stack is equivalent to the stresses exerted in any other direction thus, negating any additive effects.
- Kinked memory metal jumper wires prior to insertion exist in an austenitic or parent phase.
- the pseudoelastic behavior is obtained through stress-induced martensitic transformation.
- FIG. 13 (taken from the article, "Shape-Memory-Effect Alloys", from the Encyclopedia of Materials, and hereby incorporated by reference) a schematic stress-strain curve is shown for memory metal alloys showing the complementary relationship of pseudoelastic and shape-memory behavior. Either cooling the memory metal below the transformation temperature range or application of external stress will cause a martensitic transformation phase change (Parent to Martensite) while heating or unstressing will reverse it (Martensite to Parent).
- the pseudoelastic behavior is the mechanical analogue to the athermal (cooling-heating) formation-reversion of martensite.
- martensitic transformation proceeds as stress increases and reverses with shape recovery when the stress is removed.
- shape memory effect and the pseudoelastic behavior of the memory metal are complementary aspects in the deformation and reversion of thermoelastic martensite in any memory metal (shape memory) alloy. When the memory metal is deformed some of the strain is recovered immediately on unloading (pseudoelastic behavior) and the rest on heating (shape-memory effect).
- the free state memory metal jumper wire exists in an austenitic parent phase at "A" shown in FIG. 13. As the memory metal jumper wire is stretched, phase transformation to martensite begins at "B". Continued phase transformation from austenite to martensite occurs through increased strain but relatively constant stress until "C”, where complete transformation has occurred to martensite. If continued strain is applied, stress increases rapidly above "C” until the 6-10% recoverable strain is exceeded, at which time plastic deformation would occur. In the preferred embodiment of the present invention, the memory metal jumper wires are loaded only to an 8% maximum strain during tensioning prior to board insertion or worst case tolerance loading.
- the logic jumpers, power jumpers, and power blade connections do not all have to be made from memory metal alloys.
- the logic jumpers may be memory metal wires as disclosed in the present application and the power jumpers may be soft gold as disclosed in copending application discussed above.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Thermal Sciences (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Wire Bonding (AREA)
- Manufacturing Of Electrical Connectors (AREA)
Abstract
Description
______________________________________ Gold 99.990% min. Beryllium 0.002% max. Copper 0.004% max. Other Impurities (each) 0.003% max. Total All Impurities 0.010% max. ______________________________________
______________________________________ Mechanical Properties: Ultimate Tensile Strength 125,000 psi Fatigue Stress 70 KSI × 10.sup.7 Cycles Hardness 89 .sup.R B Poisson's Ratio .33 Material Design Stress 20,000psi % Strain 8% max design Coefficient of Thermal Expansion: Austenite 11.0 × 10.sup.-6 /°C. Martensite 6.6 × 10.sup.-6 /°C. Electrical Resistivity:Austenite 100 × 10.sup.-6 Ω-cm Martensite 80 × 10.sup.-6 Ω-cm ______________________________________
Claims (59)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/324,906 US5098305A (en) | 1987-05-21 | 1989-03-17 | Memory metal electrical connector |
AU43133/89A AU4313389A (en) | 1989-03-17 | 1989-04-03 | Memory metal electrical connector |
PCT/US1989/001401 WO1990011629A1 (en) | 1989-03-17 | 1989-04-03 | Memory metal electrical connector |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/053,142 US5054192A (en) | 1987-05-21 | 1987-05-21 | Lead bonding of chips to circuit boards and circuit boards to circuit boards |
US07/324,906 US5098305A (en) | 1987-05-21 | 1989-03-17 | Memory metal electrical connector |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/053,142 Continuation-In-Part US5054192A (en) | 1987-05-21 | 1987-05-21 | Lead bonding of chips to circuit boards and circuit boards to circuit boards |
Publications (1)
Publication Number | Publication Date |
---|---|
US5098305A true US5098305A (en) | 1992-03-24 |
Family
ID=23265620
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/324,906 Expired - Lifetime US5098305A (en) | 1987-05-21 | 1989-03-17 | Memory metal electrical connector |
Country Status (3)
Country | Link |
---|---|
US (1) | US5098305A (en) |
AU (1) | AU4313389A (en) |
WO (1) | WO1990011629A1 (en) |
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