US20070234562A1 - Method and apparatus for forming multi-layered circuits using liquid crystalline polymers - Google Patents
Method and apparatus for forming multi-layered circuits using liquid crystalline polymers Download PDFInfo
- Publication number
- US20070234562A1 US20070234562A1 US11/749,102 US74910207A US2007234562A1 US 20070234562 A1 US20070234562 A1 US 20070234562A1 US 74910207 A US74910207 A US 74910207A US 2007234562 A1 US2007234562 A1 US 2007234562A1
- Authority
- US
- United States
- Prior art keywords
- fixture
- material stack
- stack
- opening
- press
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000000034 method Methods 0.000 title claims abstract description 37
- 229920000106 Liquid crystal polymer Polymers 0.000 title abstract description 17
- 239000000463 material Substances 0.000 claims abstract description 107
- 210000000569 greater omentum Anatomy 0.000 claims description 27
- 238000003825 pressing Methods 0.000 claims description 23
- 230000003213 activating effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 60
- 238000003475 lamination Methods 0.000 description 23
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 12
- 229910052802 copper Inorganic materials 0.000 description 11
- 239000010949 copper Substances 0.000 description 11
- 239000000565 sealant Substances 0.000 description 11
- 239000004809 Teflon Substances 0.000 description 9
- 229920006362 Teflon® Polymers 0.000 description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000005553 drilling Methods 0.000 description 4
- 239000007769 metal material Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 125000000664 diazo group Chemical group [N-]=[N+]=[*] 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000002648 laminated material Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
- 239000012286 potassium permanganate Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- -1 stainless teel Substances 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/0046—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by constructional aspects of the apparatus
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2305/00—Condition, form or state of the layers or laminate
- B32B2305/55—Liquid crystals
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2309/00—Parameters for the laminating or treatment process; Apparatus details
- B32B2309/60—In a particular environment
- B32B2309/68—Vacuum
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2457/00—Electrical equipment
- B32B2457/08—PCBs, i.e. printed circuit boards
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/12—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0141—Liquid crystal polymer [LCP]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/08—Treatments involving gases
- H05K2203/085—Using vacuum or low pressure
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/5317—Laminated device
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53196—Means to apply magnetic force directly to position or hold work part
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/532—Conductor
Definitions
- This invention relates, generally, to a method and apparatus for forming multi-layered circuits and, in particular, to a method and apparatus for forming high layer count circuits comprising liquid crystalline polymer insulating or dielectric layers.
- Multi-layered circuit boards are typically fabricated from layers of distinct circuit patterns separated by insulating material such as thin dielectric layers and interconnected by vias, or holes, that are drilled through the circuit board and plated with metal. It is desirable to interconnect integrated circuit packages and discrete electronic devices in highly dense assemblies to reduce signal paths and overall size.
- the number of layers comprising multi-layered circuit boards becomes limited due to the increased non-uniformity in thickness and high fluid flow as more layers are added.
- layers of liquid crystalline polymer with copper on both sides are stacked up and then laminated together using a mechanical/electrical press, a mechanical hot oil press, or a mechanical hot steam press. Vias are then made by drilling holes in the multi-layered board and the interior surface of the vias are plated with metal to connect the distinct circuit patterns of the different layers.
- Controlling or limiting the pressure applied to the multi-layer stack during the lamination cycle would decrease shifting of the layer features and would enable the production of a multi-layer stack having a precise uniform thickness.
- a multi-layer stack having reduced feature shifting and a uniform thickness enables more precise processing for the remaining processing steps including the creation of vias within the multi-layer stack having more uniform depths and diameters and, as a result, more uniform plating of the interior of the vias.
- the present invention provides a method and apparatus for forming high layer count, multi-layered circuits.
- the present invention is particularly useful for forming high layer count, multi-layered circuits comprising liquid crystalline polymer layers.
- the method and apparatus of the present invention function to control and/or limit the pressure applied to a multi-layer material (product) stack during lamination while fabricating multi-layer circuits.
- an apparatus for forming multi-layered circuits which includes a press having top and bottom platens capable of applying pressure to a material stack located between the platens and a fixture positioned between the platens having an opening therein in which to position the material stack.
- the fixture functions to limit or control the pressure applied to the material stack which in turn results in a laminated material stack having a uniform thickness.
- a top caul plate is positioned between the top platen and the fixture and a bottom caul plate is positioned between the bottom platen and the fixture.
- a top separator plate may be positioned between the top caul plate and the fixture and a bottom separator plate may be positioned between the bottom caul plate and the fixture.
- the material stack may be enclosed so that a vacuum can be applied to the bag during lamination.
- Other means of vacuum such as an enclosed vacuum press will work as well.
- a thermocouple is inserted into the material stack before the vacuum is applied and before lamination.
- a number of release sheets and other materials may be used to enclose the material stack.
- a first release sheet is positioned on top of the bottom separator plate, a bagging material is positioned on top of the first release sheet, a breather material is positioned on top of the bagging material, a second release sheet is positioned between the breather material and the fixture containing a material stack, a sealant tape is applied around at least half of the perimeter of the bagging material and underneath and around the thermocouple and also around copper tubing positioned along the perimeter of the bagging material where the copper tubing is connected to a disconnect, a third release sheet is positioned on top of the material stack, and half of the perimeter of the bagging material is folded over the sealant tape and pressure is applied to the sealant tape to seal the bagging material thereby producing a vacuum enclosure containing the breather material, the fixture, and the material stack.
- At least one pin may be inserted into the fixture to hold the fixture in place during lamination of the material stack.
- the present invention also provides a method for forming multi-layered circuits which includes the steps of providing a press having top and bottom platens, positioning a fixture having an opening therein between the top and bottom platens, positioning a material stack within the opening in the fixture, and applying pressure to the material stack by applying pressure to the top and bottom platens.
- the step of positioning a fixture having an opening therein includes the step of first creating the fixture so that it has an opening with a desired shape, size, and depth depending upon the end lamination product.
- the method of the present invention may also include the step of placing the fixture and the material stack within a vacuum enclosure and applying a vacuum to the vacuum enclosure before the step of applying pressure to the material stack.
- heat may be applied to the top and bottom platens during the step of applying pressure to the material stack.
- the method may include positioning a top caul plate between the top platen and the fixture and a bottom caul plate between the bottom platen and the fixture.
- the method of the present invention may also include positioning a top separator plate between the top caul plate and the fixture and a bottom separator plate between the bottom caul plate and the fixture.
- a fixture for placement between top and bottom platens in a press where the fixture includes an opening in which to position a material stack for lamination.
- the fixture may also include a slot connecting the opening in the fixture to the exterior of the fixture so that the slot can retain connection means for connecting the material stack to a thermocouple.
- FIG. 1 is a perspective view of the apparatus of the present invention for forming multi-layer circuits before applying pressure to the material stack;
- FIG. 2 is a perspective view of the apparatus of the present invention for forming multi-layer circuits after applying pressure to the material stack;
- FIG. 3 is an exploded view of an exemplary embodiment of a material stack prior to loading it into the opening of the fixture;
- FIG. 4 is a top plan view of the material stack positioned within the opening of the fixture prior to applying pressure to the material stack;
- FIG. 5 is a cross-sectional view of the apparatus of the present invention before applying pressure to the material stack;
- FIG. 6 is a cross-sectional view of the apparatus of the present invention after applying pressure to the material stack
- FIG. 7 is a cross-sectional schematic showing an exemplary embodiment of a portion of the apparatus of the present invention.
- FIG. 8 is a schematic showing an exemplary embodiment of the present invention in which the fixture and material stack are enclosed within a vacuum bag prior to applying pressure to the material stack;
- FIG. 9 is a flowchart depicting an exemplary embodiment of the method of the present invention for forming multi-layered circuits
- FIG. 10 is a flowchart depicting another exemplary embodiment of the method of the present invention for forming multi-layered circuits
- FIG. 11 is a flowchart depicting an exemplary method for custom creating the fixture of the present invention.
- FIG. 12 is a flowchart depicting an exemplary process for completing the production of a multi-layered circuit in accordance with the present invention.
- FIG. 13 is a flowchart depicting an exemplary process for desmear via preparation in accordance with the present invention prior to plating the inside of the vias.
- Methods and apparatus in accordance with the present invention generally provide a method and apparatus for forming high layer count multi-layered circuits comprising liquid crystalline polymer (LCP) insulating layers where there is minimal feature shifting of the layers and uniform thickness of the high layer count multi-layer circuit.
- the subject invention is specifically directed to a press having top and bottom platens capable of applying pressure to a material stack located between the platens and a fixture positioned between the platens where the fixture contains an opening in which to position the material stack before applying pressure.
- the press may be a mechanical/electrical press, a mechanical hot oil press, a mechanical hot steam press, or any other type of press that is capable of applying pressure to a material stack.
- FIGS. 1 and 2 show perspective views of an exemplary embodiment of the apparatus 10 of the present invention for forming high count multi-layer circuits both before and after the apparatus is used to apply pressure to a material stack, i.e. a stack of liquid crystalline polymer insulating layers each having patterned circuit features in the attached conductive foil contained thereon.
- Apparatus 10 generally includes a press 12 having a top platen 14 and a bottom platen 16 , a top caul plate 18 , a bottom caul plate 20 , and a fixture 22 having an opening therein for placement of a material stack 24 .
- the material stack 24 may comprise a high number of liquid crystalline polymer insulating layers each having patterned circuits in the attached foil features.
- a liquid crystalline polymer adhesive layer may be placed between each of the liquid crystalline polymer layers to create the material stack which is then pressed and laminated to form a high layer multi-level circuit.
- material stack 24 is positioned within the opening of fixture 22 , and extends in height above the height of fixture 22 , prior to applying pressure to material stack 24 .
- fixture 22 functions to limit the lamination pressure. Limiting lamination pressure on material stack 24 with fixture 22 during lamination provides a uniform pressure which in turn provides a laminated package having a uniform thickness and minimal shifting of features on the various layers comprising the material stack.
- FIG. 2 shows the apparatus of the present invention and material stack 24 after applying uniform pressure to material stack 24 using fixture 22 . Material stack 24 is now a laminated package having a thickness or height equal to or less than the thickness or height of fixture 22 .
- Lamination of the material stack is done by bonding the layers of the material stack with heat and pressure. It should be noted that platens 14 and 16 also provide a heat source for elevating the temperature of the layers in the material stack. When using liquid crystalline polymer layers in material stack 24 , lamination temperatures and pressures are selected to bond the layers together and the temperature used is less than the temperature at which the liquid crystalline polymer layers and any conductive layer (such as copper) deteriorate. Lamination may be performed with heated rolls or presses, used in combination with the fixture, to bond the layers in the material stack.
- FIG. 3 an exploded view of an exemplary embodiment of a material stack is shown prior to loading it into the opening of fixture 22 .
- the material stack shown in FIG. 3 includes alternating layers of liquid crystalline polymer 26 and adhesive 28 .
- the fixture thickness is 0.097 inches.
- the laminated package that is produced from applying pressure to the material stack contained within the fixture results in a package having a uniform thickness of about 0.0376 inches.
- FIG. 4 shows a top plan view of material stack 24 positioned within the opening of fixture 22 prior to applying pressure to material stack 24 .
- Fixture 22 includes an opening 23 and is preferably made of a metal material other than aluminum, and more preferably a hard metal material such as stainless teel, copper, titanium, or any other metal material that can withstand a temperature of 550° F.
- fixture 22 comprises a rectangular shape having opening 23 with a slot 30 connecting opening 23 with the exterior of fixture 22 .
- Slot 30 is for receiving and retaining a thermocouple wire from a thermocouple which is used to attach the thermocouple to a material stack 24 contained within opening 23 of fixture 22 .
- FIGS. 5 and 6 show cross-sectional views of the fixture 22 and material stack 24 after being prepared for the application of heat and pressure. These figures will be discussed in more detail after describing the stack material preparation and lay-up with the fixture and the bagging of the prepared stack materials, both of which are carried out prior to lamination of the material stack.
- FIG. 7 A cross-sectional schematic showing an exemplary embodiment of a portion of the apparatus of the present invention is shown in FIG. 7 .
- a product stack is stacked for lamination by first placing a second bottom caul plate 36 (i.e. a different caul plate than that described with reference to FIG. 1 ) on the lay up surface (the surface which is being used to prepare the stack).
- a first bottom separator plate 38 is then placed on top of the second bottom caul plate 36 .
- the fixture 22 See FIG. 1
- the fixture 22 See FIG. 1
- the fixture 22 is then placed on the first bottom separator plate 38 and a few pins are inserted into the fixture, second bottom caul plate 36 , and first bottom separator plate 38 to hold the fixture in place.
- the product layers are then positioned within the opening 23 of the fixture 22 (See FIG. 4 ).
- the lamination book 40 shown in FIG. 7 includes the fixture and the product layers.
- the product layers may be liquid crystalline polymer layers which may alternate with adhesive layers as shown in FIG. 3 .
- a thermocouple wire 39 is then installed close to the middle of the product layers (See FIG. 8 ) and attached with Kapton tape. High temperature thermocouple wire is used and it is not placed near any part of the circuitry of the board.
- a second top caul plate 42 is then placed over the product layers and a first bottom separator plate 44 is then placed on the second top caul plate 42 . Any remaining tooling pins are then installed to ensure that the fixture, second top and bottom caul plates 42 and 38 , and first top and bottom separator plates 36 and 44 are seated in place.
- Second top and bottom caul plates 42 and 38 and first top and bottom separator plates 44 and 36 are preferably comprised of any strong metal material that can withstand temperature of 550° F. and be able to maintain its shape and form.
- a bagging material 46 and a breather material 48 are cut such that they are approximately six inches wider than the second top and bottom caul plates 42 and 38 and the first top and bottom separator plates 44 and 36 .
- the bagging material 46 and breather material 48 for a twelve inch by eighteen inch stack should be eighteen inches wide and forty-two inches long.
- a skived Teflon release sheet 50 is cut three inches larger than the second top and bottom caul plates 42 and 38 and the first top and bottom separator plates 44 and 36 .
- the skived Teflon release sheet 50 should be cut to fifteen inches by twenty-one inches where the second top and bottom caul plates 42 and 38 and the first top and bottom separator plates 44 and 36 are twelve inches by eighteen inches.
- the skived Teflon release sheet 50 is placed on a second bottom separator plate 52 and the bagging material 46 is placed on the skived Teflon release sheet 50 .
- Breather material 48 is placed on bagging material 46 and a second skived Teflon release sheet 54 is placed on the breather material 48 .
- a sealant tape 56 (See FIG. 8 ) is applied to the bagging material 46 near the edge of the bagging material 46 and under the thermocouple wire 39 .
- the sealant tape 56 is wrapped around the thermocouple wire 39 aligning the sealant tape 56 with the sealant tape 56 on the edge of the bagging material 46 .
- Sealant tape 56 is then wrapped around a copper tubing 58 approximately four inches from the end of a quick disconnect 60 (See FIG. 8 ).
- the copper tubing 58 is positioned along side of the lamination book 40 aligning sealant tape 56 on the edge of the bagging material 46 with the sealant tape 56 wrapped around the copper tubing 58 .
- the third skived Teflon release sheet 62 is placed on top of first top separator plate 44 and the flaps of the breather material 48 and bagging material 46 are then folded over the lamination book 40 and the third skived Teflon release sheet 62 .
- the bagging material 46 is then aligned evenly and sealant tape 56 is used to close the bag.
- a fourth skived Teflon release sheet 64 is placed over the top of the bag and a second top separator plate 66 is placed over the fourth skived Teflon release sheet 64 .
- the entire prepared, stacked, and bagged assembly as described in the preceding paragraphs is then loaded into the press 12 between top and bottom caul plates 18 and 20 and top and bottom platens 14 and 16 shown in FIG. 1 .
- a vacuum is applied to the sealed bag containing the material stack before applying the press.
- the material stack 24 is shown having a thickness greater than the fixture 22 prior to lamination in FIG. 5 and in FIG. 6 the material stack 24 has a thickness equal to or less than the fixture 22 after lamination.
- a flowchart 70 is shown which depicts an exemplary embodiment of the method of the present invention for forming high count multi-layered circuits.
- a press or at least one roller is provided which is capable of applying pressure and heat to a material stack.
- a fixture having an opening is positioned within the press or under a roller and in step 73 a material stack is placed within the opening in the fixture.
- Pressure is applied to the material stack in step 74 to laminate the material stack and the process ends in step 75 .
- Heat may also be applied along with applying the pressure.
- FIG. 10 is a flow chart 80 depicting another exemplary embodiment of the method of the present invention for forming high count multi-layered circuits.
- a fixture is created having an opening therein in which to place a material stack.
- a press is provided for applying pressure and heat to the material stack and in step 84 the fixture created in step 81 is positioned within the press.
- Optional steps 83 and 85 may also occur in which a pair of caul plates (step 83 ) and separator plates (step 85 ) are placed between platens in the press and the fixture is then positioned between the separator plates of the press in step 84 .
- a material stack is positioned within the opening contained within the fixture.
- step 87 the fixture and the material stack are placed in a vacuum bag and a vacuum is applied in step 88 .
- Pressure is then applied in step 89 or, alternatively, heat and pressure are applied in step 90 in order to laminate the material stack.
- the process then ends in step 91 .
- step 102 the customer presents their specifications for a high count multi-layer circuit and customer service takes in those specifications in step 104 .
- step 106 a contract is reviewed in which the customers specs are contained and product engineering begins in step 108 to meet product specifications communicated by the customer. Prints and customer specs are again checked in step 110 . If the prints and customer specs are not okay, these problems are discussed with the customer in step 111 . After customer problems are discussed in step 111 , results of those discussions are then forwarded to customer service in step 104 to begin the process once again.
- step 110 If, in step 110 , the prints and customer specs are acceptable, then further planning and generation of traveler documents (reference documents) are created in step 112 . Data is then released to the cam in step 114 and the customer data is checked in step 116 . Document control takes place in step 118 and an inquiry as to the acceptability of the data is undertaken in step 120 . If there are data problems, customer service is contacted in step 121 and problems are again discussed with the customer in step 111 . If no data problems are present in step 120 , working tools are developed in step 122 . As part of that process, a photo plot is undertaken in step 124 and an artwork inspection is performed in step 126 .
- Image problems are encountered in step 128 and, if there are image problems, there is a return to step 122 in which work tools are again developed. If no image problems exist in step 128 , silver T/U diazo tooling occurs in step 130 and a traveler document (reference document) is released in step 140 .
- working tools are developed by first developing programming in step 132 , drilling and routing in step 134 , obtaining drilling/routing approval in step 136 , and then inquiring as to whether there are any first article problems in step 138 . If there are first article problems in step 138 , there is a return to step 132 to redevelop programming. If there are no first article problems in step 138 , a traveler document (reference document) is released in step 140 .
- step 140 After the traveler document is released in step 140 , document control is performed in step 142 and the document is released to production in step 144 . If problems or changes occur during production, traveler change notices and other standard operating procedures may be created in step 146 before further planning and generation of a traveler document (reference document) is generated in step 112 .
- FIG. 12 is a flow chart 200 depicting an exemplary process for completing the production of a high count multi-layered circuit in accordance with the present invention.
- drilling takes place in step 204 and deburring takes place in step 206 .
- Desmear hole prep takes place in step 208 , electroless copper is applied in step 210 and flash copper plating takes place in step 212 .
- FIG. 13 is a flow chart 208 depicting an exemplary process for desmear via hole preparation in accordance with the present invention prior to plating the inside of the vias.
- the laminated panel is dipped in a permanganate solution which comprises 55-65 grams per liter of potassium permanganate in a 5-7% sodium hydroxide solution.
- the panel is dipped for five minutes at a minimum of 175° F.
- step 304 the panel undergoes a water rinse in ambient water temperature for approximately 2-3 minutes.
- step 306 another water rinse is conducted at ambient water temperature for 5-7 minutes.
- the panel is then neutralized in step 308 in a neutralizer solution containing 9-11% neutralizer and 8-10% sulfuric acid.
- the panel is dipped in the neutralizer for approximately four minutes at a temperature of 105° F.
- the panel then undergoes a water rinse at ambient temperature for 3-5 minutes in step 310 and another water rinse at ambient water temperature for 3-5 minutes in step 312 .
- step 312 the electroless copper step 210 is conducted as previously described in relation to FIG. 12 .
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Casting Or Compression Moulding Of Plastics Or The Like (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A method and apparatus for producing high layer count, multi-layer circuits which includes fabricating a fixture having an opening therein for placement within a press. A material stack, particularly a material stack having multiple layers of liquid crystalline polymer, is placed within the opening of the fixture before activating the press to laminate the material stack positioned within the fixture.
Description
- This application is a divisional patent application based on utility patent application entitled “METHOD AND APPARATUS FOR FORMING MULTI-LAYERED CIRCUITS USING LIQUID CRYSTALLINE POLYMERS” and having Ser. No. 11/187,220, filed Jul. 22, 2005, which is herein incorporated in its entirety.
- This invention relates, generally, to a method and apparatus for forming multi-layered circuits and, in particular, to a method and apparatus for forming high layer count circuits comprising liquid crystalline polymer insulating or dielectric layers.
- Multi-layered circuit boards are typically fabricated from layers of distinct circuit patterns separated by insulating material such as thin dielectric layers and interconnected by vias, or holes, that are drilled through the circuit board and plated with metal. It is desirable to interconnect integrated circuit packages and discrete electronic devices in highly dense assemblies to reduce signal paths and overall size.
- However, the number of layers comprising multi-layered circuit boards becomes limited due to the increased non-uniformity in thickness and high fluid flow as more layers are added. During the processing of some exemplary circuit boards, layers of liquid crystalline polymer with copper on both sides are stacked up and then laminated together using a mechanical/electrical press, a mechanical hot oil press, or a mechanical hot steam press. Vias are then made by drilling holes in the multi-layered board and the interior surface of the vias are plated with metal to connect the distinct circuit patterns of the different layers. When the multilayer stack produces more liquid when being pressed into a laminated package, features or circuit tracers can shift and, as a result, not line up. In addition, when pressure and heat are applied to the multi-layer stack by the mechanical/electrical press, more pressure gets applied to the center of the multi-layer stack than the outer perimeter of the stack. This non-uniform pressure distribution results in a multi-layer stack having a non-uniform thickness and conductor layer feature shifting. In addition, it becomes difficult to drill and plate the interior surfaces of the vias within the non-uniformity of the multi-layer stack. This non-uniformity also becomes a performance issue at high frequencies.
- Controlling or limiting the pressure applied to the multi-layer stack during the lamination cycle would decrease shifting of the layer features and would enable the production of a multi-layer stack having a precise uniform thickness. A multi-layer stack having reduced feature shifting and a uniform thickness enables more precise processing for the remaining processing steps including the creation of vias within the multi-layer stack having more uniform depths and diameters and, as a result, more uniform plating of the interior of the vias.
- Current methods for fabricating multi-layer stacks of liquid crystalline polymers with copper foil are not capable of limiting feature shifting in the various layers and/or controlling or limiting the pressure applied to the multi-layer stacks during lamination. As a result, the number of layers that can be laminated to form a multi-layer circuit is limited in order to avoid feature shifting and non-uniformity in the thickness of the multi-layer stack.
- Accordingly, there is a need for a method and apparatus for producing a high layer count, multi-layer circuit board having reduced feature shifting and a uniform thickness in order to provide a structure for supporting and interconnecting a high density of electronic devices.
- In general, the present invention provides a method and apparatus for forming high layer count, multi-layered circuits. The present invention is particularly useful for forming high layer count, multi-layered circuits comprising liquid crystalline polymer layers. The method and apparatus of the present invention function to control and/or limit the pressure applied to a multi-layer material (product) stack during lamination while fabricating multi-layer circuits.
- In accordance with one aspect of the present invention, an apparatus for forming multi-layered circuits is provided which includes a press having top and bottom platens capable of applying pressure to a material stack located between the platens and a fixture positioned between the platens having an opening therein in which to position the material stack. The fixture functions to limit or control the pressure applied to the material stack which in turn results in a laminated material stack having a uniform thickness.
- In accordance with a further aspect of the invention, a top caul plate is positioned between the top platen and the fixture and a bottom caul plate is positioned between the bottom platen and the fixture. In addition, a top separator plate may be positioned between the top caul plate and the fixture and a bottom separator plate may be positioned between the bottom caul plate and the fixture.
- In accordance with yet a further aspect of the invention, the material stack may be enclosed so that a vacuum can be applied to the bag during lamination. Other means of vacuum such as an enclosed vacuum press will work as well. A thermocouple is inserted into the material stack before the vacuum is applied and before lamination. A number of release sheets and other materials may be used to enclose the material stack. In one exemplary embodiment of enclosing the material stack, a first release sheet is positioned on top of the bottom separator plate, a bagging material is positioned on top of the first release sheet, a breather material is positioned on top of the bagging material, a second release sheet is positioned between the breather material and the fixture containing a material stack, a sealant tape is applied around at least half of the perimeter of the bagging material and underneath and around the thermocouple and also around copper tubing positioned along the perimeter of the bagging material where the copper tubing is connected to a disconnect, a third release sheet is positioned on top of the material stack, and half of the perimeter of the bagging material is folded over the sealant tape and pressure is applied to the sealant tape to seal the bagging material thereby producing a vacuum enclosure containing the breather material, the fixture, and the material stack.
- In accordance with yet a further aspect of the present invention, at least one pin may be inserted into the fixture to hold the fixture in place during lamination of the material stack.
- The present invention also provides a method for forming multi-layered circuits which includes the steps of providing a press having top and bottom platens, positioning a fixture having an opening therein between the top and bottom platens, positioning a material stack within the opening in the fixture, and applying pressure to the material stack by applying pressure to the top and bottom platens.
- In accordance with a further aspect of the method of the present invention, the step of positioning a fixture having an opening therein includes the step of first creating the fixture so that it has an opening with a desired shape, size, and depth depending upon the end lamination product. The method of the present invention may also include the step of placing the fixture and the material stack within a vacuum enclosure and applying a vacuum to the vacuum enclosure before the step of applying pressure to the material stack.
- In accordance with yet another aspect of the method of the present invention, heat may be applied to the top and bottom platens during the step of applying pressure to the material stack. In addition, the method may include positioning a top caul plate between the top platen and the fixture and a bottom caul plate between the bottom platen and the fixture. The method of the present invention may also include positioning a top separator plate between the top caul plate and the fixture and a bottom separator plate between the bottom caul plate and the fixture.
- In accordance with still a further aspect of the invention, a fixture is provided for placement between top and bottom platens in a press where the fixture includes an opening in which to position a material stack for lamination. The fixture may also include a slot connecting the opening in the fixture to the exterior of the fixture so that the slot can retain connection means for connecting the material stack to a thermocouple.
- The present invention will hereinafter be described in conjunction with the appended drawing figures, wherein like numerals denote like elements, and:
-
FIG. 1 is a perspective view of the apparatus of the present invention for forming multi-layer circuits before applying pressure to the material stack; -
FIG. 2 is a perspective view of the apparatus of the present invention for forming multi-layer circuits after applying pressure to the material stack; -
FIG. 3 is an exploded view of an exemplary embodiment of a material stack prior to loading it into the opening of the fixture; -
FIG. 4 is a top plan view of the material stack positioned within the opening of the fixture prior to applying pressure to the material stack; -
FIG. 5 is a cross-sectional view of the apparatus of the present invention before applying pressure to the material stack; -
FIG. 6 is a cross-sectional view of the apparatus of the present invention after applying pressure to the material stack; -
FIG. 7 is a cross-sectional schematic showing an exemplary embodiment of a portion of the apparatus of the present invention; -
FIG. 8 is a schematic showing an exemplary embodiment of the present invention in which the fixture and material stack are enclosed within a vacuum bag prior to applying pressure to the material stack; -
FIG. 9 is a flowchart depicting an exemplary embodiment of the method of the present invention for forming multi-layered circuits; -
FIG. 10 is a flowchart depicting another exemplary embodiment of the method of the present invention for forming multi-layered circuits; -
FIG. 11 is a flowchart depicting an exemplary method for custom creating the fixture of the present invention; -
FIG. 12 is a flowchart depicting an exemplary process for completing the production of a multi-layered circuit in accordance with the present invention; and -
FIG. 13 is a flowchart depicting an exemplary process for desmear via preparation in accordance with the present invention prior to plating the inside of the vias. - Methods and apparatus in accordance with the present invention generally provide a method and apparatus for forming high layer count multi-layered circuits comprising liquid crystalline polymer (LCP) insulating layers where there is minimal feature shifting of the layers and uniform thickness of the high layer count multi-layer circuit. The subject invention is specifically directed to a press having top and bottom platens capable of applying pressure to a material stack located between the platens and a fixture positioned between the platens where the fixture contains an opening in which to position the material stack before applying pressure. It should be understood by those skilled in the art that any type of press may be used in accordance with the invention. For example, the press may be a mechanical/electrical press, a mechanical hot oil press, a mechanical hot steam press, or any other type of press that is capable of applying pressure to a material stack.
-
FIGS. 1 and 2 show perspective views of an exemplary embodiment of theapparatus 10 of the present invention for forming high count multi-layer circuits both before and after the apparatus is used to apply pressure to a material stack, i.e. a stack of liquid crystalline polymer insulating layers each having patterned circuit features in the attached conductive foil contained thereon.Apparatus 10 generally includes apress 12 having atop platen 14 and abottom platen 16, atop caul plate 18, abottom caul plate 20, and afixture 22 having an opening therein for placement of amaterial stack 24. As previously stated, thematerial stack 24 may comprise a high number of liquid crystalline polymer insulating layers each having patterned circuits in the attached foil features. In addition, a liquid crystalline polymer adhesive layer may be placed between each of the liquid crystalline polymer layers to create the material stack which is then pressed and laminated to form a high layer multi-level circuit. - As shown in
FIG. 1 ,material stack 24 is positioned within the opening offixture 22, and extends in height above the height offixture 22, prior to applying pressure tomaterial stack 24. During lamination (when pressure is applied to thematerial stack 24 by press 12),fixture 22 functions to limit the lamination pressure. Limiting lamination pressure onmaterial stack 24 withfixture 22 during lamination provides a uniform pressure which in turn provides a laminated package having a uniform thickness and minimal shifting of features on the various layers comprising the material stack.FIG. 2 shows the apparatus of the present invention andmaterial stack 24 after applying uniform pressure tomaterial stack 24 usingfixture 22.Material stack 24 is now a laminated package having a thickness or height equal to or less than the thickness or height offixture 22. - Lamination of the material stack is done by bonding the layers of the material stack with heat and pressure. It should be noted that
platens material stack 24, lamination temperatures and pressures are selected to bond the layers together and the temperature used is less than the temperature at which the liquid crystalline polymer layers and any conductive layer (such as copper) deteriorate. Lamination may be performed with heated rolls or presses, used in combination with the fixture, to bond the layers in the material stack. - Turning now to
FIG. 3 , an exploded view of an exemplary embodiment of a material stack is shown prior to loading it into the opening offixture 22. The material stack shown inFIG. 3 includes alternating layers of liquidcrystalline polymer 26 and adhesive 28. In one exemplary embodiment of the invention, the fixture thickness is 0.097 inches. When using a sixteen layer stack having a thickness of about 0.992 inches like that depicted inFIG. 3 , the laminated package that is produced from applying pressure to the material stack contained within the fixture results in a package having a uniform thickness of about 0.0376 inches. -
FIG. 4 shows a top plan view ofmaterial stack 24 positioned within the opening offixture 22 prior to applying pressure tomaterial stack 24.Fixture 22 includes anopening 23 and is preferably made of a metal material other than aluminum, and more preferably a hard metal material such as stainless teel, copper, titanium, or any other metal material that can withstand a temperature of 550° F. In the exemplary embodiment offixture 22 shown inFIG. 4 ,fixture 22 comprises a rectangularshape having opening 23 with aslot 30 connectingopening 23 with the exterior offixture 22.Slot 30 is for receiving and retaining a thermocouple wire from a thermocouple which is used to attach the thermocouple to amaterial stack 24 contained within opening 23 offixture 22. In the exemplary embodiment shown inFIG. 4 , there is a clearance of 0.5 to 1.0 inches between thefixture 22 and thematerial stack 24. -
FIGS. 5 and 6 show cross-sectional views of thefixture 22 andmaterial stack 24 after being prepared for the application of heat and pressure. These figures will be discussed in more detail after describing the stack material preparation and lay-up with the fixture and the bagging of the prepared stack materials, both of which are carried out prior to lamination of the material stack. - A cross-sectional schematic showing an exemplary embodiment of a portion of the apparatus of the present invention is shown in
FIG. 7 . A product stack is stacked for lamination by first placing a second bottom caul plate 36 (i.e. a different caul plate than that described with reference toFIG. 1 ) on the lay up surface (the surface which is being used to prepare the stack). A firstbottom separator plate 38 is then placed on top of the second bottom caul plate 36. The fixture 22 (SeeFIG. 1 ) is then placed on the firstbottom separator plate 38 and a few pins are inserted into the fixture, second bottom caul plate 36, and firstbottom separator plate 38 to hold the fixture in place. The product layers are then positioned within theopening 23 of the fixture 22 (SeeFIG. 4 ). Thelamination book 40 shown inFIG. 7 includes the fixture and the product layers. The product layers may be liquid crystalline polymer layers which may alternate with adhesive layers as shown inFIG. 3 . Athermocouple wire 39 is then installed close to the middle of the product layers (SeeFIG. 8 ) and attached with Kapton tape. High temperature thermocouple wire is used and it is not placed near any part of the circuitry of the board. A second top caul plate 42 is then placed over the product layers and a firstbottom separator plate 44 is then placed on the second top caul plate 42. Any remaining tooling pins are then installed to ensure that the fixture, second top andbottom caul plates 42 and 38, and first top andbottom separator plates 36 and 44 are seated in place. Second top andbottom caul plates 42 and 38 and first top andbottom separator plates 44 and 36 are preferably comprised of any strong metal material that can withstand temperature of 550° F. and be able to maintain its shape and form. - Next, the stack material prepared and set up in accordance with the preceding paragraph is placed in a vacuum enclosure. First, a bagging
material 46 and abreather material 48 are cut such that they are approximately six inches wider than the second top andbottom caul plates 42 and 38 and the first top andbottom separator plates 44 and 36. In one exemplary embodiment, the baggingmaterial 46 andbreather material 48 for a twelve inch by eighteen inch stack should be eighteen inches wide and forty-two inches long. A skivedTeflon release sheet 50 is cut three inches larger than the second top andbottom caul plates 42 and 38 and the first top andbottom separator plates 44 and 36. In one exemplary embodiment, the skivedTeflon release sheet 50 should be cut to fifteen inches by twenty-one inches where the second top andbottom caul plates 42 and 38 and the first top andbottom separator plates 44 and 36 are twelve inches by eighteen inches. - The skived
Teflon release sheet 50 is placed on a second bottom separator plate 52 and the baggingmaterial 46 is placed on the skivedTeflon release sheet 50.Breather material 48 is placed on baggingmaterial 46 and a second skivedTeflon release sheet 54 is placed on thebreather material 48. A sealant tape 56 (SeeFIG. 8 ) is applied to the baggingmaterial 46 near the edge of the baggingmaterial 46 and under thethermocouple wire 39. Thesealant tape 56 is wrapped around thethermocouple wire 39 aligning thesealant tape 56 with thesealant tape 56 on the edge of the baggingmaterial 46.Sealant tape 56 is then wrapped around acopper tubing 58 approximately four inches from the end of a quick disconnect 60 (SeeFIG. 8 ). Thecopper tubing 58 is positioned along side of thelamination book 40 aligningsealant tape 56 on the edge of the baggingmaterial 46 with thesealant tape 56 wrapped around thecopper tubing 58. - The third skived
Teflon release sheet 62 is placed on top of firsttop separator plate 44 and the flaps of thebreather material 48 and baggingmaterial 46 are then folded over thelamination book 40 and the third skivedTeflon release sheet 62. The baggingmaterial 46 is then aligned evenly andsealant tape 56 is used to close the bag. A fourth skived Teflon release sheet 64 is placed over the top of the bag and a second top separator plate 66 is placed over the fourth skived Teflon release sheet 64. The entire prepared, stacked, and bagged assembly as described in the preceding paragraphs is then loaded into thepress 12 between top andbottom caul plates bottom platens FIG. 1 . A vacuum is applied to the sealed bag containing the material stack before applying the press. - Returning to
FIGS. 5 and 6 , thematerial stack 24 is shown having a thickness greater than thefixture 22 prior to lamination inFIG. 5 and inFIG. 6 thematerial stack 24 has a thickness equal to or less than thefixture 22 after lamination. - Turning now to
FIG. 9 , aflowchart 70 is shown which depicts an exemplary embodiment of the method of the present invention for forming high count multi-layered circuits. Instep 71, a press or at least one roller is provided which is capable of applying pressure and heat to a material stack. Next, instep 72, a fixture having an opening is positioned within the press or under a roller and in step 73 a material stack is placed within the opening in the fixture. Pressure is applied to the material stack instep 74 to laminate the material stack and the process ends instep 75. Heat may also be applied along with applying the pressure. -
FIG. 10 is aflow chart 80 depicting another exemplary embodiment of the method of the present invention for forming high count multi-layered circuits. Instep 81, a fixture is created having an opening therein in which to place a material stack. Instep 82, a press is provided for applying pressure and heat to the material stack and instep 84 the fixture created instep 81 is positioned within the press.Optional steps step 84. Instep 86, a material stack is positioned within the opening contained within the fixture. Next, instep 87, the fixture and the material stack are placed in a vacuum bag and a vacuum is applied instep 88. Pressure is then applied instep 89 or, alternatively, heat and pressure are applied instep 90 in order to laminate the material stack. The process then ends instep 91. - Turning now to
FIG. 11 , aflow chart 100 is shown which depicts an exemplary method for custom creating a fixture in accordance with the present invention. Instep 102, the customer presents their specifications for a high count multi-layer circuit and customer service takes in those specifications instep 104. Instep 106, a contract is reviewed in which the customers specs are contained and product engineering begins instep 108 to meet product specifications communicated by the customer. Prints and customer specs are again checked instep 110. If the prints and customer specs are not okay, these problems are discussed with the customer instep 111. After customer problems are discussed instep 111, results of those discussions are then forwarded to customer service instep 104 to begin the process once again. If, instep 110, the prints and customer specs are acceptable, then further planning and generation of traveler documents (reference documents) are created instep 112. Data is then released to the cam instep 114 and the customer data is checked instep 116. Document control takes place instep 118 and an inquiry as to the acceptability of the data is undertaken instep 120. If there are data problems, customer service is contacted instep 121 and problems are again discussed with the customer instep 111. If no data problems are present instep 120, working tools are developed instep 122. As part of that process, a photo plot is undertaken instep 124 and an artwork inspection is performed instep 126. Image problems are encountered instep 128 and, if there are image problems, there is a return to step 122 in which work tools are again developed. If no image problems exist instep 128, silver T/U diazo tooling occurs instep 130 and a traveler document (reference document) is released instep 140. Alternatively, working tools are developed by first developing programming instep 132, drilling and routing instep 134, obtaining drilling/routing approval instep 136, and then inquiring as to whether there are any first article problems instep 138. If there are first article problems instep 138, there is a return to step 132 to redevelop programming. If there are no first article problems instep 138, a traveler document (reference document) is released instep 140. After the traveler document is released instep 140, document control is performed instep 142 and the document is released to production instep 144. If problems or changes occur during production, traveler change notices and other standard operating procedures may be created instep 146 before further planning and generation of a traveler document (reference document) is generated instep 112. -
FIG. 12 is aflow chart 200 depicting an exemplary process for completing the production of a high count multi-layered circuit in accordance with the present invention. After lamination instep 202, drilling takes place instep 204 and deburring takes place instep 206. Desmear hole prep takes place instep 208, electroless copper is applied instep 210 and flash copper plating takes place instep 212.FIG. 13 is aflow chart 208 depicting an exemplary process for desmear via hole preparation in accordance with the present invention prior to plating the inside of the vias. Instep 302, the laminated panel is dipped in a permanganate solution which comprises 55-65 grams per liter of potassium permanganate in a 5-7% sodium hydroxide solution. The panel is dipped for five minutes at a minimum of 175° F. Instep 304 the panel undergoes a water rinse in ambient water temperature for approximately 2-3 minutes. Instep 306, another water rinse is conducted at ambient water temperature for 5-7 minutes. The panel is then neutralized instep 308 in a neutralizer solution containing 9-11% neutralizer and 8-10% sulfuric acid. The panel is dipped in the neutralizer for approximately four minutes at a temperature of 105° F. The panel then undergoes a water rinse at ambient temperature for 3-5 minutes instep 310 and another water rinse at ambient water temperature for 3-5 minutes instep 312. Afterstep 312, theelectroless copper step 210 is conducted as previously described in relation toFIG. 12 . - It will be understood that the foregoing description is of preferred exemplary embodiments of the invention and that the invention is not limited to the specific forms shown or described herein. Various modifications may be made in the design, arrangement, and type of elements disclosed herein, as well as the steps of making and using the invention without departing from the scope of the invention as expressed in the appended claims.
Claims (6)
1. A method for forming multi-layered circuits comprising the steps of:
providing a press having top and bottom platens;
positioning a fixture having an opening therein between the top and bottom platens;
positioning a material stack within the opening in the fixture; and
applying pressure to the material stack by applying pressure to the top and bottom platens.
2. The method of claim 1 wherein the step of positioning a fixture having an opening therein first comprises the step of creating a fixture with an opening having a desired shape, size, and depth.
3. The method of claim 1 further comprising the step of placing the fixture and the material stack within a vacuum bag and applying a vacuum to the vacuum bag before the step of applying pressure to the material stack.
4. The method of claim 1 further comprising the step of applying heat to the top and bottom platens during the step of applying pressure to the material stack.
5. The method of claim 1 further comprising the step of positioning a top caul plate between the top platen and the fixture and a bottom caul plate between the bottom platen and the fixture before the step of positioning the material stack.
6. The method of claim 5 further comprising the step of positioning a top separator plate between the top caul plate and the fixture and a bottom separator plate between the bottom caul plate and the fixture before the step of positioning the material stack.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/749,102 US20070234562A1 (en) | 2005-07-22 | 2007-05-15 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/187,220 US7290326B2 (en) | 2005-07-22 | 2005-07-22 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
US11/749,102 US20070234562A1 (en) | 2005-07-22 | 2007-05-15 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/187,220 Division US7290326B2 (en) | 2005-07-22 | 2005-07-22 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
Publications (1)
Publication Number | Publication Date |
---|---|
US20070234562A1 true US20070234562A1 (en) | 2007-10-11 |
Family
ID=37677732
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/187,220 Expired - Fee Related US7290326B2 (en) | 2005-07-22 | 2005-07-22 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
US11/749,102 Abandoned US20070234562A1 (en) | 2005-07-22 | 2007-05-15 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
US11/749,100 Abandoned US20070234560A1 (en) | 2005-07-22 | 2007-05-15 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/187,220 Expired - Fee Related US7290326B2 (en) | 2005-07-22 | 2005-07-22 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/749,100 Abandoned US20070234560A1 (en) | 2005-07-22 | 2007-05-15 | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers |
Country Status (1)
Country | Link |
---|---|
US (3) | US7290326B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070107837A1 (en) * | 2005-11-04 | 2007-05-17 | Dutton Steven L | Process for making high count multi-layered circuits |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6104959A (en) | 1997-07-31 | 2000-08-15 | Microwave Medical Corp. | Method and apparatus for treating subcutaneous histological features |
ES2488565T3 (en) | 2007-04-19 | 2014-08-27 | Miramar Labs, Inc. | Devices and systems for the non-invasive distribution of microwave therapy |
EP2532320A3 (en) | 2007-04-19 | 2013-04-03 | Miramar Labs, Inc. | Apparatus for reducing sweat production |
US20100211059A1 (en) | 2007-04-19 | 2010-08-19 | Deem Mark E | Systems and methods for creating an effect using microwave energy to specified tissue |
WO2009128940A1 (en) | 2008-04-17 | 2009-10-22 | Miramar Labs, Inc. | Systems, apparatus, methods and procedures for the noninvasive treatment of tissue using microwave energy |
CN101711134B (en) | 2007-04-19 | 2016-08-17 | 米勒玛尔实验室公司 | Tissue is applied the system of microwave energy and in organized layer, produces the system of tissue effect |
JP5545668B2 (en) | 2007-12-12 | 2014-07-09 | ミラマー ラブズ, インコーポレイテッド | System, apparatus method, and procedure for non-invasive tissue treatment using microwave energy |
MX2010006363A (en) | 2007-12-12 | 2010-10-26 | Miramar Labs Inc | Systems, apparatus, methods and procedures for the noninvasive treatment of tissue using microwave energy. |
US9314301B2 (en) | 2011-08-01 | 2016-04-19 | Miramar Labs, Inc. | Applicator and tissue interface module for dermatological device |
CN103037638B (en) * | 2011-09-30 | 2015-05-06 | 无锡江南计算技术研究所 | Press fit method for to-be-pressed multi-layer plate with chip window |
WO2015013502A2 (en) | 2013-07-24 | 2015-01-29 | Miramar Labs, Inc. | Apparatus and methods for the treatment of tissue using microwave energy |
WO2016084374A1 (en) * | 2014-11-28 | 2016-06-02 | 日本ゼオン株式会社 | Desmear processing method and manufacturing method for multilayer printed wiring board |
CN114025517B (en) * | 2021-09-24 | 2024-04-12 | 上海航天电子通讯设备研究所 | LCP (liquid crystal display) multilayer circuit board planarization lamination method and device |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3219749A (en) * | 1961-04-21 | 1965-11-23 | Litton Systems Inc | Multilayer printed circuit board with solder access apertures |
US3344515A (en) * | 1961-04-21 | 1967-10-03 | Litton Systems Inc | Multilayer laminated wiring |
US3616014A (en) * | 1968-05-15 | 1971-10-26 | Walter Weglin | Manufacture of printed circuit board |
US3837074A (en) * | 1968-08-16 | 1974-09-24 | Bunker Ramo | Coaxial interconnections |
US4596624A (en) * | 1984-05-02 | 1986-06-24 | Cirtel, Inc. | Apparatus for laminating multilayered printed circuit boards |
US4789423A (en) * | 1982-03-04 | 1988-12-06 | E. I. Du Pont De Nemours And Company | Method for manufacturing multi-layer printed circuit boards |
US4975311A (en) * | 1988-12-20 | 1990-12-04 | Itt Corporation | Vacuum lamination station |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3465435A (en) * | 1967-05-08 | 1969-09-09 | Ibm | Method of forming an interconnecting multilayer circuitry |
US5719354A (en) | 1994-09-16 | 1998-02-17 | Hoechst Celanese Corp. | Monolithic LCP polymer microelectronic wiring modules |
US5655291A (en) * | 1995-06-26 | 1997-08-12 | Ford Motor Company | Forming rigid circuit board |
US6043990A (en) | 1997-06-09 | 2000-03-28 | Prototype Solutions Corporation | Multiple board package employing solder balis and fabrication method and apparatus |
US6215320B1 (en) | 1998-10-23 | 2001-04-10 | Teradyne, Inc. | High density printed circuit board |
US6290860B1 (en) | 1999-04-01 | 2001-09-18 | International Business Machines Corporation | Process for design and manufacture of fine line circuits on planarized thin film dielectrics and circuits manufactured thereby |
US20020064701A1 (en) | 2000-09-11 | 2002-05-30 | Hand Doris I. | Conductive liquid crystalline polymer film and method of manufacture thereof |
US20030118836A1 (en) | 2001-10-24 | 2003-06-26 | Lee Jeong Chang | Fluoropolymer laminates and a process for manufacture thereof |
US6826830B2 (en) | 2002-02-05 | 2004-12-07 | International Business Machines Corporation | Multi-layered interconnect structure using liquid crystalline polymer dielectric |
US6900708B2 (en) | 2002-06-26 | 2005-05-31 | Georgia Tech Research Corporation | Integrated passive devices fabricated utilizing multi-layer, organic laminates |
US7320173B2 (en) * | 2003-02-06 | 2008-01-22 | Lg Electronics Inc. | Method for interconnecting multi-layer printed circuit board |
-
2005
- 2005-07-22 US US11/187,220 patent/US7290326B2/en not_active Expired - Fee Related
-
2007
- 2007-05-15 US US11/749,102 patent/US20070234562A1/en not_active Abandoned
- 2007-05-15 US US11/749,100 patent/US20070234560A1/en not_active Abandoned
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3219749A (en) * | 1961-04-21 | 1965-11-23 | Litton Systems Inc | Multilayer printed circuit board with solder access apertures |
US3344515A (en) * | 1961-04-21 | 1967-10-03 | Litton Systems Inc | Multilayer laminated wiring |
US3616014A (en) * | 1968-05-15 | 1971-10-26 | Walter Weglin | Manufacture of printed circuit board |
US3837074A (en) * | 1968-08-16 | 1974-09-24 | Bunker Ramo | Coaxial interconnections |
US4789423A (en) * | 1982-03-04 | 1988-12-06 | E. I. Du Pont De Nemours And Company | Method for manufacturing multi-layer printed circuit boards |
US4596624A (en) * | 1984-05-02 | 1986-06-24 | Cirtel, Inc. | Apparatus for laminating multilayered printed circuit boards |
US4975311A (en) * | 1988-12-20 | 1990-12-04 | Itt Corporation | Vacuum lamination station |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070107837A1 (en) * | 2005-11-04 | 2007-05-17 | Dutton Steven L | Process for making high count multi-layered circuits |
Also Published As
Publication number | Publication date |
---|---|
US7290326B2 (en) | 2007-11-06 |
US20070234560A1 (en) | 2007-10-11 |
US20070017092A1 (en) | 2007-01-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20070234562A1 (en) | Method and apparatus for forming multi-layered circuits using liquid crystalline polymers | |
US7981245B2 (en) | Multi-layered interconnect structure using liquid crystalline polymer dielectric | |
US6764748B1 (en) | Z-interconnections with liquid crystal polymer dielectric films | |
CN110519912A (en) | A kind of the PCB production method and PCB of embedded heat carrier | |
US8227173B2 (en) | Method of manufacturing multi-layer circuit board | |
JP2008124370A (en) | Method of manufacturing multilayer printed wiring board | |
US20150053468A1 (en) | Method to make a multilayer circuit board with intermetallic compound and related circuit boards | |
CN110602900A (en) | Multilayer and multistage HDI plate manufacturing method and device | |
CN110678013A (en) | Processing method of embedded copper block printed board and printed board | |
KR20130059356A (en) | Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies | |
CN114615834A (en) | Design method of asymmetric stacked PCB and PCB | |
US20070107837A1 (en) | Process for making high count multi-layered circuits | |
US9521754B1 (en) | Embedded components in a substrate | |
CN113163605B (en) | Manufacturing method of high-heat-dissipation aluminum-based circuit board and high-heat-dissipation aluminum-based circuit board | |
JP2009246146A (en) | Method of manufacturing for circuit board | |
JP2001036237A (en) | Manufacture of multilayered printed board | |
JP6366562B2 (en) | Manufacturing method of multilayer wiring board | |
CN110602871B (en) | Graphene heat-conducting PCB and preparation method thereof | |
KR101168245B1 (en) | Thermal film and the Preparation Method Thereof | |
KR100878961B1 (en) | Press apparatus for fabricating of printed circuit board | |
JP5353027B2 (en) | Circuit board manufacturing method | |
JP2001144445A (en) | Method for producing multilayer printed wiring board | |
CN117528915A (en) | High-heat-conductivity high-insulation multilayer circuit board based on soft and hard substrates and manufacturing method thereof | |
JPH0210596B2 (en) | ||
EP1259102B1 (en) | Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: DYNACO CORP., ARIZONA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:DUTTON, STEVEN LEE;REEL/FRAME:021045/0402 Effective date: 20080603 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |
|
AS | Assignment |
Owner name: EARTHONE CIRCUIT TECHNOLOGIES CORPORATION, CALIFOR Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DUTTON, KATHY JANE;DUTTON, STEVEN LEE;REEL/FRAME:026303/0491 Effective date: 20100813 |