TWI668932B - Over current protection system and over current protection method - Google Patents

Abstract

The overcurrent protection system comprises a display panel, the display panel comprises a gate drive array and a display area, and the overcurrent protection system comprises a drive module and a first current adjustment circuit. The driving module is configured to provide a first driving signal to the gate driving array. The first current adjustment circuit is coupled between the driving module and the gate driving array, wherein the first current adjusting circuit is located on a current path of a first signal current of the first driving signal. Wherein, during the pulse of the first signal current, if the absolute value of the magnitude of the first signal current is greater than a predetermined threshold for more than a predetermined length of time, the first current adjustment circuit limits the absolute value of the magnitude of the first signal current Not greater than the preset threshold until the end of the pulse period of the first signal current.

Description

Overcurrent protection system and overcurrent protection method

This disclosure relates to an overcurrent protection system and an overcurrent protection method suitable for a display panel.

Conventional displays typically include an overcurrent protection device for protecting the gate drive module. The overcurrent protection device activates the overcurrent protection mechanism when the total time of the overcurrent event occurring in the gate drive module reaches a certain length of time. However, during the aforementioned overcurrent protection device calculating the total time of occurrence of an overcurrent event, the gate drive module continues to withstand excessive current. Therefore, even if the conventional display is provided with an overcurrent protection device, the gate drive module in the conventional display is easily damaged by excessive current for a long time.

In view of this, how to provide an overcurrent protection system and an overcurrent protection method capable of reducing the current of the gate drive module in time when an overcurrent event occurs is a problem to be solved in the industry.

The overcurrent protection system comprises a display panel, the display panel comprises a gate drive array and a display area, and the overcurrent protection system comprises a driving module and a first current adjustment circuit. The driving module is configured to provide a first driving signal to the gate driving array. The first current adjustment circuit is coupled between the driving module and the gate driving array, wherein the first current adjusting circuit is located on a current path of a first signal current of the first driving signal. The first current adjustment circuit limits the size of the first signal current during the pulse of the first signal current, if the absolute value of the magnitude of the first signal current is greater than a predetermined threshold for more than a predetermined length of time The absolute value is not greater than the preset threshold until the end of the pulse period of the first signal current.

The overcurrent protection method is applicable to a display panel, the display panel includes a gate drive array and a display area, and the overcurrent protection method includes the following steps: providing a driving module, wherein the driving module is configured to provide a first Driving a signal to the gate driving array; providing a first current adjusting circuit, wherein the first current adjusting circuit is coupled between the driving module and the gate driving array, and is located at the first driving signal a current path of the signal current; during the pulse of the first signal current, if the absolute value of the magnitude of the first signal current is greater than a predetermined threshold for more than a predetermined length of time, the first current adjustment circuit is used to limit The absolute value of the magnitude of the first signal current is not greater than the preset threshold until the end of the pulse period of the first signal current.

The overcurrent protection system and the overcurrent protection method in the above embodiments can prevent the display panel from being damaged due to excessive current being subjected to excessive current for a long time.

100‧‧‧Overcurrent protection system

101‧‧‧ display panel

103‧‧‧Gate drive module

105‧‧‧ display area

110‧‧‧Drive Module

120a~120n‧‧‧ Current adjustment circuit

130‧‧‧Logical Circuit

140‧‧‧ storage module

201‧‧‧ Short circuit path

203a~203n‧‧‧Shift register

500‧‧‧Overcurrent protection method

Ihck1‧‧‧first signal current

Ihck2‧‧‧second signal current

Vhck1‧‧‧ first clock signal

Vhck2‧‧‧second clock signal

Vssg‧‧‧fixed voltage

Vst‧‧‧ starting pulse signal

Tp‧‧‧ pulse period

T1, T2, T3‧‧‧ first time period, second time period, third time period

S502~s528‧‧‧Process

The above and other objects, features, advantages and embodiments of the disclosure will be more apparent. The description of the drawings is as follows: FIG. 1 is a simplified function of an overcurrent protection system according to an embodiment of the present disclosure. Block diagram.

FIG. 2 is a simplified functional block diagram of a gate driving module according to an embodiment of the present disclosure.

Figure 3 is a simplified timing diagram of an operational embodiment of the overcurrent protection system of Figure 1.

Fig. 4 is a simplified timing change diagram of another operational embodiment of the overcurrent protection system according to Fig. 1.

5a and 5b together illustrate a flow chart of an overcurrent protection method in accordance with an embodiment of the present disclosure.

Embodiments of the present invention will be described below in conjunction with the associated drawings. In the drawings, the same reference numerals indicate the same or similar elements or methods.

1 is a simplified functional block diagram of an overcurrent protection system 100 in accordance with an embodiment of the present disclosure. The overcurrent protection system 100 includes a driving module 110, a plurality of current adjusting circuits 120a-120n, a logic circuit 130, and a storage module 140. The storage module 140 is coupled to the logic circuit 130 and is used to store the logic circuit 130. Information needed. In order to make the drawing simple and easy to explain, other components and connections in the overcurrent protection system 100 The relationship is not shown in Figure 1.

The overcurrent protection system 100 is coupled to the display panel 101 , wherein the display panel 101 includes a gate driving module 103 and a display area 105 . The overcurrent protection system 100 can limit or turn off the current in the gate driving module 103 when an overcurrent event occurs in the gate driving module 103 to prevent the gate driving module 103 from being damaged due to an overcurrent.

In the embodiment, the overcurrent protection system 100 and the display panel 101 are respectively disposed on different substrates. However, in some embodiments, the overcurrent protection system 100 can also be disposed on the same substrate as the display panel 101.

FIG. 2 is a simplified functional block diagram of a gate driving module 103 according to an embodiment of the present disclosure. Referring to FIG. 1 and FIG. 2 simultaneously, the driving module 110 is configured to output a first clock signal Vhck1, a second clock signal Vhck2, a start pulse signal Vst, and a fixed voltage Vssg to the gate driving module 103 to control The gate driving module 103 updates the display screen of the display area 105. The first clock signal Vhck1 and the second clock signal Vhck2 are used to sequentially operate the plurality of shift registers 203a to 203n of the gate driving module 103. The start pulse signal Vst is used to trigger the gate drive array 103 at the beginning of each frame of the display area 105.

Please note that the lowercase English index a~n in the component number used in the specification and the drawings is for convenience of referring to individual components, and is not intended to limit the number of the aforementioned components to a specific number. In the specification and the drawings, if an element number or signal number is used to indicate the index of the component number or signal number, it means that the component number or signal number is not specific to the component group or signal group. Any component or signal. For example, the component number 120a refers to the current adjustment circuit 120a, and the component number 120 refers to any current adjustment circuit 120 that is not specific among the current adjustment circuits 120a-120n.

The current adjustment circuit 120a is located on the signal path between the driving module 110 and the gate driving module 103 of the first clock signal Vhck1. The current adjustment circuit 120b is located on the signal path between the driving module 110 and the gate driving module 103 of the second clock signal Vhck2. The current adjustment circuit 120c is located on a signal path between the drive module 110 and the gate drive module 103 at a fixed voltage Vssg. The current adjustment circuit 120n is located on the signal path between the start pulse signal Vst between the drive module 110 and the gate drive module 103, and so on.

That is, the current adjustment circuits 120a-120n are respectively located on a plurality of signal paths between the driving module 110 and the gate driving module 103.

When the current adjustment circuits 120a-120n detect that the magnitude of the signal current of the corresponding signal exceeds the preset threshold, the current adjustment circuits 120a-120n limit the corresponding signal current to a preset threshold value to prevent the gate. The drive module 103 is subjected to excessive current for a long time. For example, when the magnitude of the first signal current Ihck1 of the first clock signal Vhck1 exceeds a preset threshold value, the current adjustment circuit 120a limits the first signal current Ihck1. For another example, when the magnitude of the second signal current Ihck2 of the second clock signal Vhck2 exceeds a preset threshold value, the current adjustment circuit 120b limits the second signal current Ihck2, and so on.

In practice, the current adjustment circuits 120a-120n can be implemented by a comparator, a switch circuit, a resistor-capacitor circuit (R-C circuit), and a current limiting resistor. For example, when the magnitude of the first signal current Ihck1 exceeds a preset threshold, the first signal current Ihck1 charges the RC circuit to a specific voltage. When the comparator receives the aforementioned specific voltage, the comparator controls the switching circuit to switch the first signal current Ihck1 from the original current path to another current path including the current limiting resistor to limit the magnitude of the first signal current Ihck1.

The operation of the current adjustment circuits 120a to 120n will be further described below in conjunction with FIGS. 2 to 4. For the sake of simplicity in the description, the current adjustment circuit 120a will be described as an example. Referring to FIG. 2, during the manufacture or operation of the gate driving module 103, a short circuit may occur between the signal paths of the first clock signal Vhck1 and the second clock signal Vhck2 (ie, the short circuit path 201 is generated). ).

If there is no short circuit between the signal paths of the first clock signal Vhck1 and the second clock signal Vhck2 (that is, there is no short circuit path 201), the waveform of the first signal current Ihck1 will be as shown in FIG. That is, during each pulse period Tp of the first signal current Ihck1, the absolute value of the magnitude of the first signal current Ihck1 will only exceed the preset threshold value in the first time period T1, and in the second time period T2 and the third time period. Below T3 is the threshold value.

Since the absolute value of the magnitude of the first signal current Ihck1 is lower than the preset threshold value in the second period T2, the current adjustment circuit 120a does not limit the first signal current Ihck1.

On the other hand, if a short circuit occurs between the signal paths of the first clock signal Vhck1 and the second clock signal Vhck2 (that is, there is a short circuit path 201), the waveform of the first signal current Ihck1 will be as shown in FIG. That is, during each pulse period Tp of the first signal current Ihck1, the first signal current The absolute value of the size of Ihck1 will exceed the preset threshold value in both the first time period T1 and the second time period T2.

In this case, in the second time period T2, if the absolute value of the magnitude of the first signal current Ihck1 exceeds the preset threshold value for more than the preset time length, the current adjustment circuit 120a will be in the next third time period T3. The first signal current Ihck1 is limited.

In other words, the current adjustment circuit 120a limits the absolute value of the magnitude of the first signal current Ihck1 to be lower than the preset threshold until the pulse time Tp ends. In this way, when an overcurrent event occurs, the overcurrent protection system 100 can instantly reduce the current received by the gate driving module 103 and reduce the risk of damage to the gate driving module 103.

In addition, each time the current adjustment circuits 120a-120n limit the corresponding signal current, the current adjustment circuits 120a-120n notify the logic circuit 130 of an overcurrent event. In one frame of the display area 105, if any one of the current adjustment circuits 120a-120n notifies the logic circuit 130 of the number of overcurrent events, the preset number of times corresponding to the current adjustment circuit 120 is exceeded. The logic circuit 130 adjusts the statistical values stored in the storage device 140 to accumulate the total number of frames in which the overcurrent event occurred.

It should be noted that the respective preset times of the current adjustment circuits 120a to 120n correspond to the types of signals respectively received by the current adjustment circuits 120a to 120n. For example, a current adjustment circuit 120a for receiving the first clock signal Vhck1, a current adjustment circuit 120b for receiving the second clock signal Vhck2, a current adjustment circuit 120c for receiving the fixed voltage Vssg, and a signal for receiving the start pulse Pre-corresponding to the current adjustment circuit 120n of Vst The number of times is 32, 32, 1 and 1 respectively.

Since the first clock signal Vhck1 has a plurality of periods in each frame picture, and the start pulse signal Vst has only one period in each frame picture, the preset number of times corresponding to the current adjustment circuit 120a (for example, 32 times) ) is greater than a preset number of times (for example, 1 time) corresponding to the current adjustment circuit 120n.

In other words, in a frame of the display area 105, if the total number of cycles of the signal received by the current adjustment circuit 120 is larger, the preset number of times corresponding to the certain current adjustment circuit 120 is larger.

If the logic circuit 130 finds that the statistical value exceeds the preset number of frames (for example, 32 frames), the logic circuit 130 determines that the number of frames of the overcurrent event generated by the gate driving module 103 is excessive. At this time, the logic circuit 130 controls the driving module 110 to stop outputting all signals transmitted to the gate driving module 103. In this way, the accident of the display panel 101 during use can be avoided. For example, electric fire.

In some embodiments, the statistical value represents the number of consecutive total frames in which an overcurrent event occurs. If the logic circuit 130 does not receive the notification from the current adjustment circuits 120a-120n in a certain frame (that is, the current adjustment circuits 120a-120n do not limit the corresponding signal current), the logic circuit 130 resets the statistical value to zero. To recalculate the number of consecutive total frames of an overcurrent event.

5a and 5b together illustrate a simplified flow diagram of an overcurrent protection method 500 in accordance with an embodiment of the present disclosure, wherein the overcurrent protection method 500 is applicable to the overcurrent protection system 100 described above. For the sake of simplicity in the description, the current adjustment circuits 120a and 120b will be described below as an example.

In the flowcharts shown in Figures 5a and 5b, the flow in the field to which a particular device belongs is representative of the flow performed by the particular device. For example, the flow marked in the "Drive Module 110" field represents the flow performed by the drive module 110; the flow marked in the "Current Adjustment Circuit 120a" field represents the current adjustment circuit 120a. Process.

In the process s502, the driving module 110 outputs the first clock signal Vhck1 and the second clock signal Vhck2 to the current adjusting circuits 120a and 120b, respectively. The current adjustment circuit 120a performs the flow s504 to receive the first clock signal Vhck1, and executes the flow s506 to determine whether the absolute value of the magnitude of the first signal current Ihck1 of the first clock signal Vhck1 continues to exceed the preset time length. Threshold value.

If the first signal current Ihck1 does not continue to exceed the preset threshold for a preset length of time, the current adjustment circuit 120a repeats the execution of the flow s504. On the other hand, if the first signal current Ihck1 continues to exceed the preset threshold for a predetermined length of time, the current adjustment circuit 120a then performs a flow s508 to limit the first signal stream Ihck1 until the end of the pulse period of the first signal stream Ihck1. Also, the current adjustment circuit 120a performs the flow s510 to transmit an overcurrent event notification to the logic circuit 130.

The current adjustment circuit 120b performs the flow s512 to receive the second clock signal Vhck2, and executes the flow s514 to determine whether the absolute value of the magnitude of the second signal current Ihck2 of the second clock signal Vhck2 continues to exceed the preset for a preset length of time. Threshold value.

If the second signal current Ihck2 is not within the preset time length The current adjustment circuit 120b repeats the execution of the flow s512 until the preset threshold value is continuously exceeded. On the other hand, if the second signal current Ihck2 continues to exceed the preset threshold for a predetermined length of time, the current adjustment circuit 120b then performs a flow s516 to limit the second signal current Ihck2 until the end of the pulse period of the second signal current Ihck2. Also, current adjustment circuit 120b performs flow s518 to transmit an overcurrent event notification to logic circuit 130.

Referring to FIG. 5b, logic circuit 130 performs flow s520 to receive an overcurrent event notification from current adjustment circuit 120a or 120b. Next, the logic circuit 130 executes the flow s522 to determine whether the number of notifications from the current adjustment circuit 120a exceeds the preset number of times corresponding to the current adjustment circuit 120a (for example, 32 times), and determines whether the number of notifications from the current adjustment circuit 120b exceeds The current adjustment circuit 120b corresponds to a preset number of times (for example, 32 times).

In one frame, if the number of notifications from the current adjustment circuit 120a exceeds the preset number of times corresponding to the current adjustment circuit 120a, or the number of notifications from the current adjustment circuit 120b exceeds the preset number of times corresponding to the current adjustment circuit 120b, the logic circuit 130 Flow s524 is then executed to adjust the statistical values. As a result, the logic circuit 130 can accumulate the total number of frames in which an overcurrent event occurs.

On the other hand, if the number of notifications from the current adjustment circuit 120a does not exceed the preset number of times corresponding to the current adjustment circuit 120a, the number of notifications from the current adjustment circuit 120b does not exceed the preset number of times corresponding to the current adjustment circuit 120b, and the logic circuit 130 repeats Flow s520 is performed.

Next, the logic circuit 130 executes the flow s526 to determine the statistics. Whether the value exceeds the preset number of frames. If so, the logic circuit 130 controls the driving module 110 to execute the process s528, so that the driving module 110 stops outputting all signals transmitted to the gate driving module 103. If not, the logic circuit 130 repeats the execution of the flow s522.

It should be noted that the flowcharts of the foregoing 5a and 5b are merely exemplary embodiments and are not intended to limit the embodiments of the present invention.

For example, the processes s504~s510 can be executed simultaneously with the processes s512~s518.

For another example, in some embodiments, before executing the process s520, the logic circuit 130 determines whether the current adjustment circuits 120a and 120b do not limit the first signal current Ihck1 and the second signal current Ihck2 in one frame. That is, it is determined whether the gate drive module 103 has not generated an overcurrent event in one frame of the screen. If so, logic circuit 130 will zero the statistical value.

As can be seen from the above, the overcurrent protection system 100 and the overcurrent protection method 500 can prevent the display panel 101 from being damaged by a large current (for example, a short-circuit current) due to a long time flow or an accident (for example, a wire fire).

Certain terms are used throughout the description and claims to refer to particular elements. However, those of ordinary skill in the art should understand that the same elements may be referred to by different nouns. The specification and the scope of patent application do not use the difference in name as the way to distinguish the components, but the difference in function of the components as the basis for differentiation. The term "include" as mentioned in the specification and the scope of the patent application is an open term. Therefore, it should be interpreted as "including but not limited to". In addition, "coupled" includes any direct and indirect means of attachment herein. Therefore, if the first element is described as being coupled to the second element, the first element can be directly connected to the second element by electrical connection or wireless transmission, optical transmission or the like, or by other elements or connections. The means is indirectly electrically or signally connected to the second component.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the claims of the present invention are intended to be within the scope of the present invention.

Claims (16)

An overcurrent protection system is applicable to a display panel, the display panel includes a gate drive array and a display area, and the overcurrent protection system includes: a driving module, configured to provide a first driving signal to the gate a first current adjustment circuit is coupled between the driving module and the gate driving array, wherein the first current adjusting circuit is located on a current path of a first signal current of the first driving signal; The first current adjustment circuit limits the first signal during a pulse of the first signal current if the absolute value of the magnitude of the first signal current continues to be greater than a predetermined threshold and exceeds a predetermined length of time The absolute value of the magnitude of the current is not greater than the predetermined threshold until the end of the pulse period of the first signal current. The overcurrent protection system of claim 1, further comprising: a logic circuit, configured to determine, in each frame of the display area, whether the number of times the first current adjustment circuit limits the first signal current exceeds a preset The number of times; wherein, in the frame of each frame, if the first current adjustment circuit limits the number of times of the first signal current to be greater than the preset number of times, the logic circuit adjusts a statistical value to count the total occurrence of the overcurrent condition The number of frames. The overcurrent protection system of claim 2, wherein when the statistical value is greater than a predetermined number of frames, the logic circuit controls the driving module to stop The first driving signal is output. The overcurrent protection system of claim 3, wherein in the frame of each frame, if the first current adjustment circuit does not limit the magnitude of the first signal current, the logic circuit resets the statistical value to zero. The overcurrent protection system of claim 2, wherein the driving module provides a second driving signal to the gate driving array, the overcurrent protection system further comprising: a second current adjusting circuit coupled to the driving mode Between the group and the gate drive array, wherein the second current adjustment circuit is located on a current path of a second signal current of the second drive signal; wherein, during the pulse of the second signal current, the second The absolute value of the magnitude of the signal current is continuously greater than the preset threshold value exceeding the preset time length, and the second current adjustment circuit limits the absolute value of the magnitude of the second signal current to be not greater than the preset threshold value until the second This pulse period of the signal current ends. The overcurrent protection system of claim 5, wherein, in the frame of each frame, if the first current adjustment circuit limits the number of times of the first signal current to be greater than the preset number of times, or the second current adjustment circuit limits The number of times of the second signal current is greater than the preset number of times, and the logic circuit adjusts the statistical value. The overcurrent protection system of claim 2, wherein the The preset number of times corresponds to the total number of cycles of the first driving signal in each frame of the frame. The overcurrent protection system of claim 7, wherein the preset number of times is equal to 32 if the first driving signal is a clock signal for sequentially operating a plurality of shift registers in the gate driving array. If the first driving signal is a starting pulse signal for triggering the gate driving array at the beginning of each frame, the preset number of times is equal to 1, if the first driving signal is a fixed voltage, the preset The number of times is equal to 1. An overcurrent protection method is applicable to a display panel, the display panel includes a gate drive array and a display area, and the overcurrent protection method includes: providing a driving module, wherein the driving module is configured to provide a first Driving a signal to the gate driving array; providing a first current adjusting circuit, wherein the first current adjusting circuit is coupled between the driving module and the gate driving array, and is located at the first driving signal a current path of a signal current; during the pulse of the first signal current, if the absolute value of the magnitude of the first signal current continues to be greater than a predetermined threshold for more than a predetermined length of time, the first current adjustment circuit is utilized The absolute value of the magnitude of the first signal current is limited to be no greater than the preset threshold until the end of the pulse period of the first signal current. The overcurrent protection method of claim 9, further comprising: Using a logic circuit in each frame of the display area, determining whether the first current adjustment circuit limits the number of times of the first signal current exceeds a predetermined number of times; in the frame of each frame, if the first current The adjusting circuit limits the number of times of the first signal current to be greater than the preset number of times, and uses the logic circuit to adjust a statistical value to count the total number of frames in which an overcurrent condition occurs. The overcurrent protection method of claim 10, further comprising: when the statistical value is greater than a predetermined number of frames, using the logic circuit to control the driving module to stop outputting the first driving signal. The overcurrent protection method of claim 11, wherein the process of adjusting the statistical value by using the logic circuit comprises: in the frame of each frame, if the first current adjustment circuit does not limit the first signal current, using the logic The circuit zeroes this statistic. The overcurrent protection method of claim 10, wherein the driving module provides a second driving signal to the gate driving array, the overcurrent protection method further comprising: providing a second current adjusting circuit, wherein the second current The adjustment circuit is coupled between the driving module and the gate driving array, and the second current adjusting circuit is located on a current path of a second signal current of the second driving signal; and the pulse of the second signal current During the period, if the absolute value of the magnitude of the second signal current continues to be greater than the preset threshold value exceeds the preset time length And using the second current adjustment circuit to limit the absolute value of the magnitude of the second signal current to be not greater than the preset threshold until the end of the pulse period of the second signal current. The overcurrent protection method of claim 13, wherein the process of adjusting the statistical value by using the logic circuit further comprises: if the first current adjustment circuit limits the first signal current to be greater than the number of frames in the frame The logic circuit adjusts the statistical value by a preset number of times or when the second current adjustment circuit limits the second signal current to be greater than the preset number of times. The overcurrent protection method of claim 10, wherein the preset number of times corresponds to a total number of cycles of the first driving signal in each frame of the frame. The overcurrent protection method of claim 15, wherein the preset number of times is equal to 32 if the first driving signal is a clock signal for sequentially operating a plurality of shift registers in the gate driving array. If the first driving signal is a starting pulse signal for triggering the gate driving array at the beginning of each frame, the preset number of times is equal to 1, if the first driving signal is a fixed voltage, the preset The number of times is equal to 1.