TWI640968B - Power detecting unit for display device and related charge releasing method and driving module - Google Patents

Abstract

A power detection unit includes a voltage detector that detects whether an external power source is abnormal and adjusts a voltage adjustment signal and a gate-on signal accordingly; and a voltage regulator and a voltage regulator A gate negative voltage source is adjusted according to the voltage adjustment signal; wherein an external power source generates a gate positive voltage source and a gate negative voltage source, and the gate positive voltage source and the gate negative voltage source provide energy to generate a control display device. The gate driving signals of the plurality of transistors; when an abnormality is detected in the external power source, the voltage detector will adjust the voltage adjustment signal to make the voltage regulator increase the voltage value of the gate negative voltage source to a certain value. After the voltage is adjusted, the gate-on signal is adjusted to boost a plurality of gate driving signals by using a gate positive voltage source.

Description

Power supply detection unit of display device, related charge release method and driving module

The present invention relates to a power supply detection unit for a display device, a related charge release method, and a driving module, and more particularly to a power supply detection unit and related charges that can normally release the residual charge in the display device when an external power source is abnormal. Release method and driving module.

Liquid crystal displays (LCDs) have the advantages of light and thin, low radiation, small size, and low power consumption, and are widely used in information products such as notebook computers or flat-screen televisions. Therefore, the liquid crystal display has gradually replaced the traditional cathode ray tube display (Cathode Ray Tube Display) into the market mainstream, of which the active matrix thin film transistor liquid crystal display (Active Matrix TFT LCD) is the most popular. In simple terms, the driving system of the active matrix thin film transistor liquid crystal display is composed of a timing controller, a source driver, and a gate driver. The source driver and the gate driver control the data line and the scan line respectively, and they cross each other on the panel to form a circuit unit matrix, and each circuit unit (Cell) contains liquid crystal molecules and transistors. The display principle of the liquid crystal display is that the gate driver first sends the scanning signal to the gate of the transistor, so that the transistor is turned on, and then the source driver converts the data sent by the timing controller into an output voltage, and then sends the output voltage to the power. The source of the crystal. At this time, the voltage at one end of the liquid crystal will be equal to the voltage of the drain of the transistor, and the tilt angle of the liquid crystal molecules will be changed according to the voltage of the drain to change the light transmittance to display different colors.

When the external power supply of the liquid crystal display is abnormal, the timing controller needs to control the gate driver to output a high-voltage scanning signal to turn on the transistors in each circuit unit to reset the voltage across the liquid crystal molecules to eliminate afterimages and Avoid polarization of liquid crystal molecules. However, when the external power supply of the liquid crystal display is abnormal, the gate driver may not be able to obtain enough energy to make the scanning signal reach a voltage level capable of turning on the transistor in the circuit unit. Under this condition, the charges stored at both ends of the liquid crystal molecules cannot be released, which causes afterimages and polarizes the liquid crystal molecules. Therefore, how to ensure that the charges stored in the two ends of the liquid crystal molecules can be discharged when the external power supply of the liquid crystal display is abnormal has become an issue that the industry is eager to discuss.

In order to solve the above-mentioned problems, this case provides a power supply detection unit capable of normally releasing the residual charge in the display device when the external power source is abnormal, a related charge release method, and a driving module.

In one aspect, the present invention discloses a power detection unit for a driving module in a display device. The power detecting unit includes a voltage detector, which detects whether an external power source coupled to the driving module is abnormal, and adjusts a voltage adjustment signal and a gate-on signal accordingly. And a voltage regulator, the voltage regulator adjusts a gate negative voltage source according to the voltage adjustment signal; wherein the external power source generates a gate positive voltage source and the gate negative voltage source, and the gate positive voltage source And the gate negative voltage source provides energy to generate a plurality of gate driving signals that control the plurality of transistors in the display device; wherein when an abnormality is detected in the external power source, the voltage detector will adjust the voltage After adjusting the signal to cause the voltage regulator to increase the voltage value of the gate negative voltage source to a certain voltage, the gate open signal is adjusted to use the gate positive voltage source to boost the gate driving signals.

In another aspect, the present invention discloses a charge release method for a driving module of a display device. The charge release method includes raising a voltage value of a gate negative voltage source to a certain voltage when an external power source coupled to the driving module is detected to be abnormal; and using a gate positive voltage source to raise the voltage. Controlling a plurality of gate driving signals of a plurality of transistors in the display device; wherein the external power source is used to generate a gate positive voltage source and the gate negative voltage source, and the gate positive voltage source and the gate negative The voltage source provides energy to generate the plurality of gate driving signals. When an abnormality is detected in the external power source, the voltage detector adjusts the voltage adjustment signal to make the voltage regulator make the gate negative voltage source. After the voltage value is increased to a certain voltage, the gate-on signal is adjusted to enhance the gate driving signals by using the gate positive voltage source.

In yet another aspect, the present invention discloses a driving module for a display device. The driving module includes a power conversion unit, which generates a source positive voltage source and a source negative voltage source according to an external power source; a gate control unit, which is based on the source positive The voltage source, the source negative voltage source, and a gate-on signal generate a gate control signal, wherein the gate control unit adjusts and controls a plurality of gates of a plurality of transistors in the display device through the gate control signal. A drive signal; and a voltage detection unit including a voltage detector that detects whether an abnormality occurs in the external power supply and adjusts a voltage adjustment signal and the gate-on signal accordingly; and a voltage Regulator, the voltage regulator adjusts a gate negative voltage source according to the voltage adjustment signal; wherein when an abnormality is detected in the external power source, the voltage detector adjusts the voltage adjustment signal to adjust the voltage After the voltage value of the gate negative voltage source is increased to a certain voltage, the gate open signal is adjusted to use the gate positive voltage source to boost the gate drivers. Signal.

Please refer to FIG. 1. FIG. 1 is a schematic diagram of a display device 10 according to an embodiment of the present invention. The display device 10 may be an electronic product with a display panel, such as a smart phone, a tablet computer, a notebook computer, and the like, and the detailed composition method or architecture thereof varies according to different applications. For simplicity, FIG. 1 only shows a panel 100 and a driving module 102 of the display device 10, and other components, such as a housing and a connection interface, which are not directly related to the concept of the present invention are omitted. As shown in FIG. 1, the panel 100 includes scan lines SL0 to SLn and data lines DL0 to DLm. There is a pixel PIX at each boundary of the scan lines SL0-SLn and the data lines DL0-DLm. The panel 100 further includes a gate driving unit 104 for generating gate driving signals G0 to Gn on the scanning lines SL0 to SLn according to a gate control signal G_CTRL, respectively. The driving module 102 may be a driving chip for generating a gate control signal G_CTRL and data signals S0 to Sm on the data lines DL0 to DLm using an external power source AVDD. It is worth noting that, according to different applications and design concepts, the gate driving unit 104 may be disposed on the driving module 102 instead.

In this embodiment, the driving module 102 can detect whether the external power AVDD is abnormal. Generally speaking, when the external power AVDD is abnormal (such as when the external power AVDD is cut off), the driving module 102 needs to immediately adjust the gate control signal G_CTRL to control the gate driving unit 104 to adjust the gate driving signals G0 to Gn. To a gate maximum voltage VGMAX, the transistor in the pixel PIX is turned on to prevent the panel 100 from displaying an afterimage and to prevent the pixel PIX from being polarized. In general, when the external power supply AVDD is abnormal, the gate positive voltage source VGH used to provide the gate driving unit 104 with the power of the gate driving signals G0 to Gn may not provide sufficient energy for the gate driving unit 104 to The gate driving signals G0 to Gn are raised to the turn-on voltage of the transistor in the pixel PIX. In order to ensure that the gate driving signals G0 to Gn can be increased to the on-voltage of the transistor in the pixel PIX, the driving module 102 of this embodiment will determine the voltage of a gate negative voltage source VGL when it determines that the external power supply AVDD is abnormal. The value is increased from a minimum gate voltage VGMIN to a certain voltage VC. Through the gate control signal G_CTRL, the adjusted gate negative voltage source VGL will cause the gate driving unit 104 to increase the gate driving signals G0 to Gn to a constant voltage VC. For example, the constant voltage VC can be the ground voltage or the working voltage of other circuit elements (such as digital circuits) in the driving module. After the voltage value of the gate negative voltage source VGL is increased to the constant voltage VC, the driving module 102 adjusts the gate control signal G_CTRL, so that the gate driving unit 104 starts to use the gate positive voltage source VGH to drive the gate driving signal G0. ~ Gn is raised to a gate maximum voltage VGMAX. By first increasing the gate driving signals G0 to Gn to a constant voltage VC, the driving module 102 can ensure that the gate driving signals G0 to Gn are increased to the conduction voltage of the transistor in the pixel PIX, thereby eliminating afterimages and avoiding pixels. PIX polarization occurs.

In detail, the driving module 102 includes a power conversion unit 106, a source driving unit 108, a gate control unit 110, and a power detection unit 112. The power conversion unit 106 is coupled to an external power source AVDD, and is used to generate a gate positive voltage source VGH, a gate negative voltage source VGL, a source positive voltage source VSH, and a source negative voltage source VSL, among which the gate positive voltage source The voltage value of VGH is the highest gate voltage VGMAX, and the voltage value of the gate negative voltage source VGL is the lowest gate voltage VGMIN. The source driving unit 108 is coupled to a source positive voltage source VSH and a source negative voltage source VSL, and is used to generate data signals S0 to Sm. The gate control unit 110 is coupled to a gate positive voltage source VGH and a gate negative voltage source VGL to generate a gate control signal G_CTRL. It is worth noting that the driving module 102 may further include a timing control unit (not shown in FIG. 1) for generating control signals of the source driving unit 108 and the gate control unit 110 according to an external input signal.

The power detection unit 112 includes a voltage detector 114 and a voltage regulator 116. The voltage detector 114 is coupled to the external power AVDD, and is used to detect whether an abnormality occurs in the external power AVDD. The voltage regulator 116 is coupled to the gate negative voltage source VGL and is used to adjust the voltage value of the gate negative voltage source VGL. When the voltage detector 114 determines that an abnormality occurs in the external power supply AVDD, the voltage detector 114 adjusts a voltage adjustment signal VAS, so that the voltage regulator 116 shifts the gate negative voltage source VGL from the gate in a subsequent delay interval PD. The minimum voltage VGMIN is increased to a constant voltage VC. Through the gate control signal G_CTRL, the adjusted gate negative voltage source VGL will cause the gate driving unit 104 to increase the gate driving signals G0 to Gn to a constant voltage VC. After the delay period PD ends, the voltage detector 114 adjusts a gate open signal G_ON, so that the gate control unit 110 adjusts the gate control signal G_CTRL to enable the gate driving unit 104 to start the gate using the gate positive voltage source VGH. The pole driving signals G0 to Gn are raised to the highest gate voltage VGMAX. For example, the gate control unit 110 uses a gate positive voltage source VGH to generate a gate control signal G_CTRL that controls the gate driving unit 104 to raise the gate driving signals G0 to Gn. Since the gate driving signals G0 to Gn are boosted to the constant voltage VC before the gate driving voltage source VGH is used to boost the gate driving signals G0 to Gn, the driving module 102 can ensure that the gate driving signals G0 to Gn are increased to The conducting voltage of the transistor in the pixel PIX is turned on, thereby preventing the occurrence of afterimages and preventing the pixel from being polarized.

Please refer to FIG. 2, which is a schematic diagram of related signals when the display device 10 shown in FIG. 1 operates. As shown in FIG. 2, the external power supply AVDD starts an abnormal state at time T1 and its voltage value starts to decrease. At the time point T2, the voltage value of the external power source AVDD drops to a threshold voltage VTH, and the voltage detector 114 determines that an abnormality occurs in the external power source AVDD. At this time, the voltage detector 114 immediately switches the gate-on signal G_ON from a low logic voltage VLL to a high logic voltage VLH (such as switching from a low logic level "0" to a high logic level "1") so that The gate driving unit 104 starts to use the energy remaining in the gate positive voltage source VGH to raise the gate driving signals G0 to Gn (the gate driving signal G0 is shown in FIG. 2 as an example only) to the highest gate voltage VGMAX. However, the residual energy of the gate positive voltage source VGH can only increase the gate driving signals G0 to Gn from the gate minimum voltage VGMIN to a voltage VG1, and the voltage VG1 is not enough to turn on the transistor in the pixel PIX. Under this condition, the charges remaining in the pixel PIX cannot be discharged, resulting in the generation of afterimages and possible polarization of the pixel PIX.

Please refer to FIG. 3, which is a schematic diagram of related signals when the display device 10 shown in FIG. 1 operates. In FIG. 3, the external power supply AVDD also starts an abnormal state at time T1 and its voltage value starts to decrease. Different from the embodiment shown in FIG. 2, when the voltage detector 114 judges that the external power supply AVDD is abnormal at the time point T2, it will switch the voltage adjustment signal VAS from a low logic voltage VLL to a high logic voltage VLH to make the voltage regulator 116 In the delay interval PD after the time point T2, the voltage of the gate negative voltage source VGL is increased from the gate minimum voltage VGMIN to a constant voltage VC. Through the gate control signal G_CTRL, the gate driving unit 104 also raises the gate driving signals G0 to Gn (only the gate driving signal G0 is shown in FIG. 3 as an example) to a constant voltage VC.

After the delay period PD ends (that is, at time T3), the voltage detector 114 switches the gate-on signal G_ON, so that the gate driving unit 104 starts to use the energy remaining in the gate positive voltage source VGH to drive the gate-driving signal G0 ～ Gn is raised to the highest gate voltage VGMAX. As shown in FIG. 3, the residual energy of the gate positive voltage source VGH can increase the gate driving signals G0 to Gn from the constant voltage VC to a voltage VG2. For example, the voltage VG2 may be the sum of the constant voltage VC and the voltage VG1 shown in FIG. 2. By first increasing the gate driving signals G0 to Gn to a constant voltage VC, the driving module 102 can make the gate driving signals G0 to Gn closer to the gate maximum voltage VGMAX to ensure that the gate driving signals G0 to Gn can turn on the pixels. Transistors in PIX.

According to different applications and design concepts, the power detection unit 112 can be implemented in various ways. Please refer to FIG. 4, which is a schematic diagram of a display device 40 according to an embodiment of the present invention. The display device 40 is similar to the display device 10 shown in FIG. 1. Therefore, components and signals having similar functions use the same symbols. In this embodiment, the voltage regulator 116 is implemented by a switch SW. According to the voltage adjustment signal VAS, the switch SW switches the connection between the constant voltage VC and the gate negative voltage source VGL. When the voltage detector 114 judges that the external power supply AVDD is abnormal, the voltage detector 114 adjusts the voltage adjustment signal VAS to turn on the switch SW, so that the voltage value of the gate negative voltage source VGL is increased from the minimum gate voltage VGMIN to the constant voltage VC. .

Please refer to FIG. 5, which is a schematic diagram of a display device 50 according to an embodiment of the present invention. The display device 50 is similar to the display device 40 shown in FIG. 4, so components and signals with similar functions use the same symbols. A timing controller 500 is added to the display device 50 to generate a voltage adjustment signal VAS according to the voltage adjustment control signal VAS_CTRL. In one embodiment, the timing controller 500 may be a circuit in the driving module 102 for controlling the source driving unit 108 and the gate control unit 110. That is, the voltage detector 114 uses the timing controller 500 to adjust the voltage adjustment signal VAS. When the voltage detector 114 determines that the external power AVDD is abnormal, the voltage detector 114 adjusts the voltage adjustment control signal VAS_CTRL instead, so that the timing controller 500 switches the voltage adjustment signal VAS to turn on the switch SW. In this way, before the gate driving unit 104 starts to use the remaining energy of the gate positive voltage source VGH to enhance the gate driving signals G0 to Gn, the gate driving signals G0 to Gn have been first raised to a constant voltage VC to ensure the gate The driving signals G0 to Gn can turn on the transistors in the pixel PIX.

Please refer to FIG. 6, which is a schematic diagram of a display device 60 according to an embodiment of the present invention. The display device 60 is similar to the display device 50 shown in FIG. 5, and therefore components and signals having similar functions use the same symbols. In this embodiment, the voltage detector 114 adjusts the gate-on signal G_ON by controlling the timing controller 600. After the voltage detector 114 detects an abnormality in the external power supply AVDD and adjusts the voltage adjustment control signal VAS_CTRL to turn on the switch SW, the voltage detector 114 adjusts a gate open control signal G_ON_CTRL to enable the timing controller 600 to switch the gate The turn-on signal G_ON controls the gate driving unit 104 to start using the gate positive voltage source VGH to increase the voltage of the gate driving signals G0 to Gn.

In the above embodiment, when the external power supply AVDD is abnormal, the driving module 102 raises the gate driving signals G0 to Gn to release the accumulated charge in the pixel PIX. The procedure can be summarized as a charge discharging method 70, as shown in FIG. The charge release method 70 can be used in a driving module for driving a panel, and includes the following steps:

Step 700: Start.

Step 702: When an abnormality is detected in an external power source coupled to the driving module, adjust a gate negative voltage source from a gate minimum voltage to a certain voltage.

Step 704: Boost a plurality of gate driving signals by using a positive gate voltage source.

Step 706: End.

According to the charge release method 70, the driving module continuously detects whether an abnormality occurs in an external power source coupled to itself. The driving module uses an external power source to generate a gate positive voltage source and a gate negative voltage source. The gate positive voltage source and the gate negative voltage source are used to generate a plurality of gate driving signals, and the plurality of gate driving signals are used for To control a plurality of transistors in a plurality of pixels in the panel. When the drive module detects an abnormality in the external power supply (such as judging that the voltage value of the external power supply is less than a threshold voltage), the drive module will increase the voltage value of the gate negative voltage source from a minimum gate voltage to a certain voltage (Such as ground voltage). According to the adjusted gate negative voltage source, a gate driving unit for generating a plurality of gate driving signals will adjust the voltage values of the plurality of gate driving signals to a constant voltage. After the voltage value of the gate negative voltage source is increased to a constant voltage, the driving module starts to use the gate positive voltage source to increase the voltage values of the plurality of gate driving signals. By first increasing the number of gate signals from the minimum gate voltage to a constant voltage when an external power source abnormality is detected, the drive module can ensure that the voltage value of the gate drive signal is increased to the conduction voltage that can conduct the crystal to release The charge accumulated in the pixel. In this way, when an abnormality occurs in the external power supply, the display module can avoid the afterimage of the panel display and prevent the pixels in the panel from being polarized. For the detailed operation mode of the charge release method 70, reference may be made to the foregoing embodiment. For brevity, details are not described herein.

When the external power source is abnormal, the driving module and the charge releasing method of the embodiments of the present invention raise the gate negative voltage source to increase the gate driving signals from the lowest voltage of the gate to a constant voltage to ensure the gate driving signal. The voltage value is increased to a turn-on voltage of a transistor capable of turning on each pixel in the panel. In this way, when an abnormality occurs in the external power source, the electric charge accumulated in each pixel in the panel can be discharged, thereby eliminating afterimages and preventing polarization. The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the scope of patent application of the present invention shall fall within the scope of the present invention.

10, 40, 50, 60‧‧‧ display devices

100‧‧‧ Panel

102‧‧‧Driver Module

104‧‧‧Gate driving unit

106‧‧‧Power Conversion Unit

108‧‧‧Source driver unit

110‧‧‧Gate control unit

112‧‧‧Power Detection Unit

114‧‧‧Voltage Detector

116‧‧‧Voltage Regulator

500, 600‧‧‧ timing controller

70‧‧‧ Charge release method

700 ～ 706‧‧‧step

DL0 ～ DLm‧‧‧Data line

G0 ～ Gn‧‧‧Gate driving signal

G_CTRL‧‧‧Gate control signal

G_ON‧‧‧Gate open signal

G_ON_CTRL‧‧‧Gate ON control signal

PIX‧‧‧pixel

S0 ～ Sm‧‧‧Data signal

SL0 ～ SLn‧‧‧Scan line

SW‧‧‧Switch

T1 ～ T3‧‧‧‧

VAS‧‧‧Voltage adjustment signal

VAS_CTRL‧‧‧Voltage adjustment control signal

VC‧‧‧Constant voltage

VG1, VG2‧‧‧Voltage

VGH‧‧‧Gate positive voltage source

VGL‧‧‧Gate negative voltage source

VGMAX‧‧‧Gate maximum voltage

VGMIN‧‧‧Gate minimum voltage

VLH‧‧‧High logic voltage

VLL‧‧‧Low logic voltage

VSH‧‧‧Source Positive Voltage Source

VSL‧‧‧Source negative voltage source

VTH‧‧‧ critical voltage

AVDD‧‧‧External Power

PD‧‧‧Delay interval

FIG. 1 is a schematic diagram of a display device according to an embodiment of the present invention. FIG. 2 is a schematic diagram of related signals when the display device shown in FIG. 1 operates. FIG. 3 is a schematic diagram of related signals when the display device shown in FIG. 1 operates. FIG. 4 is a schematic diagram of a display device according to an embodiment of the present invention. FIG. 5 is a schematic diagram of a display device according to an embodiment of the present invention. FIG. 6 is a schematic diagram of a display device according to an embodiment of the present invention. FIG. 7 is a flowchart of a charge release method according to a first embodiment of the present invention.

Claims (8)

A power detection unit for a driving module of a display device includes: a voltage detector that detects whether an external power source coupled to the driving module is abnormal, and A voltage adjustment signal and a gate-on signal are adjusted according to the voltage adjustment; and a voltage regulator that adjusts a gate negative voltage source according to the voltage adjustment signal; wherein the external power source generates a gate positive voltage source and The gate negative voltage source, and the gate positive voltage source and the gate negative voltage source provide energy to generate a plurality of gate driving signals for controlling a plurality of transistors in the display device; wherein the external power source is detected When an abnormality occurs, the voltage detector will adjust the voltage adjustment signal to make the voltage regulator increase the voltage value of the negative voltage source of the gate to a certain voltage, and increase the plurality of gate driving signals to the constant voltage. , Adjust the gate open signal to use the gate positive voltage source to boost the plurality of gate drive signals. For example, the power detection unit of claim 1, wherein the constant voltage is a ground voltage. The power detection unit according to claim 1, wherein the voltage regulator is a switch, and the switch is coupled between the gate negative voltage source and the constant voltage. The power detection unit according to claim 1, wherein the voltage detector adjusts at least one of the voltage adjustment signal and the gate-on signal through a timing control unit in the driving module. The power detection unit according to claim 1, wherein the voltage detector adjusts the voltage adjustment signal in a delay interval to cause the voltage regulator to increase the voltage value of the gate negative voltage source to the constant voltage, After the delay interval ends, the gate-on signal is adjusted to enhance the gate driving signals by using the gate positive voltage source. The power detection unit according to claim 1, wherein when the voltage value of the external power source is less than a threshold voltage, the voltage detector determines that an abnormality occurs in the external power source. A charge release method for a driving module of a display device includes: when an external power source coupled to the driving module detects an abnormality, raising the voltage value of a gate negative voltage source to a certain value Voltage; and using a gate positive voltage source to enhance control of a plurality of gate driving signals of a plurality of transistors in the display device; wherein the external power source generates a gate positive voltage source and the gate negative voltage source, and the The gate positive voltage source and the gate negative voltage source provide energy to generate the plurality of gate driving signals; wherein when an abnormality is detected in the external power source, the voltage detector adjusts the voltage adjustment signal to make the The voltage regulator raises the voltage value of the gate negative voltage source to a certain voltage, and after the gate driving signals are raised to the constant voltage, the gate opening signal is adjusted to use the gate positive voltage source to increase the plurality of gate driving signals. Gate drive signal. A driving module for a display device includes: a power conversion unit, the power conversion unit generates a gate positive voltage source and a gate negative voltage source according to an external power source; a gate control unit, the gate The gate control unit generates a gate control signal according to the gate positive voltage source, the gate negative voltage source, and a gate open signal, wherein the gate control unit adjusts and controls the display device through the gate control signal. A plurality of gate driving signals of a plurality of transistors; and a voltage detection unit including: a voltage detector that detects whether an abnormality occurs in the external power supply and adjusts a voltage adjustment signal accordingly And the gate turn-on signal; and a voltage regulator that adjusts the gate negative voltage source according to the voltage adjustment signal; wherein when an abnormality of the external power source is detected, the voltage detector will Adjust the voltage adjustment signal to make the voltage regulator increase the voltage value of the gate negative voltage source to a certain voltage, and then increase the plurality of gate driving signals to the constant voltage. Adjusting the gate turn-on signal to the gate electrode using the positive voltage source of the plurality of lift gate drive signals.