TWI513367B - Electronic control gears for led light engine and application thereof - Google Patents

Electronic control gears for led light engine and application thereof Download PDF

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TWI513367B
TWI513367B TW103124262A TW103124262A TWI513367B TW I513367 B TWI513367 B TW I513367B TW 103124262 A TW103124262 A TW 103124262A TW 103124262 A TW103124262 A TW 103124262A TW I513367 B TWI513367 B TW I513367B
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voltage
current
array
resistor
led sub
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TW103124262A
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TW201603635A (en
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Ching Sheng Yu
Chih Liang Wang
Kuang Hui Chen
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Groups Tech Co Ltd
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Priority to US14/637,443 priority patent/US9144127B1/en
Priority to CN201510099894.9A priority patent/CN104902614B/en
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Description

LED光引擎的電子控制裝置及其應用Electronic control device for LED light engine and its application

本發明係有關於一種發光二極體(LED)光引擎控制裝置,特別是利用比較電路比較電流檢測電阻與各個比較電路不同的參考電壓,調控對應之旁通開關的操作狀態,以逐級點亮或逐級熄滅LED子陣列的LED光引擎電子控制裝置。The invention relates to a light-emitting diode (LED) light engine control device, in particular to comparing a current detecting resistor with a reference voltage different from each comparing circuit by using a comparison circuit, and adjusting an operating state of the corresponding bypass switch to step by step. The LED light engine electronic control unit of the LED sub-array is turned on or off step by step.

相對於傳統燈具,發光二極體具有較高的發光效率(luminous efficacy),傳統燈泡每瓦提供約15流明(lumens per watt),而發光二極體(LED)則每瓦高達100流明(lumens per watt)以上,且發光二極體具有相對壽命較長、較不受外界干擾及不易損壞的優點,是照明設備的首選。Light-emitting diodes have a higher luminous efficacy than conventional luminaires. Traditional bulbs provide about 15 lumens per watt, while light-emitting diodes (LEDs) have up to 100 lumens per watt (lumens) Above watt), and the light-emitting diode has the advantages of long life, no external interference and no damage, and is the first choice for lighting equipment.

一般來說,發光二極體需要直流電驅動,而市電為交流電,必須透過整流器(全波或半波整流)轉成直流電,才可供應給發光二極體作使用。經過轉換之直流脈衝訊號,在每週期之初始及結束區段附近(亦即,空載時間),尚無法克服發光二極體之順向電壓降(forward voltage drop)以驅動發光二極體,導致導通角(conduction angle)狹小以及功率因數(power factor)低落。空載時間是指LED停止導通的期間,相對地,導通角是指LED被導通的期間。導通角與空載時間的總和為一整流後之直流脈衝波 形。空載時間越長,導通角就越狹小,功率因數就越低落。傳統的LED驅動器(LED driver)通常會面臨以下三種問題。Generally speaking, the light-emitting diode needs to be driven by a direct current, and the commercial power is an alternating current, which must be converted into a direct current through a rectifier (full-wave or half-wave rectification) before being supplied to the light-emitting diode for use. The converted DC pulse signal, in the vicinity of the initial and end sections of each cycle (ie, dead time), cannot overcome the forward voltage drop of the LED to drive the LED. This results in a narrow conduction angle and a low power factor. The dead time refers to a period during which the LED stops conducting, and the conduction angle refers to a period during which the LED is turned on. The sum of the conduction angle and the dead time is a rectified DC pulse wave. shape. The longer the dead time, the narrower the conduction angle and the lower the power factor. Traditional LED drivers typically face the following three problems.

第一個問題是傳統的LED驅動器須採用濾波器、整流器、以及功率因數修正器(power factor corrector,PFC)等較為複雜的驅動器電路(driver circuit),造成驅動器的成本高昂。同時,發光二極體的壽命雖長,但功率因數修正器所採用之電解電容器(electrolytic capacitor)卻易於損壞,使得整體壽命相對縮短,無法發揮發光二極體的優點。The first problem is that conventional LED drivers require filters, rectifiers, and more complex driver circuits such as power factor correctors (PFCs), resulting in high drive cost. At the same time, although the life of the light-emitting diode is long, the electrolytic capacitor used in the power factor corrector is easily damaged, so that the overall life is relatively shortened, and the advantages of the light-emitting diode cannot be exhibited.

第二問題是在空載時間,沒有電流通過發光二極體,造成照明設備的閃爍現象(flicker phenomenon)。於直流脈衝週期中,LED受到正向電流驅動而被點亮,再受到零電流驅動而熄滅。當有空載時間時,LED在點亮與熄滅之間會造成閃爍。一般市用交流電的頻率是60Hz,整流後形成直流電壓脈衝,頻率為兩倍(約為120Hz),閃爍現象以大約是120Hz的頻率發生在空載時間。空載時間所帶來的閃爍現象雖不易被人眼察覺,但易使人眼疲勞。The second problem is that at no-load time, no current passes through the light-emitting diode, causing a flicker phenomenon of the lighting device. During the DC pulse period, the LED is driven by the forward current and is illuminated, and then driven by the zero current to extinguish. When there is no dead time, the LED will cause flicker between lighting and extinction. The frequency of the general city AC power is 60 Hz. After rectification, a DC voltage pulse is formed, the frequency is twice (about 120 Hz), and the flicker phenomenon occurs at a no-load time at a frequency of about 120 Hz. The flickering phenomenon caused by the dead time is not easy to be perceived by the human eye, but it is easy to cause eye fatigue.

第三個問題是功率因數低落。低功率之功率因數修正器,其迴路電流太弱而無法準確地被偵測,而將AC輸入電流修正為正弦波的波形。功率因數的計算方式可以為將輸入功率除以輸入電壓(線電壓)與輸入電流(線電流)之乘積(PF=P/(V×I),其中PF為功率因數、P表示輸入功率、V及I分別為線電壓及線電流的有效值),用以度量電力(electricity)的使用效率,當線電壓與線電流的相似度越高,表示電力使用效率越好,功率因數越高。當線電壓與線電流的波形幾乎一致,此時,功率因數有最大值近似於1。The third problem is the low power factor. The low power power factor corrector has a loop current that is too weak to be accurately detected and corrects the AC input current to a sine wave waveform. The power factor can be calculated by dividing the input power by the product of the input voltage (line voltage) and the input current (line current) (PF = P / (V × I), where PF is the power factor, P is the input power, V And I is the effective value of the line voltage and the line current, respectively, to measure the efficiency of the use of electricity. When the similarity between the line voltage and the line current is higher, the power use efficiency is better, and the power factor is higher. When the line voltage and the line current waveform are almost identical, at this time, the power factor has a maximum value of approximately 1.

傳統的功率因數修正器,需要偵測迴路中的電流,藉以修正線電流波形更接近線電壓波形。若迴路中的電流太低而無法正確地被功率因數修正器之電流偵測電路偵測,功率因數修正器將無法適當地將線電流與線 電壓之波形與相位對齊,以達到較佳的功率因數。由於AC輸入電流波形之不連續點與跳躍點造成的總諧波失真(Total Harmonic Distortion,THD)與空載時間有關。根據傅立葉分析對於週期訊號的展開,週期波形中任何不連續點或跳躍點,將導致基本成份上高階諧波(higher-order harmonics),造成總諧波失真的增加。因此,消除不連續點及跳躍點將有助於減少總諧波失真。The traditional power factor corrector needs to detect the current in the loop, so that the corrected line current waveform is closer to the line voltage waveform. If the current in the loop is too low to be correctly detected by the current detection circuit of the power factor corrector, the power factor corrector will not be able to properly line current and line. The waveform of the voltage is aligned with the phase to achieve a better power factor. Due to the discontinuity of the AC input current waveform and the total harmonic distortion (THD) caused by the jump point, the dead time is related to the dead time. According to the Fourier analysis for the development of the periodic signal, any discontinuity or jump point in the periodic waveform will result in higher-order harmonics on the basic components, resulting in an increase in total harmonic distortion. Therefore, eliminating discontinuities and jumping points will help reduce total harmonic distortion.

有鑒於此,如何簡化電路及製程複雜度,維持良好的功率因數及較低的諧波失真,是目前研發發光二極體光源的主要課題之一。In view of this, how to simplify the circuit and process complexity, maintain good power factor and low harmonic distortion is one of the main topics for the development of light-emitting diode light sources.

本發明所提出的LED光引擎電子控制裝置,利用比較電路透過電流檢測測電阻,偵測通過LED子陣列的電流於電流檢測電阻的跨壓,並與各個比較電路不同的參考電壓比較,以調控對應之旁通開關的操作狀態,以逐級點亮或逐級熄滅LED子陣列的發光二極體光引擎電子控制裝置。The LED light engine electronic control device proposed by the invention uses a comparison circuit to transmit a current detecting resistance, detects a voltage across the current sub-voltage of the LED sub-array, and compares with a reference voltage different from each comparison circuit to regulate Corresponding to the operating state of the bypass switch, the LED light-emitting diode electronic control device of the LED sub-array is turned on step by step or stepwise.

本發明一實施例所提出之LED光引擎的電子控制裝置,包含一整流器、一電流調節器(current regulator)、一旁通開關(current regulate switch)列及一開關控制電路。整流器用以連接一外部交流電壓源,提供一直流脈衝電壓。電流調節器用以調整輸入電流波以形成類正弦(quasi-sinusoidal)的方波(square wave)或步階波(step wave)波形,有效地提升功率因數。旁通開關列耦接於整流器且與一外部LED陣列並聯設置,此外部LED陣列包括串聯之複數個LED子陣列,各旁通開關可以是電晶體(例如是金氧半場效電晶體)。旁通開關列包括串聯之複數個旁通開關,於導通時用以旁通對應之LED子陣列。開關控制電路具有一電流檢測電阻及複數個比較電路,電流檢測電阻耦接於外部LED陣列之陰極與接地端之間,且耦接至各比較電 路的參考端,此些比較電路分別具有不同的參考電壓,且此些比較電路分別依據電流檢測電阻的跨壓與各參考電壓作比較,調控對應之旁通開關為截止或導通,電流檢測電阻的跨壓與直流脈衝電壓有關,以使旁通開關列依據該直流脈衝電壓,分段點亮此些LED子陣列。旁通開關的數量例如是小於外部LED子陣列的數量。An electronic control device for an LED light engine according to an embodiment of the invention includes a rectifier, a current regulator, a current regulate switch column, and a switch control circuit. The rectifier is used to connect an external AC voltage source to provide a DC pulse voltage. The current regulator is used to adjust the input current wave to form a quasi-sinusoidal square wave or step wave waveform, which effectively increases the power factor. The bypass switch column is coupled to the rectifier and disposed in parallel with an external LED array. The external LED array includes a plurality of LED sub-arrays connected in series, and each of the bypass switches may be a transistor (for example, a gold-oxygen half field effect transistor). The bypass switch column includes a plurality of bypass switches connected in series to bypass the corresponding LED sub-array when turned on. The switch control circuit has a current detecting resistor and a plurality of comparison circuits. The current detecting resistor is coupled between the cathode and the ground of the external LED array, and is coupled to each of the comparators. The reference terminals of the circuit respectively have different reference voltages, and the comparison circuits respectively compare the voltages of the current detecting resistors with the reference voltages, and adjust the corresponding bypass switches to be turned off or on, and the current detecting resistors The voltage across the voltage is related to the DC pulse voltage, so that the bypass switch column illuminates the LED sub-arrays in sections according to the DC pulse voltage. The number of bypass switches is, for example, less than the number of external LED sub-arrays.

本發明另一實施例所提出之LED光引擎的電子控制裝置,包含一整流器、一旁通開關(current regulate switch)列及一開關控制電路。整流器用以連接一外部交流電壓源,提供一直流脈衝電壓。旁通開關列耦接於整流器且與一外部LED陣列並聯設置,此外部LED陣列包括串聯之複數個LED子陣列,各旁通開關可以是電晶體(例如是金氧半場效電晶體)。旁通開關列包括串聯之複數個旁通開關,於導通時用以旁通對應之LED子陣列。開關控制電路具有一電流檢測電阻及複數個比較電路,電流檢測電阻耦接於外部LED陣列之陰極與接地端之間,且耦接至各比較電路的參考端,此些比較電路分別具有不同的參考電壓,且此些比較電路分別依據電流檢測電阻的跨壓與各參考電壓作比較,調控對應之旁通開關為截止或導通,電流檢測電阻的跨壓與直流脈衝電壓有關,以使旁通開關列依據該直流脈衝電壓,分段點亮此些LED子陣列。旁通開關的數量例如是等於外部LED子陣列的數量。An electronic control device for an LED light engine according to another embodiment of the present invention includes a rectifier, a current regulate switch column, and a switch control circuit. The rectifier is used to connect an external AC voltage source to provide a DC pulse voltage. The bypass switch column is coupled to the rectifier and disposed in parallel with an external LED array. The external LED array includes a plurality of LED sub-arrays connected in series, and each of the bypass switches may be a transistor (for example, a gold-oxygen half field effect transistor). The bypass switch column includes a plurality of bypass switches connected in series to bypass the corresponding LED sub-array when turned on. The switch control circuit has a current detecting resistor and a plurality of comparing circuits. The current detecting resistor is coupled between the cathode and the ground of the external LED array, and is coupled to the reference end of each comparing circuit, and the comparing circuits respectively have different The reference voltage, and the comparison circuits are respectively compared with the reference voltages according to the voltage across the current detecting resistors, and the corresponding bypass switches are turned off or turned on, and the voltage across the current detecting resistors is related to the DC pulse voltage, so as to bypass The switch column illuminates the LED sub-arrays in sections according to the DC pulse voltage. The number of bypass switches is, for example, equal to the number of external LED sub-arrays.

本發明實施例中的旁通開關例如為空乏型或增強型的電晶體,可受到開關控制電路調控,依據輸入交流電壓,在電壓升高時,逐級驅動LED子陣列,同時逐級提高線電流;在電壓降低時,逐級熄滅LED子陣列,同時逐級降低線電流,簡化電路、提高發光效率、提高功率因數及降低成本等優點。The bypass switch in the embodiment of the present invention is, for example, a depleted or enhanced transistor, which can be regulated by a switch control circuit, and according to the input AC voltage, when the voltage is increased, the LED sub-array is driven step by step, and the line is stepwise increased. Current; when the voltage is reduced, the LED sub-array is extinguished step by step, and the line current is reduced step by step, simplifying the circuit, improving the luminous efficiency, improving the power factor, and reducing the cost.

本發明一實施例所提出之電流檢測電阻,包括一共享電流感測與調變單元,耦接於外部LED陣列,用以規劃點亮之外部LED子陣列的電流,以調整點亮之外部LED子陣列的亮度,其中共享電流感測與調變單元,包括一電位計、一壓控電阻或一電晶體開關。於一實施例中,更包括一脈衝寬度調變單元、一低通濾波器及一電壓追隨器至少一者。使得此LED光引擎的電子控制裝置,可經由共享電流感測與調變單元作手動調光(機械式調光),或者,利用調光訊號對共享電流感測與調變單元進行調光(電控調光)。A current detecting resistor according to an embodiment of the present invention includes a shared current sensing and modulation unit coupled to an external LED array for planning the current of the illuminated external LED sub-array to adjust the illuminated external LED. The brightness of the sub-array, wherein the shared current sensing and modulation unit comprises a potentiometer, a voltage controlled resistor or a transistor switch. In one embodiment, at least one of a pulse width modulation unit, a low pass filter, and a voltage follower is further included. The electronic control device of the LED light engine can be manually dimmed (mechanical dimming) via the shared current sensing and modulation unit, or dimmed by the shared current sensing and modulation unit by using the dimming signal ( Electronically controlled dimming).

本發明之一實施例中,更包括一電壓調節器陣列,包括複數個電壓調節器,分別耦接於輸入電壓與比較電路之間,用以穩定旁通開關之導通電壓,使得旁通開關之導通狀態不受直流脈衝之輸入電壓的下降緣(falling edge)影響。An embodiment of the present invention further includes a voltage regulator array including a plurality of voltage regulators coupled between the input voltage and the comparison circuit for stabilizing the turn-on voltage of the bypass switch, such that the bypass switch The on state is not affected by the falling edge of the input voltage of the DC pulse.

於本發明之一實施例中,更包括一正弦電壓補償器,耦接於輸入電壓與開關控制電路之間,用以汲取直流脈衝之輸入電壓,以補償通過發光二極體之電壓波形,使得電壓波形由步階波修飾為更貼近正弦波的波形,進一步改善功率因數。In an embodiment of the invention, a sinusoidal voltage compensator is coupled between the input voltage and the switch control circuit for extracting the input voltage of the DC pulse to compensate the voltage waveform of the LED through the LED. The voltage waveform is modified by a step wave to a waveform closer to the sine wave, further improving the power factor.

於本發明之一實施例中,更包括一線電壓調整率緊縮器(Line regulation tightener)耦接電流調節器。線電壓調整率緊縮器包括一並聯調節器(或一雙載子接面電晶體)作電壓偵測之用,透過一電壓偵測分壓電阻耦接於輸入電壓。當輸入電壓克服所有的LED子陣列之順向電壓降,但尚未克服電壓偵測之並聯調節器或電壓偵測之雙載子接面電晶體之參考電壓時,通過LED子陣列的電流為第一電流,當輸入電壓克服所有的LED子陣列之順向電壓降,且克服電壓偵測之並聯調節器或電壓偵測之雙載子接 面電晶體之參考電壓時,通過LED子陣列的電流為第二電流,且第一電流大於第二電流。In an embodiment of the invention, a line regulation tightener is further coupled to the current regulator. The line voltage regulation rate compactor includes a shunt regulator (or a two-carrier junction transistor) for voltage detection, and is coupled to the input voltage through a voltage detection voltage dividing resistor. When the input voltage overcomes the forward voltage drop of all LED sub-arrays, but the reference voltage of the parallel regulator or voltage detection bipolar junction transistor of the voltage detection has not been overcome, the current through the LED sub-array is the first a current, when the input voltage overcomes the forward voltage drop across all of the LED sub-arrays, and overcomes the double-carrier connection of the voltage regulator's shunt regulator or voltage detection When the reference voltage of the surface transistor is used, the current through the LED sub-array is the second current, and the first current is greater than the second current.

於本發明之一實施例中,更包括複數個閃爍抑制電容(flicker-suppression capacitor)與複數個二極體,各閃爍抑制電容分別並聯於對應之一個或多個外部LED子陣列,且各個二極體之陰極耦接至對應之外部LED子陣列的陽極。當輸入電壓尚僅克服當級與當級以下之外部LED子陣列的順向電壓降時,閃爍抑制電容放電以點亮當級以上之外部LED子陣列。In an embodiment of the present invention, a plurality of flicker-suppression capacitors and a plurality of diodes are respectively connected, and each of the flicker suppression capacitors is respectively connected in parallel to the corresponding one or more external LED sub-arrays, and each of the two The cathode of the pole body is coupled to the anode of the corresponding outer LED sub-array. When the input voltage still only overcomes the forward voltage drop of the external LED sub-array below the current level and below, the flicker suppression capacitor discharges to illuminate the external LED sub-array above the level.

AC‧‧‧交流電壓源AC‧‧‧AC voltage source

100‧‧‧整流器100‧‧‧Rectifier

120‧‧‧電流調節器120‧‧‧current regulator

140a、145a、146a、148a、140b、140c‧‧‧線電壓調整率緊縮器140a, 145a, 146a, 148a, 140b, 140c‧‧‧ line voltage regulation rate reducer

142‧‧‧控制電路142‧‧‧Control circuit

160‧‧‧電流檢測電阻160‧‧‧current sense resistor

160a、160b、160c、160d‧‧‧共享電流感測與調變單元160a, 160b, 160c, 160d‧‧‧ shared current sensing and modulation unit

180、182、184‧‧‧電壓調節器180, 182, 184‧‧ ‧ voltage regulator

C1、C2、C3、C4、Cf、Cg1、Cg2、Cg3、Cg4、Cg1’、Cg2’、Cg3’、Cg4’‧‧‧電容C1, C2, C3, C4, Cf, Cg1, Cg2, Cg3, Cg4, Cg1', Cg2', Cg3', Cg4'‧‧‧ capacitor

150、152、154‧‧‧比較電路150, 152, 154‧‧‧ comparison circuit

F‧‧‧電壓追隨器F‧‧‧Voltage Follower

PWM‧‧‧脈衝寬度調變單元PWM‧‧‧ pulse width modulation unit

Rp、R15、R16、Rx、Rx1、Rx2、Rx3、Rx4、Ra、Ra1、Ra2、Ra3、Ra4、Rm1、Rm2、Rg1、Rg2、Rg3、Rx、Rx1、Rx2、Rx3、Rz1、Rz2、Rz3、Rk1、Rk2、Rk3、Rk4、Re1、Re2、Re3、Re4、Rj1、Rj2、Rj3、Rj4、Rf1、Rf2、Rf3、Rf4、Rf5、Rf6、Rf7、Rf8、Rt1、Rt2、Rt3、Rt4、Rt5、Rt6、Rt7、R50、R52、R54、Rd1、Rd2、Rd3、Rp4、Rp5、Rp6、Rv1、Rv2、Rv3‧‧‧電阻Rp, R15, R16, Rx, Rx1, Rx2, Rx3, Rx4, Ra, Ra1, Ra2, Ra3, Ra4, Rm1, Rm2, Rg1, Rg2, Rg3, Rx, Rx1, Rx2, Rx3, Rz1, Rz2, Rz3, Rk1, Rk2, Rk3, Rk4, Re1, Re2, Re3, Re4, Rj1, Rj2, Rj3, Rj4, Rf1, Rf2, Rf3, Rf4, Rf5, Rf6, Rf7, Rf8, Rt1, Rt2, Rt3, Rt4, Rt5, Rt6, Rt7, R50, R52, R54, Rd1, Rd2, Rd3, Rp4, Rp5, Rp6, Rv1, Rv2, Rv3‧‧‧ resistance

R1、R2‧‧‧正弦電壓補償器R1, R2‧‧‧ sinusoidal voltage compensator

G‧‧‧外部LED子陣列G‧‧‧External LED subarray

G1、G2、G3、G4‧‧‧LED子陣列G1, G2, G3, G4‧‧‧ LED sub-arrays

S1、S2、S3、S4、S10、S20、S30、S15、S25、S35‧‧‧旁通開關S1, S2, S3, S4, S10, S20, S30, S15, S25, S35‧‧‧ bypass switch

Z1、Z2、Z3、Z4、Z5、Z6、Zd1、Zd2、Zd3、Ze、Zk、Zf1、Zf2‧‧‧齊納二極體Z1, Z2, Z3, Z4, Z5, Z6, Zd1, Zd2, Zd3, Ze, Zk, Zf1, Zf2‧‧‧ Zener diode

Dx、Dg1、Dg2、Dg3、Dg4、D1、D2、D3、D4、D5、D6‧‧‧二極體Dx, Dg1, Dg2, Dg3, Dg4, D1, D2, D3, D4, D5, D6‧‧‧ diode

Dp‧‧‧光二極體Dp‧‧‧Light diode

X1、X2、X3、X、Xe、Xf、Xh、Xk‧‧‧並聯調節器X1, X2, X3, X, Xe, Xf, Xh, Xk‧‧‧ shunt regulator

M、Me、Mj、Mk、M16、Mf1、Mf2、B1、B2、B3、B7、B8、B9、B10、B16、Bf、P1、P2、P3、P4、P5、P6、Bh、Bp‧‧‧電晶體M, Me, Mj, Mk, M16, Mf1, Mf2, B1, B2, B3, B7, B8, B9, B10, B16, Bf, P1, P2, P3, P4, P5, P6, Bh, Bp‧‧ Transistor

Pf‧‧‧光電耦合元件Pf‧‧‧Opto-coupling components

Vcc‧‧‧電壓源Vcc‧‧‧ voltage source

Vin‧‧‧輸入電壓Vin‧‧‧Input voltage

Iin‧‧‧輸入電流Iin‧‧‧ input current

ILED ‧‧‧通過LED子陣列之電流I LED ‧‧‧current through the LED sub-array

T、T’‧‧‧週期T, T’‧‧‧ cycle

t、t1’、t0、t1、t2、t3、t4、t4’、t41 、t42 、t5、t5’、t51 、t52 、t6、t7、t8、t9‧‧‧時間t, t1', t0, t1, t2, t3, t4, t4', t4 1 , t4 2 , t5, t5', t5 1 , t5 2 , t6, t7, t8, t9‧‧

I0、I1、I2、I3、I4、I4L 、I4M 、I4H ‧‧‧電流I0, I1, I2, I3, I4, I4 L , I4 M , I4 H ‧‧‧ Current

Lmax、Lmax’‧‧‧光輸出波形的最大值Maximum value of Lmax, Lmax'‧‧‧ light output waveform

Lmin、Lmin’‧‧‧光輸出波形的最小值Minimum value of Lmin, Lmin'‧‧‧ light output waveform

Lave、Lave’‧‧‧平均光輸出Lave, Lave’s average light output

A、B、A’、B’‧‧‧面積A, B, A’, B’‧‧‧ area

圖1A所示為依照本發明的照明裝置之電路架構的示意圖。照明裝置包括包括電流調節器、LED光引擎的電子控制裝置及外部之LED陣列(分割成複數個發光二極體子陣列)。Figure 1A is a schematic illustration of the circuit architecture of a lighting device in accordance with the present invention. The illumination device includes an electronic control device including a current regulator, an LED light engine, and an external LED array (divided into a plurality of light emitting diode sub-arrays).

圖1B所示為依照本發明的照明裝置之另一種電路架構示意圖。此照明裝置為不包括電流調節器之另一種LED光引擎的電子控制裝置及外部之LED陣列。FIG. 1B is a schematic diagram showing another circuit architecture of a lighting device in accordance with the present invention. The illuminating device is an electronic control device of another LED light engine that does not include a current regulator and an external LED array.

圖2A~2B所示實施例為依照圖1A之LED光引擎的電子控制裝置的具體電路示意圖。其中,旁通開關為N通道空乏型金氧半場效電晶體(n-channel depletion-mode metal oxide semiconductor field effect transistor,NDMOSFET)。圖2A~2B的差異在於,開關控制電路的比較電路是否透過雙載子接面電晶體,切換旁通開關之導通或截止。2A-2B is a specific circuit diagram of an electronic control device of the LED light engine of FIG. 1A. The bypass switch is an N-channel depletion-mode metal oxide semiconductor field effect transistor (NDMOSFET). 2A-2B differ in whether the comparison circuit of the switch control circuit passes through the dual-carrier junction transistor, and the bypass switch is turned on or off.

圖3A~3B所示為依照圖1A之LED光引擎的電子控制裝置的另一具體電路示意圖。與圖2A~2B的差異在於,比較電路包括雙載子接面電晶體,以切換旁通開關之導通或截止。3A-3B are schematic diagrams showing another specific circuit of the electronic control device of the LED light engine of FIG. 1A. The difference from FIGS. 2A-2B is that the comparison circuit includes a bi-carrier junction transistor to switch the bypass switch on or off.

圖4A~圖4D繪示依照圖1A之LED光引擎的電子控制裝置,電流檢測電阻更包括共享電流感測與調變單元以達調光功能的具體實施方式。4A-4D illustrate an electronic control device of the LED light engine of FIG. 1A. The current detecting resistor further includes a shared current sensing and modulation unit to achieve a dimming function.

圖5A~5B所示為依照圖1A之LED光引擎的電子控制裝置的示意圖。與圖2A~2B的差異在於,旁通開關對應至N通道增強型金氧半場效電晶體(n-channel enhancement-mode metal oxide semiconductor field effect transistor,NEMOSFET)。圖5A~5B的差異在於,旁通開關是透過二極體或雙載子接面電晶體切換其導通或截止。5A-5B are schematic views of an electronic control unit of the LED light engine in accordance with FIG. 1A. The difference from FIGS. 2A to 2B is that the bypass switch corresponds to an n-channel enhancement-mode metal oxide semiconductor field effect transistor (NEMOSFET). The difference between Figures 5A and 5B is that the bypass switch is switched on or off by a diode or a bipolar junction transistor.

圖6A~6B所示為依照圖1A之LED光引擎的電子控制裝置的一具體電路示意圖。與圖5A~5B的差異在於,比較電路包括雙載子接面電晶體。6A-6B are schematic diagrams showing a specific circuit of an electronic control device of the LED light engine of FIG. 1A. The difference from FIGS. 5A to 5B is that the comparison circuit includes a bipolar junction transistor.

圖7A~7B所示為依照圖1A之LED光引擎的電子控制裝置的一具體電路示意圖。與圖5A、6B的差異在於,LED光引擎的電子控制裝置更包括一電壓調節器陣列,包括複數個電壓調節電路,用以穩定旁通開關之導通狀態。電壓調節器陣列適用於前述任一實施例之電路結構。7A-7B are schematic diagrams showing a specific circuit of an electronic control device of the LED light engine of FIG. 1A. The difference from FIG. 5A, FIG. 6B is that the electronic control device of the LED light engine further includes a voltage regulator array including a plurality of voltage regulating circuits for stabilizing the conduction state of the bypass switch. The voltage regulator array is suitable for the circuit structure of any of the foregoing embodiments.

圖8A~8G所示為依照圖1A之LED光引擎的電子控制裝置,更包括不同之線電壓調整率緊縮器的電路示意圖。8A-8G are schematic diagrams showing the electronic control device of the LED light engine of FIG. 1A, which further includes different line voltage regulation rate reducers.

圖9A及9B所示為不同實施例之線電壓調整率緊縮器設置前後,其輸入電壓、通過LED子陣列之電流相對於時間軸的波形比較圖。9A and 9B are graphs showing waveforms of the input voltage and the current through the LED sub-array relative to the time axis before and after the line voltage regulation rate tightener of the different embodiments are set.

圖10A所示為依照圖1A之LED光引擎的電子控制裝置的一實施例之電路示意圖。此LED光引擎的電子控制裝置包括複數個閃爍抑制電容與複數個二極體,各個閃爍抑制電容分別並聯於對應之外部LED子陣列,且各個二極體之陰極耦接至對應之外部LED子陣列的陽極。Figure 10A is a circuit diagram showing an embodiment of an electronic control unit of the LED light engine of Figure 1A. The electronic control device of the LED light engine includes a plurality of scintillation suppression capacitors and a plurality of diodes, each of which is respectively connected in parallel with the corresponding external LED sub-array, and the cathodes of the respective diodes are coupled to the corresponding external LEDs. The anode of the array.

圖10B所示為依照圖1A之LED光引擎的電子控制裝置的另一實施例之電路示意圖。此LED光引擎的電子控制裝置包括複數個閃爍抑制電容 與複數個二極體,各個閃爍抑制電容分別並聯於一個或多個串聯之對應的外部LED子陣列,且各個二極體之陰極耦接至對應之外部LED子陣列的陽極。Figure 10B is a circuit diagram showing another embodiment of an electronic control unit of the LED light engine of Figure 1A. The electronic control device of the LED light engine includes a plurality of flicker suppression capacitors And a plurality of diodes, each of the scintillation suppression capacitors is respectively connected in parallel with one or more corresponding external LED sub-arrays in series, and the cathodes of the respective diodes are coupled to the anodes of the corresponding external LED sub-arrays.

圖10C所示為圖10A或圖10B之閃爍抑制電容與二極體設置前後,其輸入電壓、輸入電流、通過LED子陣列之電流及光輸出強度相對於時間軸的波形比較圖。FIG. 10C is a graph showing the waveforms of the input voltage, the input current, the current through the LED sub-array, and the light output intensity with respect to the time axis before and after the setting of the scintillation suppression capacitor and the diode of FIG. 10A or FIG. 10B.

一般而言,交流電源之輸出電壓為正弦波形,經整流器整流後,以正弦波的前半週為週期的脈衝直流波形(pulsating DC waveform)之脈衝電壓,再應用於LED照明裝置。Generally, the output voltage of the AC power source is a sinusoidal waveform, and after being rectified by the rectifier, the pulse voltage of the pulsed DC waveform of the first half of the sine wave is applied to the LED lighting device.

每週期前半段之初與後半段之末的低電壓區段,輸入電壓無法克服LED的順向電壓降,無電流通過,形成空載時間。另,LED照明設備通常是由LED子陣列構成。當串聯之LED數量較多時,總順向電壓降提高,使得空載時間(dead time)變大,導通角變得更狹小,降低功率因數。At the beginning of the first half of each cycle and the low voltage section at the end of the second half, the input voltage cannot overcome the forward voltage drop of the LED, and no current flows, forming a dead time. In addition, LED lighting devices are typically constructed from LED sub-arrays. When the number of LEDs connected in series is large, the total forward voltage drop is increased, so that the dead time becomes larger, the conduction angle becomes narrower, and the power factor is lowered.

針對導通角狹小之問題,傳統的解決方式是利用功率因數修正器將整流後交流電壓推升至高於所有LED子陣列順向電壓降的總和的一直流電壓值。但,功率因數修正器所採用的電解電容器容易毀損,使得發光二極體無法發揮預期的效用。For the problem of narrow conduction angle, the conventional solution is to use a power factor corrector to push the rectified AC voltage to a DC voltage value that is higher than the sum of the forward voltage drops of all LED sub-arrays. However, the electrolytic capacitor used in the power factor corrector is easily damaged, so that the light-emitting diode cannot perform the intended effect.

本發明一實施例的點燈策略是將LED陣列,切割為數個LED子陣列(sub-array)。藉由旁通開關與開關控制電路所構成的LED光引擎的電子控制裝置,在一週期之前半週期,隨著輸入電壓升高,逐級點亮LED子陣列,且線電流逐步升高;在一週期之後半週期,隨著輸入電壓的降低,逐級熄滅LED子陣列,藉以提高導通角,並且修飾電流波形。A lighting strategy in accordance with an embodiment of the present invention is to cut an array of LEDs into a plurality of sub-arrays of LEDs. The electronic control device of the LED light engine formed by the bypass switch and the switch control circuit illuminates the LED sub-array step by step as the input voltage rises in the first half cycle of the cycle, and the line current is gradually increased; After a period of one cycle, as the input voltage decreases, the LED sub-array is extinguished step by step, thereby increasing the conduction angle and modifying the current waveform.

此外,可以藉由調整通過LED的電流,調整LED的亮度。亦即,當有多段的LED子陣列需要調光,可以分段調整各段LED子陣列的阻值,藉以改變各段LED子陣列通過的電流,來調整各段LED的亮度。然而,這樣的調光機制不容易實現在電路結構上,而且需要較高的製造成本以及製造難度。特別是當LED子陣列的段數越多時,電路的製造成本及困難度越高。因此,本發明一實施例的調光策略,即提供一簡化調光機制之可調光的LED光引擎的電子控制裝置,僅須利用電流感測電阻,即可達到分段調光的效果。In addition, the brightness of the LED can be adjusted by adjusting the current through the LED. That is, when there are multiple segments of the LED sub-array that need to be dimmed, the resistance values of the segments of the LED sub-arrays can be adjusted in stages, thereby changing the current through each segment of the LED sub-array to adjust the brightness of each segment of the LED. However, such a dimming mechanism is not easy to implement on a circuit structure, and requires high manufacturing cost and manufacturing difficulty. In particular, the more the number of segments of the LED sub-array, the higher the manufacturing cost and difficulty of the circuit. Therefore, the dimming strategy of an embodiment of the present invention, that is, an electronic control device for providing a dimmable LED light engine with a simplified dimming mechanism, can achieve the effect of segmental dimming only by using a current sensing resistor.

請參考圖1A,LED光引擎的電子控制裝置包括整流器100、電流調節器(current regulator)120、一旁通開關列(包括複數個旁通開關S1、S2及S3),一開關控制電路,包括比較電路150、152及154及一電流檢測電阻(current-sense resistor)160。比較電路150、152及154具有例如是三端的結構,可以是並聯調節器或雙載子接面電晶體,比較電路150、152及154各具有第一端、第二端及參考端。比較電路150、152及154的參考端分別透過防箝位電阻(anti-clamping resistor)Rx1、Rx2及Rx3耦接電流檢測電阻160,避免電流檢測電阻160兩端的跨壓被箝制(clamped)在比較電路154的參考電壓Vref,3 。比較電路150、152及154的第二端分別對應地控制旁通開關S1、S2及S3。除最後一級比較電路154之外,上級之比較電路(例如是比較電路150)的第一端透過一齊納二極體(例如是齊納二極體Zd1)耦接於下級比較電路(例如是比較電路152)的參考端。旁通開關S1、S2及S3例如是金氧半場效電晶體或接面場效電晶體。整流器100用以連接一外部交流電壓源,提供一直流脈衝電壓。電流調節器(current regulator)120耦接外部LED陣列G,外部LED陣列G包括外部LED子陣列G1~G4。Referring to FIG. 1A, the electronic control device of the LED light engine includes a rectifier 100, a current regulator 120, a bypass switch column (including a plurality of bypass switches S1, S2, and S3), and a switch control circuit including comparison. Circuits 150, 152 and 154 and a current-sense resistor 160. The comparison circuits 150, 152, and 154 have, for example, a three-terminal structure, which may be a shunt regulator or a bi-carrier junction transistor, and the comparison circuits 150, 152, and 154 each have a first end, a second end, and a reference end. The reference terminals of the comparison circuits 150, 152, and 154 are respectively coupled to the current detecting resistor 160 through anti-clamping resistors Rx1, Rx2, and Rx3, so as to prevent the voltage across the current detecting resistor 160 from being clamped in comparison. The reference voltage Vref, 3 of the circuit 154. The second ends of the comparison circuits 150, 152, and 154 respectively control the bypass switches S1, S2, and S3. In addition to the last stage comparison circuit 154, the first end of the comparison circuit (eg, comparison circuit 150) of the upper stage is coupled to the lower stage comparison circuit through a Zener diode (eg, Zener diode Zd1) (eg, for comparison) Reference end of circuit 152). The bypass switches S1, S2, and S3 are, for example, gold oxide half field effect transistors or junction field effect transistors. The rectifier 100 is used to connect an external AC voltage source to provide a DC pulse voltage. A current regulator 120 is coupled to the external LED array G, and the external LED array G includes external LED sub-arrays G1 G G4.

於此說明比較電路150、152及154的作用機制。於實施例中,假設比較電路150、152及154具有實質上相同的基準電壓Vref,1 =Vref,2 =Vref,3 =Vref,且齊納二極體Zd1及Zd2具有實質上相同的崩潰電壓Vz,1 =Vz,2 =Vz。比較電路154比較其參考電壓(即,基準電壓Vref)與檢測電阻160兩端的跨壓;比較電路152比較其參考電壓(比較電路154及152的基準電壓與齊納二極體Zd2的崩潰電壓之和,即,2Vref+Vz)與檢測電阻160兩端的跨壓;比較電路150比較其參考電壓(比較電路154、152及150的基準電壓與齊納二極體Zd2及Zd1的崩潰電壓之和,即,3Vref+2Vz)與檢測電阻160兩端的跨壓。基準電壓Vref,1 、Vref,2 及Vref,3 皆為大於0的正值(Vref,1 ,Vref,2 ,Vref,3 >0),且基準電壓Vref,1 、Vref,2 及Vref,3 可以彼此相等(皆為Vref)或不相等,齊納二極體Zd1及Zd2的崩潰電壓Vz,1及Vz,2皆為大於或等於0的正值(Vz,1,Vz,2≧0),表示齊納二極體Zd1或Zd2係選擇性地連接,且Vz,1及Vz,2可以彼此相等(皆為Vz)或不相等,並不作限制。當比較電路150、152或154的參考端所接收的電壓大於其參考電壓,比較電路150、152或154導通。當比較電路150、152或154的參考端所接收的電壓小於其參考電壓,比較電路150、152或154截止。藉由比較電路150、152或154的導通或截止,可以對應地控制旁通開關的截止或導通。只要基準電壓Vref,1 、Vref,2 及Vref,3 皆為大於0的正值(Vref,1 ,Vref,2 ,Vref,3 >0)而且齊納二極體Zd1及Zd2的崩潰電壓Vz,1及Vz,2皆為大於或等於0的正值(Vz,1,Vz,2≧0),必然滿足下列一般不等式Vref,1+Vref,2+Vref,3+Vz,1+Vz,2>Vref,1+Vref,2+Vz,2>Vref,1,得以順利逐級點亮或逐級熄滅LED子陣列。The mechanism of action of the comparison circuits 150, 152, and 154 is described herein. In the embodiment, it is assumed that the comparison circuits 150, 152 and 154 have substantially the same reference voltage Vref, 1 = Vref, 2 = Vref, 3 = Vref, and the Zener diodes Zd1 and Zd2 have substantially the same breakdown voltage. Vz, 1 = Vz, 2 = Vz. The comparison circuit 154 compares its reference voltage (ie, the reference voltage Vref) with the voltage across the sense resistor 160; the comparison circuit 152 compares its reference voltage (the reference voltage of the comparison circuits 154 and 152 with the breakdown voltage of the Zener diode Zd2). And, that is, 2Vref+Vz) and the voltage across the sense resistor 160; the comparison circuit 150 compares the reference voltage (the sum of the reference voltages of the comparison circuits 154, 152, and 150 and the breakdown voltages of the Zener diodes Zd2 and Zd1, That is, 3Vref+2Vz) and the voltage across the sense resistor 160. The reference voltages Vref, 1 , Vref, 2 and Vref, 3 are positive values (Vref, 1 , Vref, 2 , Vref, 3 > 0) greater than 0, and the reference voltages Vref, 1 , Vref, 2 and Vref, 3 Can be equal to each other (both Vref) or unequal, and the breakdown voltages Vz,1 and Vz,2 of the Zener diodes Zd1 and Zd2 are positive values greater than or equal to 0 (Vz,1,Vz,2≧0) , indicating that the Zener diode Zd1 or Zd2 is selectively connected, and Vz, 1 and Vz, 2 may be equal to each other (all are Vz) or unequal, and are not limited. When the voltage received by the reference terminal of the comparison circuit 150, 152 or 154 is greater than its reference voltage, the comparison circuit 150, 152 or 154 is turned "on". When the voltage received by the reference terminal of the comparison circuit 150, 152 or 154 is less than its reference voltage, the comparison circuit 150, 152 or 154 is turned off. By turning on or off the comparison circuit 150, 152 or 154, the turn-off or conduction of the bypass switch can be controlled correspondingly. As long as the reference voltages Vref, 1 , Vref, 2 and Vref, 3 are positive values greater than 0 (Vref, 1 , Vref, 2 , Vref, 3 > 0) and the breakdown voltages Vz of the Zener diodes Zd1 and Zd2, 1 and Vz, 2 are positive values (Vz, 1, Vz, 2≧0) greater than or equal to 0, which necessarily satisfy the following general inequalities Vref, 1+Vref, 2+Vref, 3+Vz, 1+Vz, 2 >Vref, 1+Vref, 2+Vz, 2>Vref,1, to smoothly illuminate the LED sub-array step by step or step by step.

於一實施例中,比較電路150、152及154例如是並聯調節器或雙載子接面電晶體。比較電路150、152及154的參考極分別透過防箝位電阻 Rx1、Rx2及Rx3,偵測電流檢測電阻160兩端的跨壓,使得比較電路對應地導通或截止,藉以控制旁通開關S1~S3的操作狀態。In one embodiment, the comparison circuits 150, 152, and 154 are, for example, shunt regulators or bipolar junction transistors. The reference poles of the comparison circuits 150, 152 and 154 respectively pass through the anti-clamp resistor Rx1, Rx2 and Rx3 detect the voltage across the current detecting resistor 160, so that the comparison circuit is turned on or off correspondingly, thereby controlling the operating states of the bypass switches S1 to S3.

以下說明點亮或熄滅LED子陣列的原理。於正半周之輸入電壓的上半週期,輸入電壓(vi)由零逐漸升高。當輸入電壓尚未克服最後一級LED子陣列的順向電壓降(vi<VG4 ),無電流通過LED子陣列G4的迴路,比較電路154未能產生電壓控制信號,旁通開關S1、S2及S3維持初始狀態(舉例來說,若為空乏型電晶體則初始狀態為導通態)。隨著輸入電壓升高至克服最後一級LED子陣列G4的順向電壓降(vi>VG4 ),但尚未克服最後二級的LED子陣列G4及G3的順向電壓降之和(vi<VG3 +VG4 ),電流經旁通開關S1~S3點亮LED子陣列G4,並通過電流檢測電阻160,電流檢測電阻160兩端的跨壓達到比較電路154之參考電壓,使比較電路154導通,旁通開關S3截止,隨後,通過電流檢測電阻160的電流下降,使比較電路154截止,旁通開關S3又導通,此階段內,旁通開關S3快速切換導通與截止狀態,稱為調節態(Regulating state),藉以調控通過LED子陣列G4的電流為I1。此時,旁通開關S1及S2均為導通態。The following describes the principle of lighting or extinguishing the LED sub-array. During the first half of the input voltage during the positive half cycle, the input voltage (vi) gradually increases from zero. When the input voltage has not overcome the forward voltage drop of the last stage LED sub-array (vi < V G4 ), no current flows through the loop of the LED sub-array G4, the comparison circuit 154 fails to generate a voltage control signal, and the bypass switches S1, S2, and S3 The initial state is maintained (for example, if it is a depleted transistor, the initial state is an on state). As the input voltage rises to overcome the forward voltage drop of the final stage LED sub-array G4 (vi > V G4 ), but has not overcome the sum of the forward voltage drops of the final secondary LED sub-arrays G4 and G3 (vi < V G3 +V G4 ), the current is lit by the bypass switch S1~S3 to the LED sub-array G4, and passes through the current detecting resistor 160, and the voltage across the current detecting resistor 160 reaches the reference voltage of the comparing circuit 154, so that the comparing circuit 154 is turned on. The bypass switch S3 is turned off, and then, the current through the current detecting resistor 160 is lowered, the comparison circuit 154 is turned off, and the bypass switch S3 is turned on again. In this stage, the bypass switch S3 quickly switches between the on and off states, which is called an adjustment state ( Regulating state), whereby the current through the LED sub-array G4 is regulated to be I1. At this time, the bypass switches S1 and S2 are all in an on state.

電壓繼續升高至克服最後二級LED子陣列G3及G4以下之順向電壓降(VG3 +VG4 ),旁通開關S2原為導通態,電流經旁通開關S1、S2至LED子陣列G3及LED子陣列G4,隨即比較電路152偵測電流檢測電阻160兩端的跨壓,產生電壓控制信號而截止旁通開關S2,使此階段內旁通開關S2保持調節態(快速地切換導通與截止狀態),藉以調控通過LED子陣列G3及G4的電流為I2。此時,旁通開關S1維持導通態,比較電路154偵測電流檢測電阻160兩端的跨壓,產生電壓控制信號而恆截止旁通開關S3,使旁通開關S3轉為截止態。The voltage continues to rise to overcome the forward voltage drop (V G3 +V G4 ) below the final secondary LED sub-arrays G3 and G4, the bypass switch S2 is originally in an on state, and the current passes through the bypass switches S1, S2 to the LED sub-array G3 and LED sub-array G4, then the comparison circuit 152 detects the voltage across the current detecting resistor 160, generates a voltage control signal and turns off the bypass switch S2, so that the bypass switch S2 maintains the regulated state during this phase (fast switching between conduction and The off state) is used to regulate the current through the LED sub-arrays G3 and G4 to be I2. At this time, the bypass switch S1 maintains the on state, and the comparison circuit 154 detects the voltage across the current detecting resistor 160, generates a voltage control signal, and constantly turns off the bypass switch S3 to turn the bypass switch S3 into the off state.

當輸入電壓持續上升至克服LED子陣列G2以下之順向電壓降(VG2 +VG3 +VG4 ),旁通開關S1原為導通態,電流經旁通開關S1至LED子陣列G2、LED子陣列G3至LED子陣列G4,比較電路150偵測電流檢測電阻160兩端的跨壓,產生電壓控制信號而截止旁通開關S1,使此階段內旁通開關S1保持調節態(快速地切換導通與截止狀態),藉以調控通過LED子陣列G2、G3及G4的電流為I3。並且,比較電路152及比較電路154偵測電流檢測電阻160兩端的跨壓後,也分別使旁通開關S2及旁通開關S3恆截止。When the input voltage continues to rise to overcome the forward voltage drop (V G2 + V G3 + V G4 ) below the LED sub-array G2, the bypass switch S1 is originally in an on state, and the current passes through the bypass switch S1 to the LED sub-array G2, LED The sub-array G3 to the LED sub-array G4, the comparison circuit 150 detects the voltage across the current detecting resistor 160, generates a voltage control signal, and turns off the bypass switch S1, so that the bypass switch S1 maintains the regulated state during this phase (fast switching conduction) And the off state), thereby regulating the current through the LED sub-arrays G2, G3, and G4 to be I3. Further, after the comparison circuit 152 and the comparison circuit 154 detect the voltage across the current detecting resistor 160, the bypass switch S2 and the bypass switch S3 are also constantly turned off.

直到輸入電壓上升至克服LED子陣列G1以下之順向電壓降(VG1 +VG2 +VG3 +VG4 ),此時,比較電路150偵測電流檢測電阻160兩端的跨壓,產生電壓控制信號而截止旁通開關S1,受到整流器100整流後的電流,經電流調節電路120調控為I4以直接供應至LED陣列G,以點亮LED子陣列G1至LED子陣列G4。此階段內,比較電路150、比較電路152及比較電路154分別使旁通開關S1~S3保持截止狀態。根據上述方式,LED光引擎的電子控制裝置,可依據一週期前半之輸入電壓的上升,由LED子陣列G4朝向LED子陣列G1的方向,逐級點亮LED子陣列。Until the input voltage rises to overcome the forward voltage drop (V G1 + V G2 + V G3 + V G4 ) below the LED sub-array G1, at this time, the comparison circuit 150 detects the voltage across the current detecting resistor 160 to generate voltage control. The signal is turned off the bypass switch S1, and the current rectified by the rectifier 100 is regulated by the current regulating circuit 120 to be I4 to be directly supplied to the LED array G to illuminate the LED sub-array G1 to the LED sub-array G4. At this stage, the comparison circuit 150, the comparison circuit 152, and the comparison circuit 154 keep the bypass switches S1 to S3 in an off state. According to the above manner, the electronic control unit of the LED light engine can illuminate the LED sub-array step by step in the direction of the LED sub-array G4 toward the LED sub-array G1 according to the rise of the input voltage in the first half of the cycle.

於正半周之輸入電壓的下半週期,輸入電壓逐漸下降。當輸入電壓(vi)繼續下降至無法克服LED子陣列G1以下的順向電壓(vi<VG1 +VG2 +VG3 +VG4 ),但仍能克服LED子陣列G2以下的順向電壓(vi>VG2 +VG3 +VG4 )時,電流檢測電阻160兩端的跨壓不足以使比較電路150導通,旁通開關S1未接收比較電路150的調控訊號而由截止態切換回導通態。接著,輸入電流微幅上升,比較電路150透過防箝位電阻Rx1偵測電流檢測電阻160兩端的跨壓後又導通,使旁通開關S1截止。旁通開關S1如此迅速地切換於導通與截止之間而進入調節態,藉以調控通過LED子陣列G2、G3及G4的迴路電流為I3。此時,旁通開關S2及旁通開關S3仍為截止 態。同樣地,當輸入電壓繼續下降至無法克服LED子陣列G2以下的順向電壓降,但仍能克服LED子陣列G3以下的順向電壓降時(VG3 +VG4 <vi<VG2 +VG3 +VG4 ),比較電路152將旁通開關S2由截止態切換為導通態,隨後電流上升,比較電路152導通,使旁通開關S2又截止,旁通開關S2切換於截止與導通間而進入調節態。此時,比較電路152控制旁通開關S2不斷切換截止與導通狀態而進入調節態,藉以調控通過點亮的LED子陣列G3及G4的迴路電流為I2。During the second half of the input voltage during the positive half cycle, the input voltage gradually decreases. When the input voltage (vi) continues to fall to the inability to overcome the forward voltage below the LED sub-array G1 (vi < V G1 + V G2 + V G3 + V G4 ), the forward voltage below the LED sub-array G2 can still be overcome ( When vi>V G2 +V G3 +V G4 ), the voltage across the current detecting resistor 160 is insufficient to turn on the comparison circuit 150, and the bypass switch S1 does not receive the regulation signal of the comparison circuit 150 and is switched back to the on state from the off state. Then, the input current is slightly increased, and the comparison circuit 150 detects the voltage across the current detecting resistor 160 through the anti-clamping resistor Rx1 and then turns on, so that the bypass switch S1 is turned off. The bypass switch S1 switches between on and off and enters the regulation state so as to regulate the loop current through the LED sub-arrays G2, G3, and G4 to be I3. At this time, the bypass switch S2 and the bypass switch S3 are still in the off state. Similarly, when the input voltage continues to drop to overcome the forward voltage drop below the LED sub-array G2, it still overcomes the forward voltage drop below the LED sub-array G3 (V G3 + V G4 <vi < V G2 + V G3 + V G4 ), the comparison circuit 152 switches the bypass switch S2 from the off state to the on state, then the current rises, the comparison circuit 152 is turned on, the bypass switch S2 is turned off again, and the bypass switch S2 is switched between the off and the conduction. Enter the adjustment state. At this time, the comparison circuit 152 controls the bypass switch S2 to continuously switch the off and on states to enter the regulation state, thereby regulating the loop current of the LED sub-arrays G3 and G4 that are lit by being I2.

以此方式,比較電路154、152及150分別偵測電流檢測電阻160兩端的跨壓後,與比較電路154、152及150之參考電壓作比較(比較電路154、152及150之參考電壓已經定義於前),由LED子陣列G1朝向LED子陣列G4的方向,逐級熄滅LED子陣列直至週期結束,然後重新一個週期,如此循環。In this manner, the comparison circuits 154, 152, and 150 respectively detect the voltage across the current sense resistor 160 and compare with the reference voltages of the comparison circuits 154, 152, and 150 (the reference voltages of the comparison circuits 154, 152, and 150 have been defined). Previously, the LED sub-array is extinguished step by step from the LED sub-array G1 toward the LED sub-array G4 until the end of the cycle, and then one cycle is repeated, and thus cycles.

圖1B所示為另一種LED光引擎的電子控制裝置之電路架構的示意圖。與圖1A的差異在於,LED光引擎的電子控制裝置不包括電流調節器。比較電路156、比較電路154、比較電路152及比較電路150偵測電流檢測電阻160兩端跨壓的電壓值,藉以調控旁通開關S3、旁通開關S2、旁通開關S1及旁通開關S0的狀態,以提供點亮LED子陣列G4之固定電流I1,點亮LED子陣列G3~G4為固定電流I2,點亮LED子陣列G2~G4為固定電流I3,點亮LED子陣列G1~G4為固定電流I4。電流調節器120的有無,會影響比較電路的數量,而上述元件的數量係於說明書中為方便說明所作之例示,並不用於限定本發明。FIG. 1B is a schematic diagram showing the circuit architecture of an electronic control unit of another LED light engine. The difference from FIG. 1A is that the electronic control unit of the LED light engine does not include a current regulator. The comparison circuit 156, the comparison circuit 154, the comparison circuit 152, and the comparison circuit 150 detect the voltage value across the voltage across the current detecting resistor 160, thereby regulating the bypass switch S3, the bypass switch S2, the bypass switch S1, and the bypass switch S0. The state is to provide a fixed current I1 for lighting the LED sub-array G4, to illuminate the LED sub-arrays G3 to G4 to be a fixed current I2, to illuminate the LED sub-arrays G2 to G4 to be a fixed current I3, to illuminate the LED sub-arrays G1 to G4 Is the fixed current I4. The presence or absence of the current regulator 120 affects the number of comparison circuits, and the number of the above elements is exemplified in the specification for convenience of explanation and is not intended to limit the present invention.

圖2A所示實施例為依照圖1A之LED光引擎的電子控制裝置的一具體電路示意圖。電流調節器120包括電晶體開關M(例如為金氧半場效電晶體)、啟動電阻Ra、並聯調節器X(或雙載子電晶體)與偵測電阻Rx。 電流調節器120可用以調整輸入電流波形成類正弦的波或步階波的波形,有效地提升功率因數。並聯調節器X1、X2及X3對應至圖1A之比較電路150、比較電路152及比較電路154,並聯調節器X1、X2及X3分別用以依據其參考端接收的電壓與各比較電路之參考電壓作比較,切換旁通開關S10、S20及S30的操作狀態。旁通開關對應至N通道空乏型金氧半場效電晶體(n-channel depletion-mode metal oxide semiconductor field effect transistor,NDMOSFET)。The embodiment shown in FIG. 2A is a specific circuit diagram of the electronic control device of the LED light engine of FIG. 1A. The current regulator 120 includes a transistor switch M (for example, a gold oxide half field effect transistor), a starting resistor Ra, a shunt regulator X (or a bipolar transistor), and a detecting resistor Rx. The current regulator 120 can be used to adjust the input current wave to form a sinusoidal wave or a waveform of the step wave, effectively increasing the power factor. The shunt regulators X1, X2 and X3 correspond to the comparison circuit 150, the comparison circuit 152 and the comparison circuit 154 of FIG. 1A, and the shunt regulators X1, X2 and X3 are respectively used for the voltage received by the reference terminal and the reference voltage of each comparison circuit. For comparison, the operational states of the bypass switches S10, S20, and S30 are switched. The bypass switch corresponds to an N-channel depletion-mode metal oxide semiconductor field effect transistor (NDMOSFET).

於一實施例中,並聯調節器X1、X2及X3可以為具有相同的基準電壓之電壓比較器,即,Vref,X1 =Vref,X2 =Vref,X3 =Vref。然,各並聯調節器X1、X2及X3的參考電壓不相同,分別為其基準電壓加上其陽極端的端電壓。舉例來說,並聯調節器X1的參考電壓為並聯調節器X1、X2及X3的基準電壓與齊納二極體Zd2及Zd1的崩潰電壓之和,即,3Vref+2Vz (假設齊納二極體Zd2及Zd1的崩潰電壓皆為Vz),並聯調節器X2的參考電壓為並聯調節X2及X3的基準電壓與齊納二極體Zd2的崩潰電壓之和,即,2Vref+Vz ,並聯調節器X3的參考電壓為並聯調節X3的基準電壓,即,Vref,X3 。當然,於某些實施例中,也可以依照需求使用具有不同的基準電壓之電壓比較器作為並聯調節器X1、X2及X3。In one embodiment, the shunt regulators X1, X2, and X3 can be voltage comparators having the same reference voltage, ie, Vref, X1 = Vref, X2 = Vref, X3 = Vref. However, the reference voltages of the shunt regulators X1, X2, and X3 are different, and their reference voltages are respectively added to the terminal voltages of the anode terminals. For example, the reference voltage of the shunt regulator X1 is the sum of the reference voltages of the shunt regulators X1, X2, and X3 and the breakdown voltages of the Zener diodes Zd2 and Zd1, that is, 3Vref+2V z (assuming Zener diodes) The breakdown voltages of the bodies Zd2 and Zd1 are both Vz), and the reference voltage of the shunt regulator X2 is the sum of the reference voltages of the parallel adjustment X2 and X3 and the breakdown voltage of the Zener diode Zd2, that is, 2Vref+V z , parallel adjustment The reference voltage of the device X3 is the reference voltage of the parallel adjustment X3, that is, Vref, X3 . Of course, in some embodiments, voltage comparators having different reference voltages can also be used as shunt regulators X1, X2, and X3 as needed.

於此實施例中,旁通開關S10~S30係常閉開關(normally closed switches),例如為N通道空乏型金氧半場效電晶體(n-channel depletion-mode metal oxide semiconductor field effect transistor,NDMOSFET),其在閘源極間的電位差為零或不受電壓時(VGS ≧0)導通,而在閘源極間的電位差為接受足夠負的電壓(VGS <Vth<0,Vth表示電晶體的截止電壓)時,通道截止。In this embodiment, the bypass switches S10 to S30 are normally closed switches, for example, an N-channel depletion-mode metal oxide semiconductor field effect transistor (NDMOSFET). When the potential difference between the gate and the source is zero or is not subjected to voltage (V GS ≧0), the potential difference between the gate and the source is to receive a sufficiently negative voltage (V GS <Vth<0, Vth denotes a transistor) When the cutoff voltage is), the channel is cut off.

於實施例中,正弦電壓補償器(例如係串聯電阻R1與R2)為選擇性地設置。首先,考慮電阻R1的值近似於無限大,且電阻R2的值近似於 0,亦即,電阻R1斷路且電阻R2短路的情況。於輸入電壓的上半周期,隨著輸入電壓(線電壓)上升,點亮的LED子陣列的級數也增多。假設最後一級之LED子陣列G4被點亮時,通過LED子陣列G4之電流為I1,倒數二級之LED子陣列G4及G3皆被點亮時,通過LED子陣列G4及G3之電流為I2,後三級LED子陣列G4、G3及G2皆被點亮時,通過LED子陣列G4、G3及G2之電流為I3,全部LED子陣列G4、G3、G2及G1皆點亮時,通過LED陣列G之電流為I4(電流I4>電流I3>電流I2>電流I1),電流受到電流調節器120與開關控制電路的調節而以固定電流輸出,電流I1、電流I2、電流I3及電流I4呈現類正弦(Quasi-sinusoidal wave)步階波形。In an embodiment, a sinusoidal voltage compensator (eg, series resistors R1 and R2) is selectively provided. First, consider that the value of the resistor R1 is approximately infinite, and the value of the resistor R2 is similar to 0, that is, the case where the resistor R1 is open and the resistor R2 is short-circuited. During the first half of the input voltage, as the input voltage (line voltage) rises, the number of stages of the lit LED sub-array increases. Assuming that the LED sub-array G4 of the last stage is illuminated, the current through the LED sub-array G4 is I1, and the currents of the sub-level two sub-arrays G4 and G3 are illuminated, the current through the LED sub-arrays G4 and G3 is I2, when the rear three-level LED sub-arrays G4, G3, and G2 are all lit, the current through the LED sub-arrays G4, G3, and G2 is I3, and all the LED sub-arrays G4, G3, G2, and G1 are lit, The current of the LED array G is I4 (current I4>current I3>current I2>current I1), and the current is regulated by the current regulator 120 and the switch control circuit to output at a fixed current, current I1, current I2, current I3, and current I4. Presents a sinusoidal (Quasi-sinusoidal wave) step waveform.

電流檢測電阻160設置在LED陣列G的電流迴路中。假設忽略輸入至比較電路的微弱電流,則通過LED子陣列之電流會約略等同於通過電流檢測電阻160之電流。因此,輸入電流的大小與電流檢測電阻160兩端的電壓有關,用以對應地調控並聯調節器X1~X3的導通或截止。並聯調節器X1~X3分別透過防箝位電阻Rx1~Rx3耦接至電流檢測電阻160的高壓端,防箝位電阻Rx1~Rx3用以避免當通過LED子陣列的電流ILED 大於電流I1、電流I2或電流I3,分別使得並聯調節器X3、X2或X1之參考端的電壓位準可能被箝制(being clamped)在基準電壓Vref,造成電流檢測電阻160的跨壓被牽制於此基準電壓,進而遏止通過LED子陣列電流之消長。The current detecting resistor 160 is disposed in the current loop of the LED array G. Assuming that the weak current input to the comparison circuit is ignored, the current through the LED sub-array will be approximately equivalent to the current through the current sense resistor 160. Therefore, the magnitude of the input current is related to the voltage across the current detecting resistor 160 to correspondingly regulate the turn-on or turn-off of the shunt regulators X1 to X3. The shunt regulators X1~X3 are respectively coupled to the high voltage end of the current detecting resistor 160 through the anti-clamping resistors Rx1~Rx3, and the anti-clamping resistors Rx1~Rx3 are used to avoid the current I LED passing through the LED sub-array being greater than the current I1 and current. I2 or current I3, respectively, may cause the voltage level of the reference terminal of the shunt regulator X3, X2 or X1 to be clamped at the reference voltage Vref, causing the voltage across the current detecting resistor 160 to be pinned to the reference voltage, thereby suppressing The current through the LED sub-array is rampant.

於輸入電壓的上半週期,輸入電壓逐漸上升。當輸入電壓克服LED子陣列G4的順向電壓降VG4 ,但尚未克服LED子陣列G3及G4的順向電壓降(VG4 +VG3 ),電流I1通過旁通開關S10~S30至LED子陣列G4,並經電流檢測電阻160而產生跨壓V 160 =I 1×(R 160),假設忽略防箝位電阻Rx3的影響,設計此時電流檢測電阻160產生跨壓V160 略大於並聯調節器X3之基準電壓Vref,X3 ,使並聯調節器X3導通,旁通開關S30之閘源極電位透過電阻Rz3及 Rg3經過並聯調節器X3而被拉低(pulled low)至負準位而截止,隨後輸入電流下降,並聯調節器X3截止,旁通開關S30又導通,旁通開關S30快速地切換於截止態與導通態之間,定義此狀態為調節態,以將通過最後一級LED子陣列G4之電流維持在電流I1。During the first half of the input voltage, the input voltage gradually rises. When the input voltage overcomes the forward voltage drop V G4 of the LED sub-array G4 , but has not overcome the forward voltage drop (V G4 + V G3 ) of the LED sub-arrays G3 and G4, the current I1 passes through the bypass switch S10~S30 to the LED sub- The array G4 is generated by the current detecting resistor 160 and the voltage across the voltage V 160 = I 1 × ( R 160). Assuming that the influence of the anti-clamping resistor Rx3 is ignored, the current detecting resistor 160 is designed to generate a voltage across the voltage V 160 which is slightly larger than the parallel adjustment. The reference voltage Vref, X3 of the device X3 turns on the parallel regulator X3, and the gate potential of the bypass switch S30 is turned off by the parallel regulator X3 through the shunt regulator X3 and is pulled low to the negative level. Then, the input current drops, the shunt regulator X3 is turned off, the bypass switch S30 is turned on again, and the bypass switch S30 is quickly switched between the off state and the on state, and the state is defined as an adjustment state to pass the last stage LED sub-array G4. The current is maintained at current I1.

隨著輸入電壓克服倒數第一、二級LED子陣列G4及G3之順向電壓(VG4 +VG3 ),但尚未克服倒數第一、二、三級LED子陣列G4、G3及G2之順向電壓降(VG4 +VG3 +VG2 ),電流I2(I2>I1)由旁通開關S10及S20流至LED子陣列G3及G4,此時,電流檢測電阻160之跨壓V160 略大於並聯調節器X2之基準電壓Vref,X2 ,使並聯調節器X2快速地切換於導通與截止之間。旁通開關S20受到並聯調節器X2的控制而對應地操作於調節態,以將通過點亮之LED子陣列之電流維持在電流I2。同時,電流檢測電阻160的跨壓V160 大於並聯調節器X3的參考電壓,故並聯調節器X3恆導通,旁通開關S30恆截止,旁通開關S30之閘源極間所施加的負電位,可近似於最後一級LED子陣列G4之順向電壓降與電流檢測電阻160跨壓之和(VG4 +V160 )經過電阻Rz3及Rg3的分壓。As the input voltage overcomes the forward voltage (V G4 +V G3 ) of the first and second LED sub-arrays G4 and G3, but has not overcome the backwards of the first, second and third LED sub-arrays G4, G3 and G2 the voltage drop (V G4 + V G3 + V G2), the current I2 (I2> I1) switches S10 and S20 by the bypass flow to the LED sub-array G3 and G4, at this time, the voltage across the current detecting resistor of the slightly V 160 160 The reference voltage Vref, X2 , which is greater than the shunt regulator X2 , causes the shunt regulator X2 to quickly switch between on and off. The bypass switch S20 is controlled by the shunt regulator X2 to operate in an adjusted state to maintain the current through the illuminated LED sub-array at current I2. At the same time, the voltage across the voltage detecting resistor 160 V 160 is greater than the reference voltage of the shunt regulator X3, so the shunt regulator X3 is always turned on, the bypass switch S30 is always turned off, and the negative potential applied between the gate and the source of the bypass switch S30, It can be approximated by the sum of the forward voltage drop of the last stage LED sub-array G4 and the voltage across the current sense resistor 160 (V G4 + V 160 ) through the resistors Rz3 and Rg3.

當輸入電壓介於後三級LED子陣列G4、G3及G2之順向電壓降(VG4 +VG3 +VG2 )與後四級LED子陣列G4、G3、G2及G1之順向電壓降(VG4 +VG3 +VG2 +VG1 )間,電流檢測電阻160之跨壓V160 略大於並聯調節器X1之基準電壓Vref,X1 ,旁通開關S10進入調節態,以將通過最後一級LED子陣列G4之電流維持在電流I3。同時,旁通開關S20之閘源極電位透過電阻Rz2及Rg2,受到並聯調節器X2被拉低至負準位而截止,此負準位可近似於LED子陣列G4及G3之順向電壓降與電流檢測電阻160之跨壓之和(VG4 +VG3 +V160 )經電阻Rz2及電阻Rg2的分壓。旁通開關S10之閘源極電位透過電阻Rz1及Rg1,受到並聯調節器X1被拉低至負準位而截止,此負準位 可近似於LED子陣列G2~G4之順向電壓降與電流檢測電阻160跨壓之和(VG4 +VG3 +VG2 +V160 )經電阻Rz3及電阻Rg3的分壓。When the input voltage is between the forward voltage drop of the last three LED sub-arrays G4, G3, and G2 (V G4 + V G3 + V G2 ) and the forward voltage drop of the last four LED sub-arrays G4, G3, G2, and G1 Between (V G4 +V G3 +V G2 +V G1 ), the voltage across the voltage detecting resistor 160 V 160 is slightly larger than the reference voltage Vref of the shunt regulator X1, X1 , and the bypass switch S10 enters the regulation state to pass the last stage. The current of the LED sub-array G4 is maintained at current I3. At the same time, the gate potential of the bypass switch S20 is transmitted through the resistors Rz2 and Rg2, and is cut off by the shunt regulator X2 being pulled to the negative level. The negative level can be approximated by the forward voltage drop of the LED sub-arrays G4 and G3. The sum of the voltages across the current detecting resistor 160 (V G4 + V G3 + V 160 ) is divided by the resistor Rz2 and the resistor Rg2. The gate potential of the bypass switch S10 is transmitted through the resistors Rz1 and Rg1, and is cut off by the shunt regulator X1 being pulled to the negative level. The negative level can be approximated by the forward voltage drop and current of the LED sub-arrays G2 G4. The sum of the voltage across the voltage across the sense resistor (V G4 + V G3 + V G2 + V 160 ) is divided by the resistor Rz3 and the resistor Rg3.

以此類推,直到輸入電壓克服後四級LED子陣列G4、G3、G2及G1之順向電壓降(VG4 +VG3 +VG2 +VG1 ),電流調節器120提供定電流I4至所有 的LED子陣列G1~G4,且電流(Vref , X 為並聯調節器X的基準電壓)。由於電流I4>電流I3>電流I2>電流I1,故電流I4於電流檢測電阻160跨壓,必然使並聯調節器X1、X2及X3導通,旁通開關S10、S20及S30截止。此時,部份輸入電流直接由電流調節器120提供至LED陣列G,輸入電流經啟動電阻Ra對金氧半場效電晶體M之閘源極間的電容充電,以導通金氧半場效電晶體M,使電流I4經金氧半場效電晶體M通過電阻Rx供應至LED陣列G。同時,並聯調節器X偵測電阻Rx兩端的電壓而切換於截止與導通間,使得金氧半場效電晶體M對應地操作於調節態,以將通過所有LED子陣列G1~G4之電流維持在電流I4。電流調節器120之內部電路僅為示意,並聯調節器X可以雙載子接面電晶體取代,金氧半場效電晶體M可為增強型或空乏型金氧半場效電晶體,並不作特別限制。And so on, until the input voltage overcomes the forward voltage drop (V G4 + V G3 + V G2 + V G1 ) of the last four LED sub-arrays G4, G3, G2 and G1, the current regulator 120 provides a constant current I4 to all LED sub-array G1~G4, and current ( Vref , X is the reference voltage of shunt regulator X). Since the current I4>the current I3>the current I2>the current I1, the current I4 crosses the voltage across the current detecting resistor 160, and the parallel regulators X1, X2, and X3 are inevitably turned on, and the bypass switches S10, S20, and S30 are turned off. At this time, part of the input current is directly supplied from the current regulator 120 to the LED array G, and the input current is charged to the capacitance between the gate and the source of the MOSFET by the starting resistor Ra to turn on the MOSFET. M, the current I4 is supplied to the LED array G through the resistor Rx via the MOS field-effect transistor M. At the same time, the shunt regulator X detects the voltage across the resistor Rx and switches between the off and the on, so that the metal oxide half field effect transistor M operates correspondingly in the regulated state to maintain the current through all the LED sub-arrays G1 G G4 Current I4. The internal circuit of the current regulator 120 is only an illustration, the parallel regulator X can be replaced by a double carrier junction transistor, and the gold oxide half field effect transistor M can be an enhanced or depleted metal oxide half field effect transistor, and is not particularly limited. .

於輸入電壓的下半週期,輸入電壓逐漸下降。藉由並聯調節器X1、X2或X3偵測電流檢測電阻160之跨壓後,分別與並聯調節器X1、X2或X3之參考電壓比較而切換於導通或截止,控制電阻Rz1及電阻Rg1、電阻Rz2及電阻Rg2、電阻Rz3或電阻Rg3的迴路形成與否。當迴路形成,產生負電壓於旁通開關S10、S20或S30之閘源極間以控制旁通開關S10、S20或S30的操作狀態,據以逐級熄滅LED子陣列G1、G2、G3及G4。During the second half of the input voltage, the input voltage gradually decreases. After detecting the voltage across the current detecting resistor 160 by the shunt regulator X1, X2 or X3, respectively switching to the on or off voltage compared with the reference voltage of the shunt regulator X1, X2 or X3, controlling the resistor Rz1 and the resistor Rg1, the resistor The circuit of Rz2 and the resistor Rg2, the resistor Rz3 or the resistor Rg3 is formed or not. When the loop is formed, a negative voltage is generated between the gates of the bypass switch S10, S20 or S30 to control the operating state of the bypass switch S10, S20 or S30, and the LED sub-arrays G1, G2, G3 and G4 are extinguished step by step. .

於實施例中,旁通開關S10、S20及S30的閘極與源極之間更設置有齊納二極體Z1、Z2及Z3(假設齊納二極體Z1、Z2及Z3的崩潰電壓皆為Vz),可以將旁通開關S10、S20或S30及閘源極電壓控制在齊納二極體的 崩潰電壓Vz,以保護旁通開關S10、S20或S30的閘-源極間之絕緣層不會被擊穿。In the embodiment, the Zener diodes Z1, Z2, and Z3 are further disposed between the gate and the source of the bypass switches S10, S20, and S30 (assuming that the breakdown voltages of the Zener diodes Z1, Z2, and Z3 are both For Vz), the bypass switch S10, S20 or S30 and the gate-source voltage can be controlled in the Zener diode The breakdown voltage Vz is applied to protect the insulating layer between the gate and source of the bypass switch S10, S20 or S30 from being broken down.

綜合以上,圖2A所繪示之LED光引擎的電子控制裝置,是利用包括當級LED子陣列以及當級以下之LED子陣列之順向電壓降之和,控制當級旁通開關之源閘極的電壓,藉以調節當級旁通開關之操作狀態(導通、調節或截止態)。隨著一周期前半之電壓波形上升緣,線電流隨之上升,LED子陣列逐級點亮,且點亮LED子陣列之電流隨之上升。隨著一周期後半之電壓波形下降緣,線電流隨之下降,LED子陣列逐級熄滅,且點亮LED子陣列之電流隨之下降。具體而言,並聯調節器X1、X2及X3分別透過防箝位電阻Rx1、Rx2及Rx3偵測電流檢測電阻160之跨壓。於實施例中,假設忽略防箝位電阻Rx1、Rx2及Rx3的影響,則當級並聯調節器達導通條件而切換於導通與截止之間時,下級並聯調節器必為導通。換句話說,當級旁通開關操作於調節態時,下級旁通開關必為截止,如此對應地控制LED子陣列的點亮或熄滅狀態,並穩定通過LED子陣列之電流。In summary, the electronic control device of the LED light engine illustrated in FIG. 2A controls the source gate of the current bypass switch by using the sum of the forward voltage drops including the LED sub-array of the current stage and the LED sub-array below the stage. The voltage of the pole is used to adjust the operating state (on, regulated or off state) of the stage bypass switch. As the voltage waveform rises in the first half of the cycle, the line current rises, the LED sub-array lights up step by step, and the current that illuminates the LED sub-array rises. As the voltage waveform falls in the second half of the cycle, the line current decreases, the LED sub-array is extinguished step by step, and the current that illuminates the LED sub-array decreases. Specifically, the shunt regulators X1, X2, and X3 detect the voltage across the current detecting resistor 160 through the anti-clamping resistors Rx1, Rx2, and Rx3, respectively. In the embodiment, it is assumed that the influence of the anti-clamping resistors Rx1, Rx2, and Rx3 is ignored, and when the step shunt regulator is turned on and turned on between the on and off states, the lower shunt regulator must be turned on. In other words, when the stage bypass switch operates in the regulated state, the lower bypass switch must be turned off, thus correspondingly controlling the lighting or extinguishing state of the LED sub-array, and stabilizing the current through the LED sub-array.

接著,考慮電阻R1與電阻R2介於0到無窮大(0<R1<∞且0<R2<∞)。當只有最後一級LED子陣列G4被點亮,通過之電流為I1。電流檢測電阻160之跨壓V 160 之值受到輸入電壓經正弦電壓補償器(電阻R1及 電阻R2)的補償,即,且此補償值為輸入電壓經過整流器100整流後的直流脈衝(DC Pulse)的一分壓。因此,通過點亮之LED子 陣列的電流為,即,通過點亮之LED子陣列的電流I1之類正弦步階波形會受到補償而更接近正弦波的波形,因而更接近線電壓的波形。如此一來,可進一步改善功率因數(power factor)以及降低諧波失真(harmonic distortion)。同樣地,通過點亮之LED子陣列G3及G4的電流 I2,以及通過點亮之LED子陣列G2、G3及G4的電流I3的電流波形也會受到正弦電壓補償器所提供之輸入電壓的分壓補償,分別為,且,可進一步改善功率因數及降低諧波失真。Next, consider that the resistor R1 and the resistor R2 are between 0 and infinity (0 < R1 < ∞ and 0 < R2 < ∞). When only the last stage LED sub-array G4 is illuminated, the current passing through is I1. The value of the voltage across the voltage detecting resistor 160 V 160 is compensated by the input voltage through the sinusoidal voltage compensator (resistor R1 and resistor R2), ie And the compensation value is a partial pressure of the DC pulse after the input voltage is rectified by the rectifier 100. Therefore, the current through the illuminated LED sub-array is That is, a sinusoidal step waveform such as current I1 that illuminates the LED sub-array is compensated to be closer to the waveform of the sine wave, and thus closer to the waveform of the line voltage. In this way, the power factor and the harmonic distortion can be further improved. Similarly, the current waveform through the illuminated LED sub-arrays G3 and G4, and the current waveform through the illuminated LED sub-arrays G2, G3, and G4, I3 are also subject to the input voltage provided by the sinusoidal voltage compensator. Pressure compensation, respectively And Can further improve the power factor and reduce harmonic distortion.

圖2B所示為依照圖1A之具有LED光引擎的電子控制裝置的另一具體電路示意圖。與圖2A的差異在於,比較電路透過一雙載子接面電晶體,控制旁通開關之導通或截止。此些雙載子接面電晶體P1、P2及P3之集極分別耦接至各LED子陣列G2、G3及G4的陰極,使得旁通開關S10、S20及S30的源閘極被施加一驅動電壓,此些驅動電壓分別係各段LED子陣列的順向電壓降,於電阻Rz1及電阻Rg1、電阻Rz2及電阻Rg2、電阻Rz3及電阻Rg3所產生的分壓。2B is another schematic circuit diagram of the electronic control unit having the LED light engine in accordance with FIG. 1A. The difference from FIG. 2A is that the comparison circuit controls the on or off of the bypass switch through a pair of carrier junction transistors. The collectors of the dual-carrier junction transistors P1, P2, and P3 are respectively coupled to the cathodes of the LED sub-arrays G2, G3, and G4, so that the source gates of the bypass switches S10, S20, and S30 are applied with a driving. The voltage, the driving voltage is the forward voltage drop of each segment of the LED sub-array, and the voltage division generated by the resistor Rz1 and the resistor Rg1, the resistor Rz2, the resistor Rg2, the resistor Rz3, and the resistor Rg3.

當輸入電壓克服最後一級LED子陣列G4之順向電壓降,但不足以克服倒數兩級LED子陣列G4及G3之順向電壓降時,電流I1於電流檢測電阻160產生的跨壓V 160 ,使得並聯調節器X3迅速地切換於導通與截止態之間,使得pnp雙載子接面電晶體(Bipolar junction transistor,BJT)P3切換於導通與截止之間,旁通開關S30則迅速地切換於截止與導通態之間,使得旁通開關S30的源閘極電壓透過電阻Rz3及Rg3而被pnp雙載子接面電晶體P3拉低(pull low),旁通開關S30之閘源極被施加足夠的負電壓而截止,此負電壓近似於最後一級之LED子陣列G4的順向電壓降於電阻Rz3及電阻Rg3的分 壓(),此時旁通開關S30操作於調節態,以將通過最後一級LED子陣列G4之電流維持在電流I1。When the input voltage overcomes the forward voltage drop of the last stage LED sub-array G4, but is insufficient to overcome the forward voltage drop of the reciprocal two-stage LED sub-arrays G4 and G3, the current I1 is across the voltage V 160 generated by the current detecting resistor 160 . The shunt regulator X3 is rapidly switched between the on and off states, so that the pnp bipolar junction transistor (BJT) P3 is switched between on and off, and the bypass switch S30 is rapidly switched to Between the off-state and the on-state, the source gate voltage of the bypass switch S30 is pulled low by the pnp bipolar junction transistor P3 through the resistors Rz3 and Rg3, and the gate of the bypass switch S30 is applied. A sufficient negative voltage is cut off. This negative voltage is similar to the forward voltage of the LED sub-array G4 of the last stage falling below the voltage divider of the resistor Rz3 and the resistor Rg3 ( At this time, the bypass switch S30 operates in an adjusted state to maintain the current through the last stage LED sub-array G4 at the current I1.

當輸入電壓克服最後二級LED子陣列G4及G3之順向電壓降,但不足以克服最後三級LED子陣列G4、G3及G2之順向電壓降時,電流I2經電流檢測電阻160產生的跨壓V 160 ,使得並聯調節器X2迅速地切換於導通與截止態之間,pnp雙載子接面電晶體P2切換於導通與截止之間,當pnp雙載子接面電晶體P2導通時,旁通開關S20的源閘極電壓透過電阻Rz2及Rg2而被pnp雙載子接面電晶體P2拉低,旁通開關S20之閘源極被施加足夠的負電壓而截止,此負電壓近似於倒數第二級之LED子陣列G3的順向電壓降於電 阻Rz2及Rg2的分壓(),使旁通開關S20切換於截止與導通,此時旁通開關S20操作於調節態,以將通過最後二級LED子陣列G4及G3之電流維持在電流I2。同時,並聯調節器X3恆導通,旁通開關S30操作於截止態。When the input voltage overcomes the forward voltage drop of the last two LED sub-arrays G4 and G3, but is insufficient to overcome the forward voltage drop of the last three LED sub-arrays G4, G3, and G2, the current I2 is generated by the current detecting resistor 160. The voltage across the voltage V 160 is such that the shunt regulator X2 is rapidly switched between the on and off states, and the pnp bipolar junction transistor P2 is switched between on and off, when the pnp bipolar junction transistor P2 is turned on. The source gate voltage of the bypass switch S20 is pulled down by the pnp bipolar junction transistor P2 through the resistors Rz2 and Rg2, and the gate of the bypass switch S20 is applied with a sufficient negative voltage to cut off, and the negative voltage is approximated. The forward voltage of the LED sub-array G3 in the penultimate stage is reduced by the voltage division of the resistors Rz2 and Rg2 ( The bypass switch S20 is switched to the off and on, at which time the bypass switch S20 operates in the regulated state to maintain the current through the last secondary LED sub-arrays G4 and G3 at the current I2. At the same time, the shunt regulator X3 is constantly turned on, and the bypass switch S30 operates in the off state.

當輸入電壓克服最後三級LED子陣列G4、G3及G2之順向電壓降,但不足以克服最後四級LED子陣列G4、G3、G2及G1之順向電壓降時,電流I3經電流檢測電阻160產生的跨壓V 160 ,使並聯調節器X1迅速切換於導通與截止態間,pnp雙載子接面電晶體P1切換於導通與截止間。當pnp雙載子接面電晶體P1導通時,旁通開關S10的源閘極電壓透過電阻Rz1及Rg1而被pnp雙載子接面電晶體P1拉低至足夠的負電壓而截止,此負電壓近似於倒數第三級之LED子陣列G2的順向電壓降於電阻Rz1及Rg1的分壓 ()。旁通開關S10切換於截止與導通而操作於調節態,以將通過最後三級LED子陣列G4、G3及G2之電流維持在電流I3。同時,並聯調節器X2及X3導通,旁通開關S20及S30操作於截止態。以此類推,直到輸入電壓克服所有的LED子陣列之順向電壓降,電流調節器120提供定電流I4至所有的LED子陣列G1~G4。When the input voltage overcomes the forward voltage drop of the last three LED sub-arrays G4, G3, and G2, but is insufficient to overcome the forward voltage drop of the last four LED sub-arrays G4, G3, G2, and G1, the current I3 is current-detected. 160 V voltage across resistor 160 generated by the shunt regulator X1 to quickly switch between oN and oFF states, PNP bipolar junction transistor P1 is switched on and off conduction between. When the pnp bipolar junction transistor P1 is turned on, the source gate voltage of the bypass switch S10 is turned off by the pnp bipolar junction transistor P1 to a sufficient negative voltage through the resistors Rz1 and Rg1, and the negative is turned off. The forward voltage of the LED sub-array G2 with a voltage approximating to the third last stage is reduced by the voltage division of the resistors Rz1 and Rg1 ( ). The bypass switch S10 is switched to off and on to operate in an adjusted state to maintain the current through the last three stages of LED sub-arrays G4, G3, and G2 at current I3. At the same time, the shunt regulators X2 and X3 are turned on, and the bypass switches S20 and S30 are operated in the off state. By analogy, the current regulator 120 provides a constant current I4 to all of the LED sub-arrays G1 - G4 until the input voltage overcomes the forward voltage drop across all of the LED sub-arrays.

綜合以上,圖2B所繪示之LED光引擎的電子控制裝置,是利用下一級LED子陣列之順向電壓降,控制當級旁通開關之源閘極電壓,藉以調節當級旁通開關之操作狀態(導通、調節或截止態),藉以對應地控制LED子陣列的點亮或熄滅狀態,並穩定通過LED子陣列之電流。LED子陣列的點燈機制及調光機制,與圖2A相似,於此不再贅述。假設忽略防箝位電阻Rx1、Rx2及Rx3的影響,當級旁通開關操作於調節態時,下級旁通開關必為截止,如此對應地控制LED子陣列的點亮或熄滅狀態,並穩定通過LED子陣列之電流。In summary, the electronic control device of the LED light engine illustrated in FIG. 2B utilizes the forward voltage drop of the next-level LED sub-array to control the source gate voltage of the current-stage bypass switch, thereby adjusting the level bypass switch of the stage. The operating state (on, regulated, or off state), thereby correspondingly controlling the lighting or extinguishing state of the LED sub-array, and stabilizing the current through the LED sub-array. The lighting mechanism and dimming mechanism of the LED sub-array are similar to those of FIG. 2A and will not be described herein. Assume that the effects of the anti-clamping resistors Rx1, Rx2, and Rx3 are ignored. When the stage bypass switch operates in the regulation state, the lower-level bypass switch must be turned off, thus correspondingly controlling the lighting or extinguishing state of the LED sub-array, and stably passing The current of the LED sub-array.

圖3A所示為依照圖1A之具有LED光引擎的電子控制裝置的另一具體電路示意圖。與圖2A的差異在於,並聯調節器X1、X2及X3,由雙載子接面電晶體B1、B2及B3所取代。雙載子接面電晶體B1之基極(Base)耦接於防箝位電阻Rx1,雙載子接面電晶體B2之基極耦接於防箝位電阻Rx2,雙載子接面電晶體B3之基極耦接於防箝位電阻Rx3。FIG. 3A is a schematic diagram showing another specific circuit of the electronic control unit having the LED light engine according to FIG. 1A. The difference from FIG. 2A is that the shunt regulators X1, X2, and X3 are replaced by bipolar junction transistors B1, B2, and B3. The base of the bipolar junction transistor B1 is coupled to the anti-clamping resistor Rx1, and the base of the bipolar junction transistor B2 is coupled to the anti-clamping resistor Rx2, the bipolar junction transistor The base of B3 is coupled to the anti-clamping resistor Rx3.

圖3A之雙載子接面電晶體B1、B2及B3的作用與圖2A之並聯調節器X1、X2及X3相似。差異在於,並聯調節器以參考端接收之電壓(相對於接地端電壓)與其參考電壓(參考端與陽極間基準電壓與其陽極對接地端之電壓的和)比較,控制並聯調節器的導通或截止。雙載子接面電晶體以基極接收之電壓(相對於接地端電壓)與其參考電壓(基射極間閥值電壓與射極對接地端之電壓的和)比較,控制雙載子接面電晶體的導通或截止。The roles of the bi-carrier junction transistors B1, B2, and B3 of Figure 3A are similar to the shunt regulators X1, X2, and X3 of Figure 2A. The difference is that the shunt regulator compares the voltage received by the reference terminal (relative to the ground terminal voltage) with its reference voltage (the sum of the reference terminal-to-anode reference voltage and its anode-to-ground voltage) to control the conduction or the cut-off of the shunt regulator. . The bi-carrier junction transistor controls the bi-carrier junction by comparing the voltage received by the base (relative to the ground voltage) with its reference voltage (the sum of the emitter-to-electrode threshold voltage and the emitter-to-ground voltage). The transistor is turned on or off.

舉例來說,當輸入電壓克服最後一級LED子陣列G4之順向電壓降,但不足以克服倒數兩級LED子陣列G4及G3之順向電壓降時,電流I1經電流檢測電阻160產生的跨壓V 160 ,使得雙載子接面電晶體B3迅速地切換於導通與截止態之間。旁通開關S30受雙載子接面電晶體B3的控制而迅速切 換於截止與導通,定義此時旁通開關S30操作於調節態,以將通過LED子陣列G4之電流維持在電流I1。For example, when the input voltage overcomes the forward voltage drop of the last stage LED sub-array G4, but is insufficient to overcome the forward voltage drop of the inverse two-stage LED sub-arrays G4 and G3, the current I1 is generated by the current detecting resistor 160. The voltage V 160 is such that the bipolar junction transistor B3 is rapidly switched between the on and off states. The bypass switch S30 is quickly switched to off and on by the control of the bipolar junction transistor B3. It is defined that the bypass switch S30 is operated in the regulation state to maintain the current through the LED sub-array G4 at the current I1.

以此類推,當輸入電壓介於倒數三級(G2~G4)至倒數四級(G1~G4)之LED子陣列之順向電壓降間,電流I3經電流檢測電阻160產生的跨壓V 160 使雙載子接面電晶體B1迅速地切換於導通與截止,使旁通開關S10操作於調節態,以將通過LED子陣列G2、G3、G4之電流維持在電流I3。電流I3經電流檢測電阻160產生的跨壓V 160 ,必使雙載子接面電晶體B3及B2恆導通,旁通開關S30及S20恆截止。直到輸入電壓克服所有的LED子陣列之順向電壓降,電流調節器120提供定電流I4點亮所有的LED子陣列G1~G4。By analogy, when the input voltage is between the forward voltage drop of the LED sub-array of the last three stages (G2~G4) to the last four stages (G1~G4), the current I3 is generated by the current detecting resistor 160. V 160 causes the bipolar junction transistor B1 to rapidly switch on and off, causing the bypass switch S10 to operate in an regulated state to maintain the current through the LED sub-arrays G2, G3, G4 at current I3. 160 V voltage across the current I3 through the current detection resistor 160 generated will make bipolar junction transistors B2 and B3 constant on, constant bypass switches S30 and S20 are turned off. Until the input voltage overcomes the forward voltage drop across all of the LED sub-arrays, current regulator 120 provides a constant current I4 to illuminate all of the LED sub-arrays G1 - G4.

反之,於輸入電壓之下半周期的下降緣,隨著電壓下降,旁通開關S10、S20及S30分別受到雙載子接面電晶體B1、B2及B3的控制,逐級導通,使得LED子陣列G1、G2、G3及G4逐級熄滅。此外,利用正弦電壓補償器(電阻R1及電阻R2)汲取輸入電源之線電壓之波形,藉以修飾線電流波形的原理皆已經說明於前,而不再贅述。On the contrary, in the falling edge of the half cycle of the input voltage, as the voltage drops, the bypass switches S10, S20 and S30 are controlled by the bipolar junction transistors B1, B2 and B3, respectively, and are turned on step by step, so that the LEDs are turned on. The arrays G1, G2, G3, and G4 are extinguished step by step. In addition, the sinusoidal voltage compensator (resistor R1 and resistor R2) is used to extract the waveform of the line voltage of the input power source, so that the principle of modifying the line current waveform has been described above, and will not be described again.

圖3B所示為依照圖1A之具有LED光引擎的電子控制裝置的另一具體電路示意圖。與圖2B的差異在於,並聯調節器X1、X2及X3由雙載子接面電晶體B1、B2及B3取代。雙載子接面電晶體B1、B2及B3的作用相似於圖3A,其作用機制已說明於前而不再贅述。FIG. 3B is a schematic diagram showing another specific circuit of the electronic control unit having the LED light engine according to FIG. 1A. The difference from FIG. 2B is that the shunt regulators X1, X2, and X3 are replaced by bipolar junction transistors B1, B2, and B3. The roles of the bi-carrier junction transistors B1, B2, and B3 are similar to those of FIG. 3A, and the mechanism of action has been described above and will not be described again.

於本發明一實施例,可藉由調整通過電流檢測電阻160之電流,調整通過LED子陣列的電流,進而調整LED子陣列的亮度。圖4A~4D繪示依照圖1A之LED光引擎的電子控制裝置,用以說明具有調光功能之實施例的調光策略。於某些實施例中,圖4A~4D之共享電流感測與調變單元160a~160d,為圖1A~1B之電流檢測電阻160的幾種具體形式,藉由通過共 享電流感測與調變單元160a~160d的電流近似於點亮之LED陣列的電流,可調控共享電流感測與調變單元160a~160d的阻值以調控點亮之LED陣列的電流,據以控制點亮之LED子陣列的亮度。共享電流感測與調變單元160a~160d可應用於本發明任一實施例中,取代電流檢測電阻160的方塊圖,使得通過LED陣列的電流近似於通過共享電流感測與調變單元160a~160d,以提供簡化調光機制之LED光引擎的電子控制裝置。In one embodiment of the invention, the current through the LED sub-array can be adjusted by adjusting the current through the current sense resistor 160 to adjust the brightness of the LED sub-array. 4A-4D illustrate an electronic control device for the LED light engine of FIG. 1A for illustrating a dimming strategy of an embodiment having a dimming function. In some embodiments, the shared current sensing and modulation units 160a-160d of FIGS. 4A-4D are several specific forms of the current detecting resistor 160 of FIGS. 1A-1B, by The currents of the current sensing and modulation units 160a-160d approximate the current of the lit LED array, and the resistance of the shared current sensing and modulation units 160a-160d can be adjusted to regulate the current of the lit LED array. To control the brightness of the illuminated LED sub-array. The shared current sensing and modulation unit 160a-160d can be applied to any embodiment of the present invention, instead of the block diagram of the current detecting resistor 160, so that the current through the LED array is approximated by the shared current sensing and modulation unit 160a~ 160d to provide an electronic control unit for the LED light engine that simplifies the dimming mechanism.

請先參考圖4A實施例中,共享電流感測與調變單元160a含有電晶體之壓控電阻(voltage controlled resistance),包括脈衝寬度調變(Pulse Width Modulation,PWM)單元PWM、電阻R15、電阻R16、分壓電阻Rm1及Rm2、電容Cf、金氧半場效電晶體(MOSFET)M16及電壓追隨器(Voltage Follower)F。脈衝寬度調變單元PWM可提供脈衝寬度調變訊號,透過遙控裝置(例如手機、遙控器等)的藍牙功能以微波傳輸,例如遙控裝置中設置有天線的發送器(Transmitter),且照明裝置之電路架構中設置有天線的接收器(Receiver),脈波訊號藉由遙控裝置的發射與照明裝置的接收作傳遞。或者,脈衝寬度調變也可為內建之訊號產生器(Signal generator)所產生。Referring to FIG. 4A firstly, the shared current sensing and modulation unit 160a includes a voltage controlled resistance of the transistor, including a Pulse Width Modulation (PWM) unit PWM, a resistor R15, and a resistor. R16, voltage dividing resistors Rm1 and Rm2, capacitor Cf, gold oxide half field effect transistor (MOSFET) M16 and voltage follower F (Voltage Follower) F. The pulse width modulation unit PWM can provide a pulse width modulation signal, and transmits the microwave through a Bluetooth function of a remote control device (such as a mobile phone, a remote controller, etc.), for example, a transmitter (Transmitter) provided with an antenna in the remote control device, and the illumination device A receiver (Receiver) is provided in the circuit architecture, and the pulse signal is transmitted by the transmission of the remote control device and the reception of the illumination device. Alternatively, the pulse width modulation can also be generated by a built-in signal generator.

在頻率不變的狀態下,藉由調整脈衝寬度調變訊號的工作週期,可調整訊號的整體平均電壓值上升或下降。然後,透過天線傳遞或內建產生之脈衝寬度調變訊號,通過由電阻R16及電容Cf組成的低通濾波器後,輸出類比訊號至電壓追隨器F,以將此類比訊號轉而傳遞至金氧半場效電晶體M16。電壓追隨器F可確保類比訊號的傳遞不失真,其本身不汲取電流,可提供足夠的電流驅動金氧半場效電晶體M16,且不會對電路造成負載效應。In the state where the frequency is constant, the overall average voltage value of the signal can be adjusted to rise or fall by adjusting the duty cycle of the pulse width modulation signal. Then, through the antenna transmission or built-in pulse width modulation signal, through the low-pass filter composed of the resistor R16 and the capacitor Cf, the analog signal is outputted to the voltage follower F to transfer the analog signal to the gold. Oxygen half field effect transistor M16. The voltage follower F ensures that the analog signal transmission is not distorted, does not draw current itself, and provides sufficient current to drive the metal oxide half field effect transistor M16 without causing a load effect on the circuit.

金氧半場效電晶體M16作為一壓控電阻,其閘源極間接收分壓電阻Rm1及Rm2提供的類比訊號而使汲極與源極間的通道形成,產生對應放 大的電流,此放大的電流反比於金氧半場效電晶體M16的阻值。亦即,金氧半場效電晶體M16的阻值是可以被調控的,而通過金氧半場效電晶體M16的電流,約為通過LED子陣列的電流。故,藉由調整脈衝寬度調變訊號的工作週期,可調整訊號的整體平均電壓值,以控制金氧半場效電晶體M16的阻值,調變通過金氧半場效電晶體M16的電流(近似於通過LED子陣列的電流),如此,可控制通過LED子陣列的電流,據以調節照明亮度。上述實施例中,也可以使用接面場效電晶體(JFET)等其他壓控電阻,取代如金氧半場效電晶體,其工作原理相近,容此不多贅述。The gold-oxygen half-field effect transistor M16 is used as a voltage-controlled resistor, and the analog signal provided by the voltage dividing resistors Rm1 and Rm2 is received between the gate and the source to form a channel between the drain and the source, and a corresponding discharge is generated. A large current, this amplified current is inversely proportional to the resistance of the metal oxide half field effect transistor M16. That is, the resistance of the metal oxide half field effect transistor M16 can be regulated, and the current through the metal oxide half field effect transistor M16 is about the current through the LED sub-array. Therefore, by adjusting the duty cycle of the pulse width modulation signal, the overall average voltage value of the signal can be adjusted to control the resistance of the metal oxide half field effect transistor M16, and the current through the gold oxide half field effect transistor M16 can be modulated (approximate In the current through the LED sub-array, as such, the current through the LED sub-array can be controlled to adjust the illumination brightness. In the above embodiments, other voltage-controlled resistors such as a junction field effect transistor (JFET) may be used instead of the gold-oxygen half-field effect transistor, and the working principle is similar, so it is not described here.

請接著參照圖4B,共享電流感測與調變單元160b含有電晶體作為開關,包括脈衝寬度調變單元PWM、電阻R15、電阻Rp、雙載子接面電晶體(BJT)B16。於此實施例中,脈衝寬度調變單元PWM之訊號經電阻Rp,作為一電流訊號提供雙載子接面電晶體(BJT)B16之基極,藉以調變雙載子接面電晶體B16的導通或截止,藉以調控通過LED子陣列之平均電流。如此,即可調控各段LED子陣列之亮度。Referring to FIG. 4B, the shared current sensing and modulation unit 160b includes a transistor as a switch, including a pulse width modulation unit PWM, a resistor R15, a resistor Rp, and a bipolar junction transistor (BJT) B16. In this embodiment, the signal of the pulse width modulation unit PWM is provided as a current signal through the resistor Rp to provide the base of the bipolar junction transistor (BJT) B16, thereby modulating the bipolar junction transistor B16. Turn on or off to regulate the average current through the LED sub-array. In this way, the brightness of each segment of the LED sub-array can be adjusted.

請接著參照圖4C,共享電流感測與調變單元160c含有電晶體作為開關,包括脈衝寬度調變單元PWM、電阻R15、分壓電阻Rm1及Rm2、金氧半場效電晶體M16。於此實施例中,脈衝寬度調變單元PWM之訊號經分壓電阻Rm1及Rm2,作為一電壓訊號提供金氧半場效電晶體M16之閘源極,以調變金氧半場效電晶體M16的導通或截止,控制通過LED子陣列之平均電流,調控各段LED子陣列之亮度。Referring to FIG. 4C, the shared current sensing and modulation unit 160c includes a transistor as a switch, including a pulse width modulation unit PWM, a resistor R15, voltage dividing resistors Rm1 and Rm2, and a gold oxide half field effect transistor M16. In this embodiment, the signal of the pulse width modulation unit PWM is supplied to the gate source of the gold-oxygen half-field transistor M16 as a voltage signal through a voltage dividing resistor Rm1 and Rm2 to modulate the gold-oxygen half-field effect transistor M16. Turning on or off, controlling the average current through the LED sub-array to control the brightness of each segment of the LED sub-array.

請接著參照圖4D,共享電流感測與調變單元160d係電位計(亦即,可變電阻)。藉由調變電位計的阻值,控制通過電位計的電流,據以調控通過LED子陣列的電流,據以調節照明亮度。Referring next to FIG. 4D, the shared current sensing and modulation unit 160d is a potentiometer (ie, a variable resistor). By adjusting the resistance of the potentiometer, the current through the potentiometer is controlled to regulate the current through the LED sub-array to adjust the illumination brightness.

綜上,本發明上述實施例之調光機制,假設忽略流至旁通開關S1~S3的電流,則流經共享電流感測與調變單元160a~160d的電流可近似於流至被點亮之LED子陣列的電流,藉由調變通過共享電流感測與調變單元160a~160d的電流來控制被點亮之LED子陣列的亮度。並且,隨著一周期前半之電壓波形上升緣,線電流隨之上升,LED子陣列逐級點亮,且點亮LED子陣列之電流隨之上升。隨著一周期後半之電壓波形下降緣,線電流隨之下降,LED子陣列逐級熄滅,且點亮LED子陣列之電流隨之下降。In summary, the dimming mechanism of the above embodiment of the present invention assumes that the current flowing through the shared current sensing and modulation unit 160a-160d can be approximated to be illuminated until the current flowing to the bypass switches S1 S S3 is ignored. The current of the LED sub-array controls the brightness of the illuminated LED sub-array by modulating the current through the shared current sensing and modulation units 160a-160d. Moreover, as the voltage waveform rises in the first half of the cycle, the line current rises, the LED sub-array lights up step by step, and the current that illuminates the LED sub-array rises. As the voltage waveform falls in the second half of the cycle, the line current decreases, the LED sub-array is extinguished step by step, and the current that illuminates the LED sub-array decreases.

圖5A所示為依照圖1A之具有LED光引擎的電子控制裝置的另一具體電路示意圖。與圖2A的差異在於,於此實施例之旁通開關S15、S25及S35包括的金氧半場效電晶體(Metal-Oxide-Semiconductor FET,MOSFET)為增強型,亦即,旁通開關S15、S25及S35係常開開關(normally open switches),在其閘源極未施加電壓或所施加的電壓小於閥值電壓時,旁通開關截止,當其閘源極施加之電壓大於或等於閥值電壓時,旁通開關導通。FIG. 5A is a schematic diagram showing another specific circuit of the electronic control unit having the LED light engine according to FIG. 1A. The difference from FIG. 2A is that the bypass switches S15, S25, and S35 of the embodiment include a metal-oxide-semiconductor FET (MOSFET), which is an enhanced type, that is, a bypass switch S15. S25 and S35 are normally open switches. When no voltage is applied to the gate source or the applied voltage is less than the threshold voltage, the bypass switch is turned off. When the voltage applied to the gate source is greater than or equal to the threshold value. When the voltage is applied, the bypass switch is turned on.

旁通開關S15、S25及S35係常開開關,需先建立初始狀態,使得旁通開關S15、S25及S35得以導通。於實施例中,分別設置啟動電阻Ra1~Ra3於旁通開關S15、S25及S35之閘極與汲極間。於一輸入電壓之周期之前半(上升緣),當輸入電壓克服最後一級LED子陣列的順向電壓降時,第一級之啟動電阻Ra1可以汲取輸入電壓至旁通開關S15之閘極,以對旁通開關S15之閘源極間的電容(未繪示出)充電,使得旁通開關S15導通,電流經旁通開關S15之源極流至旁通開關S25之汲極,第二級之旁通開關S25的汲極所連接之啟動電阻Ra2接著對旁通開關S25之閘源極間的電容充電,使得旁通開關S25導通。以此方式,直至最後一級旁通開關S35導通而進入調節態,以將電流調控在電流I1,電流I1經旁通開關S15、S25及S35流 至最後一級LED子陣列G4,最後流至電流檢測電阻160。詳細之點亮LED子陣列的機制已經說明於前,不再贅述。The bypass switches S15, S25 and S35 are normally open switches, and the initial state needs to be established first, so that the bypass switches S15, S25 and S35 are turned on. In the embodiment, the starting resistors Ra1 to Ra3 are respectively disposed between the gates and the drains of the bypass switches S15, S25, and S35. In the first half of the cycle of the input voltage (rising edge), when the input voltage overcomes the forward voltage drop of the last stage LED sub-array, the first stage of the starting resistor Ra1 can draw the input voltage to the gate of the bypass switch S15, The capacitor (not shown) between the gate and the source of the bypass switch S15 is charged, so that the bypass switch S15 is turned on, and the current flows to the drain of the bypass switch S25 through the source of the bypass switch S15, and the second stage The starting resistor Ra2 connected to the drain of the bypass switch S25 then charges the capacitance between the gate and the source of the bypass switch S25, so that the bypass switch S25 is turned on. In this way, until the last stage of the bypass switch S35 is turned on and enters the regulation state to regulate the current at the current I1, the current I1 flows through the bypass switches S15, S25 and S35 The last stage LED sub-array G4 is finally passed to the current detecting resistor 160. The detailed mechanism for illuminating the LED sub-array has been described above and will not be described again.

於一輸入電壓之周期後半(下降緣),當輸入電壓下降至不足以克服全部之LED陣列的順向電壓降,但仍克服倒數三級LED子陣列G4、G3及G2的順向電壓降(VG4 +VG3 +VG2 ),電流檢測電阻160之跨壓V 160 使並聯調節器X1導通,旁通開關S15之源極電壓經二極體D1與電阻Rd1的迴路拉低,使旁通開關S15截止。當輸入電壓下降至不足以克服倒數三級LED子陣列G4、G3及G2的順向電壓降(VG4 +VG3 +VG2 ),但克服最後二級LED子陣列G4及G3的順向電壓降(VG4 +VG3 )時,電流檢測電阻160之跨壓V 160 使並聯調節器X2導通,旁通開關S25之源極電壓經二極體D2與電阻Rd2的迴路拉低,使旁通開關S25截止,以此類推,以逐級熄滅LED子陣列。熄滅LED子陣列的機制已經說明於前,不再贅述。In the second half of the cycle of the input voltage (falling edge), when the input voltage drops insufficient to overcome the forward voltage drop of all LED arrays, it still overcomes the forward voltage drop of the third-order LED sub-arrays G4, G3, and G2. (V G4 +V G3 +V G2 ), the voltage across the voltage detecting resistor 160 V 160 turns on the parallel regulator X1, and the source voltage of the bypass switch S15 is pulled low through the circuit of the diode D1 and the resistor Rd1, so that the side The switch S15 is turned off. When the input voltage drops insufficient to overcome the forward voltage drop of the third-order LED sub-arrays G4, G3, and G2 (V G4 +V G3 +V G2 ), but overcomes the forward direction of the final two-level LED sub-arrays G4 and G3 When the voltage drops (V G4 +V G3 ), the voltage across the voltage V 160 of the current detecting resistor 160 turns on the parallel regulator X2, and the source voltage of the bypass switch S25 is pulled low through the circuit of the diode D2 and the resistor Rd2, so that The switch S25 is turned off, and so on, to extinguish the LED sub-array step by step. The mechanism for extinguishing the LED sub-array has been described before and will not be described again.

圖5B所示為依照圖1A之具有LED光引擎的電子控制裝置的另一具體電路示意圖。此實施例與圖5A的相同處不多贅述,差異在於,增強型旁通開關S15、S25及S35的操作狀態,係受到雙載子接面電晶體P4、P5及P6的導通與否來控制。於圖5B中,當旁通開關S15、S25及S35之常開開關,受到輸入電壓經由啟動電阻Ra1~Ra3建立初始狀態後,旁通開關S15及S25進入導通態且旁通開關S35為調節態。此為最後一級LED子陣列G4的點亮方式,依此方式,隨輸入電壓的上升,可逐級點亮LED子陣列。FIG. 5B is a schematic diagram showing another specific circuit of the electronic control unit having the LED light engine according to FIG. 1A. This embodiment is not described in detail in the same manner as in FIG. 5A. The difference is that the operating states of the enhanced bypass switches S15, S25, and S35 are controlled by the conduction of the dual-carrier junction transistors P4, P5, and P6. . In FIG. 5B, when the normally open switches of the bypass switches S15, S25 and S35 are subjected to the initial state of the input voltage via the starting resistors Ra1 to Ra3, the bypass switches S15 and S25 enter the conducting state and the bypass switch S35 is in the regulated state. . This is the lighting mode of the last stage LED sub-array G4. In this way, the LED sub-array can be illuminated step by step as the input voltage rises.

於一輸入電壓之周期之後半(下降緣),當輸入電壓下降至不足以克服全部之LED陣列的順向電壓降,但仍克服倒數三級LED子陣列G4、G3及G2的順向電壓降(VG4 +VG3 +VG2 ),電流檢測電阻160之跨壓V 160 使並聯調節器X1導通,雙載子接面電晶體P4導通,旁通開關S15之閘極電壓被拉低(pulled low),旁通開關S15截止。當輸入電壓下降至不足以克服倒數三級 LED子陣列G4、G3及G2的順向電壓降(VG4 +VG3 +VG2 ),但克服最後二級LED子陣列G4及G3的順向電壓降(VG4 +VG3 )時,電流檢測電阻160之跨壓V 160 使並聯調節器X2導通,雙載子接面電晶體P2導通,旁通開關S25之閘極電壓被拉低,旁通開關S25截止,以此類推,以逐級熄滅LED子陣列。In the second half of the cycle of the input voltage (falling edge), when the input voltage drops insufficient to overcome the forward voltage drop of all LED arrays, it still overcomes the forward voltage of the third-order LED sub-arrays G4, G3, and G2. Drop (V G4 +V G3 +V G2 ), the voltage across the voltage detecting resistor 160 V 160 turns on the parallel regulator X1, the double carrier junction transistor P4 is turned on, and the gate voltage of the bypass switch S15 is pulled low ( Pulled low), the bypass switch S15 is turned off. When the input voltage drops insufficient to overcome the forward voltage drop of the third-order LED sub-arrays G4, G3, and G2 (V G4 +V G3 +V G2 ), but overcomes the forward direction of the final two-level LED sub-arrays G4 and G3 When the voltage drops (V G4 + V G3 ), the voltage across the voltage V 160 of the current detecting resistor 160 turns on the parallel regulator X2, the bipolar junction transistor P2 is turned on, and the gate voltage of the bypass switch S25 is pulled low. The switch S25 is turned off, and so on, to extinguish the LED sub-array step by step.

圖6A及6B所示為依照圖1A之具有LED光引擎的電子控制裝置的不同實施例示意圖。圖6A及6B之實施例與圖5A及5B的差異在於,利用雙載子接面電晶體B1、B2及B3取代並聯調節器X1、X2及X3。於圖6A利用例如為npn型之雙載子接面電晶體B1、B2及B3的導通或截止,分別控制二極體D1與電阻Rd1之迴路、二極體D2與電阻Rd2之迴路及二極體D3與電阻Rd3之迴路的形成與否,以控制旁通開關的截止或導通。於圖6B利用雙載子接面電晶體B1、B2及B3的導通或截止,分別控制例如為pnp型之雙載子接面電晶體P4、P5及P6的導通或截止,以控制旁通開關S15、S25及S35的截止或導通。6A and 6B are schematic views of different embodiments of an electronic control unit having an LED light engine in accordance with FIG. 1A. The difference between the embodiment of Figures 6A and 6B and Figures 5A and 5B is that the parallel regulators X1, X2 and X3 are replaced by bi-carrier junction transistors B1, B2 and B3. 6A uses, for example, the npn-type bipolar junction transistors B1, B2, and B3 to turn on or off, respectively, to control the circuit of the diode D1 and the resistor Rd1, the circuit of the diode D2 and the resistor Rd2, and the diode. The formation of the loop of the body D3 and the resistor Rd3 controls the turn-off or conduction of the bypass switch. In FIG. 6B, the on or off of the bipolar junction transistors B1, B2, and B3 are controlled to respectively turn on or off the bipolar junction transistors P4, P5, and P6, for example, to control the bypass switch. The cutoff or conduction of S15, S25 and S35.

圖7A及7B所示為依照圖1A之具有LED光引擎的電子控制裝置的一具體電路示意圖。與圖5A及5B的差異在於,LED光引擎的電子控制裝置更包括一電壓調節器陣列,適用於前述任一實施例之電路結構,其包括複數個電壓調節電路180、182及184,分別用以穩定旁通開關S15、S25及S35之導通狀態。圖7A及7B所例示之電壓調節電路180、182及184,可應用於本發明任何一實施例。7A and 7B are schematic diagrams showing a specific circuit of an electronic control unit having an LED light engine in accordance with FIG. 1A. The difference between FIG. 5A and FIG. 5B is that the electronic control device of the LED light engine further includes a voltage regulator array, which is applicable to the circuit structure of any of the foregoing embodiments, and includes a plurality of voltage regulating circuits 180, 182 and 184, respectively. In order to stabilize the on state of the bypass switches S15, S25 and S35. The voltage regulating circuits 180, 182, and 184 illustrated in Figures 7A and 7B are applicable to any of the embodiments of the present invention.

以電壓調節器180為例作說明,其包括電阻Rv1、齊納二極體Z4、雙載子接面電晶體B7及電容C1。當輸入電壓由整流器100整流後,經電流調節器120輸出,供應至雙載子接面電晶體B7之集極,透過電阻Rv1至齊納二極體Z4,以將電壓維持在齊納電壓VZ4 。此時,耦接於雙載子接面電晶體B7之射極的電容C1兩端的電壓VC1 ,等於齊納電壓VZ4與雙載子接面電 晶體B10之基射極間電位差VBE,10 的差值(即VC1 =VZ4 -VBE,10 )。電壓調節器182及電壓調節器184與電壓調節器180的原理相似,不再贅述。藉由電壓調節器180、182及184,可以提供定電壓VC 經電阻Ra1~Ra3至增強型旁通開關S15、S25及S35的閘極,以對閘源極間的電容充電,建立旁通開關S15~S35之通道形成的初始狀態。如此一來,即便於輸入電壓之週期的下降緣(Falling Edge),仍可以穩定地維持旁通開關S15、S25及S35。The voltage regulator 180 is taken as an example, and includes a resistor Rv1, a Zener diode Z4, a bipolar junction transistor B7, and a capacitor C1. When the input voltage is rectified by the rectifier 100, it is output through the current regulator 120, supplied to the collector of the bipolar junction transistor B7, and passed through the resistor Rv1 to the Zener diode Z4 to maintain the voltage at the Zener voltage V. Z4 . At this time, coupled to the voltage V C1 across the bipolar junction transistor of extremely B7 emitted capacitor C1, is equal to the inter-electrode potential difference V BE VZ4 base-emitter voltage of the Zener bipolar junction transistor of B10, 10 The difference (ie V C1 =V Z4 -V BE,10 ). The voltage regulator 182 and the voltage regulator 184 are similar to the voltage regulator 180 and will not be described again. By means of the voltage regulators 180, 182 and 184, a constant voltage V C can be supplied via the resistors Ra1 to Ra3 to the gates of the enhanced bypass switches S15, S25 and S35 to charge the capacitance between the gate and the source to establish a bypass. The initial state of the channel formed by the switches S15 to S35. In this way, the bypass switches S15, S25, and S35 can be stably maintained even at the falling edge of the period of the input voltage.

圖8A~8G所示為依照圖1A之LED光引擎的電子控制裝置,更包括不同之線電壓調整率緊縮器(line regulation tightener)的電路示意圖。圖9A所示為依照圖1A及圖8A、8B或8B之LED光引擎的電子控制裝置,於線電壓調整率緊縮器設置前後,其輸入電壓(vIN )的有效值、通過LED子陣列之電流(ILED )相對於時間軸(t)的波形比較圖。圖9A之(a)、(b)及(c)部份分別表示線電壓調整率緊縮器設置前,輸入電壓的有效值於105V、120V及135V時的波形比較圖,圖9A之(d)、(e)及(f)部份分別表示線電壓調整率緊縮器設置後,輸入電壓的有效值於105V、120V及135V時的波形比較圖。8A-8G are schematic diagrams showing the electronic control device of the LED light engine of FIG. 1A, including a different line regulation tightener. 9A is an electronic control device of the LED light engine according to FIG. 1A and FIG. 8A, 8B or 8B, before and after the line voltage adjustment rate compactor is set, the effective value of the input voltage (v IN ) thereof, through the LED sub-array A comparison of the current (I LED ) versus the time axis (t). Parts (a), (b) and (c) of Fig. 9A respectively show waveform comparison diagrams of the effective values of the input voltages at 105V, 120V, and 135V before the line voltage adjustment rate tightener is set, and FIG. 9A(d). The (e) and (f) parts respectively show waveform comparison diagrams when the effective value of the input voltage is 105V, 120V, and 135V after the line voltage adjustment rate is set.

一般來說,輸入電壓經過整流後的有效值可設計為120伏特(V)±15V,其中±15V為可容許的誤差範圍。於一週期內,將通過LED子陣列之電流ILED 對時間(t 0 ~t T )的積分除以一週期時間(t T -t 0 )為平均電流Iave(t 0 為週期起點,t T 為週期終點),此平均電流Iave會與輸入電壓的有效值正相關(positively correlated)。請先參考圖9A,於線電壓調整率緊縮器設置前,若以(b)部份之輸入電壓的有效值為120V為基準,則(a)部份中,輸入電壓的有效值較小(105V),ILED 與時間的積分面積較小,平均電流也較小,點亮之LED子陣列較暗,(c)部份中,輸入電壓的有效值較大(135V),ILED 與時間的積分面積較大,平均電流也較大,點亮之LED子陣列較亮。如此一來,於輸入電壓的有效值之誤差範圍內,通過LED子陣列 之平均電流Iave會隨之變動,使得點亮之LED子陣列的亮度也會隨誤差值作變動而變得不穩定。In general, the rms value of the input voltage after rectification can be designed to be 120 volts (V) ± 15V, of which ± 15V is an allowable error range. During the one-week period, the current I LED of the LED sub-array is divided by the integral of time ( t 0 ~ t T ) by one cycle time ( t T - t 0 ) as the average current Iave ( t 0 is the cycle start point, t T For the end of the cycle, this average current Iave is positively correlated with the rms value of the input voltage. Please refer to FIG. 9A first. Before the line voltage regulation rate tightener is set, if the effective value of the input voltage of part (b) is 120V, then the effective value of the input voltage is small in part (a) ( 105V), the integrated area of I LED and time is smaller, the average current is smaller, the LED sub-array is darker, and in part (c), the effective value of input voltage is larger (135V), I LED and time The integrated area is larger, the average current is also larger, and the illuminated LED sub-array is brighter. As a result, within the error range of the effective value of the input voltage, the average current Iave passing through the LED sub-array changes accordingly, so that the brightness of the lit LED sub-array also fluctuates with the error value.

圖8A~8G的實施例提出各線電壓調整率緊縮器140a~140c、145a及148a,用以穩定通過LED子陣列之平均電流ILED 落在可允許的範圍內,確保點亮之LED子陣列的亮度不隨輸入電壓的有效值變異而有大幅度的變動。舉例來說,若交流輸入電壓有效值落在可允許的範圍VIN,NOM ±15V內(VIN,NOM 為標稱電壓,±15V為電壓容差),且線電壓調整率緊縮器設置後,使得通過LED子陣列之平均電流落在可允許的範圍ILED,NOM ±5%內(ILED,NOM 為標稱電流,±5%為電流容差),則可稱LED光引擎在可允許的交流輸入電壓有效值範圍為VIN,NOM ±15V的前提下,具有之線電壓調整率為±5%。換句話說,在此種線電壓調整率緊縮器的作用下,只要交流輸入電壓有效值落在可允許的範圍VIN,NOM ±15V內,通過LED子陣列之平均電流將會被調整在可允許的ILED,NOM ±5%的範圍內。8A-8G illustrate various line voltage regulation rate reducers 140a-140c, 145a, and 148a for stabilizing the average current I LED passing through the LED sub-array within an allowable range to ensure illumination of the LED sub-array. The brightness does not vary greatly with the variation of the effective value of the input voltage. For example, if the rms input voltage RMS falls within the allowable range V IN, NOM ±15V (V IN, NOM is the nominal voltage, ±15V is the voltage tolerance), and the line voltage regulation rate is set after the tightener is set So that the average current through the LED sub-array falls within the allowable range I LED, NOM ± 5% (I LED, NOM is the nominal current, ± 5% is the current tolerance), then the LED light engine can be called The allowable AC input voltage has a valid value range of V IN and NOM ±15V, and has a line voltage regulation of ±5%. In other words, under the action of such a line voltage regulation rate reducer, as long as the RMS input voltage RMS falls within the allowable range V IN, NOM ±15V, the average current through the LED sub-array will be adjusted. Allowable I LED, NOM ± 5% range.

請先參考圖8A,電流調節器120耦接於一線電壓調整率緊縮器140a,包括金氧半場效電晶體Me、電阻Re1、電阻Re2、電阻Re3、電阻Re4(電阻Re3與電阻Re4為電壓偵測分壓電阻)、齊納二極體Ze與作為電壓偵測之並聯調節器Xe(或雙載子電晶體)。金氧半場效電晶體Me之汲極透過一電阻Re1耦接於電流調節器120,金氧半場效電晶體Me之閘極透過電阻Re2耦接於電流調節器120,齊納二極體Ze與並聯調節器Xe耦接於金氧半場效電晶體Me的閘極與源極間,並聯調節器Xe之參考極與陽極間設置一電阻Re4。Referring to FIG. 8A, the current regulator 120 is coupled to the line voltage regulation rate reducer 140a, including the metal oxide half field effect transistor Me, the resistor Re1, the resistor Re2, the resistor Re3, and the resistor Re4 (the resistor Re3 and the resistor Re4 are voltage detectors). Measuring voltage divider resistors, Zener diode Ze and parallel regulator Xe (or dual carrier transistor) for voltage detection. The gate of the gold-oxygen half-field effect transistor Me is coupled to the current regulator 120 through a resistor Re1, and the gate of the metal oxide half field effect transistor Me is coupled to the current regulator 120 through the resistor Re2, the Zener diode Ze and The shunt regulator Xe is coupled between the gate and the source of the gold-oxygen half field effect transistor Me, and a resistor Re4 is disposed between the reference pole of the shunt regulator Xe and the anode.

請同時參考圖8A及圖9A,假設忽略正弦電壓補償器(R1及R2)以及電流檢測電阻160兩端的跨壓V160 。當輸入電壓vi克服所有LED子陣列 的順向電壓降(vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),且時(定 義Vth Xe 為並聯調節器Xe的閥值電壓),並聯調節器Xe截止,啟動電阻Re2提供金氧半場效電晶體Me之閘極電位而使之導通,此時,電阻Rx與Re1並 聯(阻值為Rx∥Re1),通過LED子陣列的電流由I3上升至(對應至圖9A(d)、(e)及(f)部份的時間t4),定義Vth X 為電流調節器120中並聯調節器X的閥值電壓,並聯調節器X偵測並聯電阻Rx與Re1的阻值而操作於調節態,使金氧半場效電晶體M對應地操作於調節態,以將電流穩定在I4H 。隨輸入電壓vi繼續上升至克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),且時,並聯調節器Xe導通,金氧半場效電晶體Me之閘極電位被拉低而截止,此時,電阻Rx的阻值較阻值Rx∥Re1更高,通過LED子陣列的電流由I4H 降至I4L (對應至圖9A(e)、(f)及(g)部份的時間t4’)。此時,並聯調節器X操作於調節態,且金氧半場效電晶體M對應地操作於調節態,通過LED子陣列的電流穩定維 持在,直到輸入電壓開始下降至時,並聯調節器Xe又截止,金氧半場效電晶體Me導通,電阻Rx與Re1並聯(Rx∥Re1的阻值小於Rx),通過LED子陣列的電流由I4L 上升至I4H (時間t5’),通過LED子陣列的電流穩定在I4H ,直到輸入電壓vi繼續下降無法克服所有LED子陣列的順向電壓降(vi<V G 1 +V G 2 +V G 3 +V G 4 =V G ),通過LED子陣列的電流由I4H 下降至I3(時間t5)。Please refer to FIGS. 8A and 9A, the cross voltage V is assumed to ignore a sinusoidal voltage compensator 160 (R1 and R2) and a current detecting resistor 160 at both ends. When the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), and When (the Vth Xe is the threshold voltage of the shunt regulator Xe), the shunt regulator Xe is turned off, and the starting resistor Re2 provides the gate potential of the gold-oxygen half-field transistor Me to be turned on. At this time, the resistor Rx is connected in parallel with the Re1. (The resistance is Rx∥Re1), the current through the LED sub-array rises from I3 to (corresponding to time t4) of parts (d), (e) and (f) of Fig. 9A, Vth X is defined as the threshold voltage of the parallel regulator X in the current regulator 120, and the parallel regulator X detects the parallel resistance Rx. resistance Re1 and operate the regulating state, so mosfet transistor M corresponds to the adjustment operating mode, to stabilize the current I4 H. As the input voltage vi continues to rise to overcome the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), and When the shunt regulator Xe is turned on, the gate potential of the metal oxide half field effect transistor Me is pulled off and turned off. At this time, the resistance of the resistor Rx is higher than the resistance value Rx∥Re1, and the current through the LED sub-array is controlled by I4. H falls to I4 L (corresponding to time t4' of the portion of parts (e), (f) and (g) of Fig. 9A). At this time, the shunt regulator X operates in the regulated state, and the gold-oxygen half-field effect transistor M operates correspondingly in the regulated state, and the current through the LED sub-array is stably maintained. Until the input voltage begins to drop to When the shunt regulator Xe is turned off again, the gold-oxygen half-field effect transistor Me is turned on, the resistor Rx is connected in parallel with Re1 (the resistance of Rx∥Re1 is less than Rx), and the current through the LED sub-array rises from I4 L to I4 H (time t5) '), the current through the LED sub-array is stable at I4 H until the input voltage vi continues to fall and cannot overcome the forward voltage drop of all LED sub-arrays (vi < V G 1 + V G 2 + V G 3 + V G 4 = V G ), the current through the LED sub-array drops from I4 H to I3 (time t5).

請接著參考圖8B,電流調節器120之金氧半場效電晶體M的閘源極間耦接二極體Dx,且金氧半場效電晶體M的閘極耦接線電壓調整率緊縮器140b。線電壓調整率緊縮器140b包括金氧半場效電晶體Mf1、金氧半場效電晶體Mf2、雙載子接面電晶體Bf、電阻Rf1、電阻Rf2、電阻Rf3、電阻Rf4、電阻Rf5、電阻Rf6、電阻Rf7(電阻Rf6與電阻Rf7為電壓偵測分壓電 阻)、電阻Rf8、齊納二極體Zf1、齊納二極體Zf2與作電壓偵測之用的並聯調節器Xf(或雙載子電晶體)。Referring to FIG. 8B, the gate of the metal oxide half field effect transistor M of the current regulator 120 is coupled to the diode Dx, and the gate of the gold oxide half field effect transistor M is coupled to the voltage regulation rate reducer 140b. The line voltage adjustment rate reducer 140b includes a gold oxide half field effect transistor Mf1, a gold oxide half field effect transistor Mf2, a bipolar junction transistor Bf, a resistor Rf1, a resistor Rf2, a resistor Rf3, a resistor Rf4, a resistor Rf5, and a resistor Rf6. Resistor Rf7 (resistance Rf6 and resistor Rf7 are voltage detection sub-piezoelectric Resistor), resistor Rf8, Zener diode Zf1, Zener diode Zf2 and shunt regulator Xf (or bipolar transistor) for voltage detection.

請同時參考圖8B及圖9A,假設忽略正弦電壓補償器(R1及R2)。當輸入電壓vi克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),且時(定義Vth Xf 為並聯調節器Xf的閥值電壓),並聯調節器Xf截止,啟動電阻Rf5提供金氧半場效電晶體Mf2之閘極電位而使之導通,此時,金氧半場效電晶體Mf1截止,雙載子接面電晶體Bf之基極與射極間所接收的電壓Vbe 1, Bf 為電流檢測電阻160之跨壓V160 經過串聯之電阻Rf1及Rf2與電阻Rf3的分壓,設計此分壓不足以使雙載子接面電晶體Bf導通。因此,二極體Dx的迴路無法形成,通過LED子陣列的電流由電流調節器120作調節(電流受到電阻Rx規劃),通過 LED子陣列的電流由I3上升至(對應至圖9A(d)、(e)及(f)部份的時間t4)。Please refer to FIG. 8B and FIG. 9A simultaneously, assuming that the sinusoidal voltage compensators (R1 and R2) are ignored. When the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), and When ( Vth Xf is defined as the threshold voltage of the shunt regulator Xf), the shunt regulator Xf is turned off, and the starting resistor Rf5 provides the gate potential of the gold-oxygen half-field effect transistor Mf2 to be turned on. At this time, the gold-oxygen half-field electric power The crystal Mf1 is cut off, and the voltage Vbe1 between the base and the emitter of the bipolar junction transistor Bf is Vbe 1, Bf is the voltage across the voltage detecting resistor 160 V 160 is divided by the series resistors Rf1 and Rf2 and the resistor Rf3 The designing of this partial voltage is not sufficient to turn on the bi-carrier junction transistor Bf. Therefore, the loop of the diode Dx cannot be formed, the current through the LED sub-array is regulated by the current regulator 120 (the current is planned by the resistor Rx), and the current through the LED sub-array rises from I3 to (corresponding to time t4) of parts of parts (d), (e) and (f) of Fig. 9A.

隨輸入電壓vi繼續上升至克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )時,,並聯調節器Xf導通,金氧半場效電晶體Mf2之閘極電位被拉低而截止,金氧半場效電晶體Mf1(電壓偵測旁通開關)導通而將電阻Rf2旁通(bypass),此時,雙載子接面電晶體Bf之基極與射極間所接收的電壓Vbe 2, Bf 為電流檢測電阻160之跨壓V160 經過串聯之電阻Rf1與電阻Rf3的分壓,此分壓可使雙載子接面電晶體Bf導通,使得金氧半場效電晶體M截止,輸入電流往下降,又使雙載子接面電晶體Bf截止。雙載子接面電晶體Bf如此快速地切換於導通與截止間而操作於調節態,使金氧半場效電晶體M切換於截止與導通間而操作於調節 態,通過LED子陣列的電流由I4H 降至(對應至 圖9A(d)、(e)及(f)部份的時間t4’),定義Vbe , Bf 為雙載子接面電晶體Bf的閥值電壓。通過LED子陣列的電流穩定維持在I4L ,使得電阻Rx兩端的電壓不足以導通並聯調節器X,電流受到線電壓調整率緊縮器140b的調節(電 流受到電阻Rf3規劃),直到輸入電壓開始下降至時,並聯調節器Xf又截止,金氧半場效電晶體Mf2導通,金氧半場效電晶體Mf1截止,通過LED子陣列的電流由I4L 上升至I4H (時間t5’),通過LED子陣列的電流穩定在I4H ,直到輸入電壓vi繼續下降無法克服所有LED子陣列的順向電壓降(vi<V G 1 +V G 2 +V G 3 +V G 4 =V G ),通過LED子陣列的電流由I4H 下降至I3(時間t5)。As the input voltage vi continues to rise to overcome the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), The shunt regulator Xf is turned on, and the gate potential of the metal oxide half field effect transistor Mf2 is pulled off and turned off, and the metal oxide half field effect transistor Mf1 (voltage detection bypass switch) is turned on to bypass the resistor Rf2, At this time, the voltage Vbe 2, Bf received between the base and the emitter of the bipolar junction transistor Bf is the voltage division across the voltage V 160 of the current detecting resistor 160 through the series resistor Rf1 and the resistor Rf3. The voltage can turn on the bipolar junction transistor Bf, so that the gold oxide half field effect transistor M is turned off, the input current is decreased, and the bipolar junction transistor Bf is turned off. The bipolar junction transistor Bf is switched between the on and off states so as to operate in the regulated state, so that the gold oxide half field effect transistor M is switched between the off and the on and operates in the regulated state, and the current through the LED sub-array is I4 H drops (corresponding to time t4' of the portion of parts (a), (e) and (f) of Fig. 9), Vbe and Bf are defined as the threshold voltage of the bipolar junction transistor Bf. The current through the LED sub-array is maintained at I4 L such that the voltage across resistor Rx is insufficient to turn on shunt regulator X, and the current is regulated by line voltage regulation rate reducer 140b (current is planned by resistor Rf3) until the input voltage begins to drop. to When the shunt regulator Xf is turned off again, the gold-oxygen half-field effect transistor Mf2 is turned on, the gold-oxygen half-field effect transistor Mf1 is turned off, and the current through the LED sub-array rises from I4 L to I4 H (time t5') through the LED sub-array. The current is stable at I4 H until the input voltage vi continues to fall and cannot overcome the forward voltage drop of all LED sub-arrays (vi < V G 1 + V G 2 + V G 3 + V G 4 = V G ), through the LED The current of the array drops from I4 H to I3 (time t5).

請接著參考圖8C,電流調節器120之金氧半場效電晶體M的閘源極間耦接二極體Dx,且金氧半場效電晶體M的閘極耦接線電壓調整率緊縮器140c。線電壓調整率緊縮器140c包括光電耦合元件Pf、雙載子接面電晶體Bh、電阻Rt1、電阻Rt2、電阻Rt3、電阻Rt4、電阻Rt5、電阻Rt6(電阻Rt5與電阻Rt6為電壓偵測分壓電阻)、電阻Rt7與作為電壓偵測的並聯調節器Xh(或雙載子電晶體)。光電耦合元件Pf包含光二極體Dp與光電晶體Bp(電壓偵測旁通開關),光二極體Dp之陽極耦接電壓源Vcc。當光二極體Dp導通時發光,可使光電晶體Bp對應導通。Referring to FIG. 8C, the gate of the gold-oxygen half-effect transistor M of the current regulator 120 is coupled to the diode Dx, and the gate of the gold-oxygen half-effect transistor M is coupled to the voltage regulation rate reducer 140c. The line voltage adjustment rate reducer 140c includes a photocoupler element Pf, a bipolar junction transistor Bh, a resistor Rt1, a resistor Rt2, a resistor Rt3, a resistor Rt4, a resistor Rt5, and a resistor Rt6 (the resistor Rt5 and the resistor Rt6 are voltage detection points). Voltage resistor), resistor Rt7 and shunt regulator Xh (or bipolar transistor) for voltage detection. The photocoupler element Pf includes a photodiode Dp and a phototransistor Bp (voltage detection bypass switch), and an anode of the photodiode Dp is coupled to the voltage source Vcc. When the photodiode Dp is turned on, it emits light, so that the photo-electric crystal Bp can be turned on.

請同時參考圖8C及圖9A,假設忽略正弦電壓補償器(R1及R2)。當輸入電壓vi克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),且時(定義Vth Xh 為並聯調節器Xh的閥值電壓),並聯調節器Xh截止,光二極體Dp無迴路,光電晶體Bp截止,雙載子接面電晶體Bh之基極與射極間所接收的電壓Vbe 1, Bh 為電流檢測電阻160之跨壓V160 ,經過串聯之電阻Rt1及Rt2與電阻Rt3的分壓,設計此分壓不足以使雙載子接面電晶體Bh導通。因此,二極體Dx的迴路無法 形成,通過LED子陣列的電流由電流調節器120作調節(電流受到電阻Rx 規劃),通過LED子陣列的電流由I3上升至(對應至圖9A(d)、(e)及(f)部份的時間t4)。Please refer to FIG. 8C and FIG. 9A simultaneously, assuming that the sinusoidal voltage compensators (R1 and R2) are ignored. When the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), and When ( Vth Xh is defined as the threshold voltage of the shunt regulator Xh), the shunt regulator Xh is turned off, the photodiode Dp has no loop, the photonic crystal Bp is turned off, and the base and emitter of the bipolar junction transistor Bh are The received voltages Vbe 1, Bh are the voltage across the voltage detecting resistor 160 V 160 , and the voltage division of the series resistors Rt1 and Rt2 and the resistor Rt3 is designed to be insufficient to turn on the bipolar junction transistor Bh. Therefore, the loop of the diode Dx cannot be formed, the current through the LED sub-array is regulated by the current regulator 120 (the current is planned by the resistor Rx), and the current through the LED sub-array rises from I3 to (corresponding to time t4) of parts of parts (d), (e) and (f) of Fig. 9A.

隨輸入電壓vi繼續上升至克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )時,,並聯調節器Xh導通,光二極體Dp導通,光電晶體Bp導通而將電阻Rt2旁通。此時,雙載子接面電晶體Bh之基極與射極間所接收的電壓Vbe 2, Bh 為電流檢測電阻160之跨壓V160 經過串聯之電阻Rt1與電阻Rt3的分壓,此分壓可使雙載子接面電晶體Bh導通,使得金氧半場效電晶體M截止,輸入電流往下降,又使雙載子接面電晶體Bh截止。雙載子接面電晶體Bh如此操作於調節態,使金氧半場效電晶體M對應地操作於調節態,電流由I4H 降至(對應至圖9A(d)、(e)及(f)部份的時間t4’),定義Vbe , Bh 為雙載子接面電晶體Bh的閥值電壓。通過LED子陣列的電流穩定維持在I4L (其中電流I4H >I4L >I3),使電阻Rx兩端的電壓不足以導通並聯調節器X,電流主要受到線電壓調整率緊縮器140c的調節(電流受到電阻 Rt3規劃)。當輸入電壓下降至時,並聯調節器Xh又截止,光電晶體Bp截止,雙載子接面電晶體Bh截止,通過LED子陣列的電流由I4L 上升至I4H (時間t5’),通過LED子陣列的電流由電流調節器120穩定在I4H ,直到輸入電壓vi繼續下降無法克服所有LED子陣列的順向電壓降(vi<V G 1 +V G 2 +V G 3 +V G 4 =V G ),通過LED子陣列的電流由I4H 下降至I3(時間t5)。As the input voltage vi continues to rise to overcome the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), The shunt regulator Xh is turned on, the photodiode Dp is turned on, and the photo transistor Bp is turned on to bypass the resistor Rt2. At this time, the voltage Vbe 2, Bh received between the base and the emitter of the bipolar junction transistor Bh is the voltage division across the voltage V 160 of the current detecting resistor 160 through the series resistor Rt1 and the resistor Rt3. The voltage can make the bi-carrier junction transistor Bh turn on, so that the gold-oxygen half-field effect transistor M is turned off, the input current decreases, and the bi-carrier junction transistor Bh is turned off. A bipolar junction transistor operating in Bh adjustment state so that metal oxide semiconductor field effect transistor M corresponds to the adjustment operating mode, current is reduced by the I4 H (corresponding to time t4' of the portion of parts (a), (e) and (f) of Fig. 9), Vbe and Bh are defined as the threshold voltage of the bipolar junction transistor Bh. The current through the LED sub-array is maintained at I4 L (where current I4 H >I4 L >I3), so that the voltage across resistor Rx is insufficient to conduct shunt regulator X, and the current is primarily regulated by line voltage regulation rate reducer 140c ( The current is planned by the resistor Rt3). When the input voltage drops to When the shunt regulator Xh is turned off again, the phototransistor Bp is turned off, the bipolar junction transistor Bh is turned off, the current through the LED sub-array is raised from I4 L to I4 H (time t5'), and the current through the LED sub-array is current regulator 120 stabilize I4 H, until the input voltage vi continues to fall can not overcome the forward voltage drop of all the LED sub-array (vi <V G 1 + V G 2 + V G 3 + V G 4 = V G), by The current of the LED sub-array drops from I4 H to I3 (time t5).

綜上所述,於圖8A~8C與圖9A之實施例中,通過LED子陣列的電流I0~I3在線電壓調整率緊縮器140a、140b或140c設置後(圖9A之(d)、(e) 及(f)部份的波形)與線電壓調整率緊縮器140a、140b或140c設置前(圖9A之(a)、(b)及(c)部份的波形)實質上相同。線電壓調整率緊縮器140a、140b或140c的設置主要係改變輸入電壓克服所有LED子陣列的順向電壓降時,將通過LED子陣列的電流I4劃分為I4H 與I4L ,且I4=I4H >I4L >I4>I3>I2>I1。輸入電壓vi的有效值越高時,輸入電壓vi的波形於上升緣(rising edge)及下降緣(falling edge)斜率越大,表示通過LED子陣列的電流I4H 經過的時間t4至t4’間隔越短,故通過LED子陣列的電流I4L 的時間t4’至t5’間隔越長。因此,可以調整通過LED子陣列的電流ILED 與時間的積分面積,穩定平均電流而不受輸入電壓vi的有效值影響。In summary, in the embodiment of FIGS. 8A-8C and FIG. 9A, after the current voltage adjustment rate reducer 140a, 140b or 140c is set by the current I0~I3 of the LED sub-array ((d), (e of FIG. 9A) The waveforms of the parts (f) and (f) are substantially the same as those before the line voltage adjustment rate tighteners 140a, 140b or 140c are disposed (the waveforms of parts (a), (b) and (c) of Fig. 9A). The setting of the line voltage regulation rate reducer 140a, 140b or 140c is mainly to change the input voltage to overcome the forward voltage drop of all the LED sub-arrays, and divide the current I4 through the LED sub-array into I4 H and I4 L , and I4=I4 H >I4 L >I4>I3>I2>I1. The higher the effective value of the input voltage vi, the larger the slope of the rising edge and the falling edge of the waveform of the input voltage vi, indicating the time t4 to t4' elapsed by the current I4 H passing through the LED sub-array. The shorter, the longer the interval t4' to t5' of the current I4 L passing through the LED sub-array. Therefore, the integrated area of the current I LED and the time passing through the LED sub-array can be adjusted to stabilize the average current without being affected by the effective value of the input voltage vi.

請接著參考圖8D~8G之電路圖與圖9B之波形圖,圖8D~8G之LED光引擎電子控制裝置,係依照圖8A之LED光引擎電子控制裝置的架構,改變其中線電壓調整率緊縮器的實施架構。當然,圖8D~8G之線電壓調整率緊縮器的實施架構也可以應用於圖8B或8C之LED光引擎電子控制裝置的架構。Please refer to the circuit diagrams of FIG. 8D-8G and the waveform diagram of FIG. 9B. The LED light engine electronic control device of FIG. 8D-8G changes the line voltage adjustment rate compactor according to the architecture of the LED light engine electronic control device of FIG. 8A. Implementation architecture. Of course, the implementation architecture of the line voltage regulation rate reducer of Figures 8D-8G can also be applied to the architecture of the LED light engine electronic control unit of Figure 8B or 8C.

請先參考圖8D,電流調節器120耦接於一第一線電壓調整率緊縮器140a及一第二線電壓調整率緊縮器145a。第一線電壓調整率緊縮器140a包括金氧半場效電晶體Me、電阻Re1、電阻Re2、電阻Re3、電阻Re4(電阻Re3與電阻Re4為電壓偵測分壓電阻)、齊納二極體Ze與作為電壓偵測之並聯調節器Xe(或雙載子電晶體)。第二線電壓調整率緊縮器140b包括金氧半場效電晶體Mj、電阻Rj1、電阻Rj2、電阻Rj3、電阻Rj4(電阻Rj3與電阻Rj4為電壓偵測分壓電阻)、齊納二極體Zj與作為電壓偵測之並聯調節器Xj(或雙載子電晶體)。金氧半場效電晶體Mj之汲極透過一電阻Rj1耦接於電流調節器120,金氧半場效電晶體Mj之閘極透過電阻Rj2耦接於電流調節器 120,齊納二極體Zj與並聯調節器Xj耦接於金氧半場效電晶體Mj的閘極與源極間,並聯調節器Xj之參考極與陽極間設置一電阻Rj4。Referring to FIG. 8D, the current regulator 120 is coupled to a first line voltage regulation rate reducer 140a and a second line voltage regulation rate tightener 145a. The first line voltage regulation rate reducer 140a includes a metal oxide half field effect transistor Me, a resistor Re1, a resistor Re2, a resistor Re3, a resistor Re4 (the resistor Re3 and the resistor Re4 are voltage detecting voltage dividing resistors), and a Zener diode Ze And parallel regulator Xe (or dual carrier transistor) as voltage detection. The second line voltage regulation rate reducer 140b includes a gold oxide half field effect transistor Mj, a resistor Rj1, a resistor Rj2, a resistor Rj3, a resistor Rj4 (the resistor Rj3 and the resistor Rj4 are voltage detecting voltage dividing resistors), and a Zener diode Zj. And parallel regulator Xj (or dual carrier transistor) as voltage detection. The drain of the gold-oxygen half-field effect transistor Mj is coupled to the current regulator 120 through a resistor Rj1, and the gate of the gold-oxygen half-field effect transistor Mj is coupled to the current regulator through the resistor Rj2. 120, the Zener diode Zj and the shunt regulator Xj are coupled between the gate and the source of the gold-oxygen half field effect transistor Mj, and a resistor Rj4 is disposed between the reference pole and the anode of the shunt regulator Xj.

請同時參考圖8D及圖9B,假設忽略正弦電壓補償器(R1及R2)。當輸入電壓vi克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),同時,(定義Vth Xe 為並聯調節器Xe的閥值電壓,Vth Xj 為並聯調節器Xj的閥值電壓,其中,Vth Xe Vth Xj 可以相同或相近,且,此時,並聯調節器Xe截止,啟動電阻Re2提供金氧半場效電晶體Me之閘極電位而使之導通,並且,並聯調節器Xj截止,啟動電阻Rj2提供金氧半場效電晶體Mj之閘極電位而使之導通,此時,電阻Rx與Re1及Rj1並聯(阻值為Rx∥Re1∥Rj1),通過LED子陣列的電流由I3上 升至(對應至圖9B(d)、(e)及(f)部份的時間t4),定義Vth X 為電流調節器120中並聯調節器X的閥值電壓,並聯調節器X偵測並聯之電阻Rx、Re1與Rj1的阻值而操作於調節態,使金氧半場效電晶體M對應地操作於調節態,以將電流穩定在I4HPlease refer to FIG. 8D and FIG. 9B simultaneously, assuming that the sinusoidal voltage compensators (R1 and R2) are ignored. When the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), And (Defining Vth Xe is the threshold voltage of shunt regulator Xe, Vth Xj is the threshold voltage of shunt regulator Xj, where Vth Xe and Vth Xj may be the same or similar, and At this time, the shunt regulator Xe is turned off, the starting resistor Re2 provides the gate potential of the metal oxide half field effect transistor Me to be turned on, and the shunt regulator Xj is turned off, and the starting resistor Rj2 provides the gold oxide half field effect transistor Mj. The gate potential is turned on. At this time, the resistor Rx is connected in parallel with Re1 and Rj1 (the resistance is Rx∥Re1∥Rj1), and the current through the LED sub-array rises from I3 to (corresponding to time t4) of parts (d), (e) and (f) of Fig. 9B, it is defined that Vth X is the threshold voltage of the parallel regulator X in the current regulator 120, and the parallel regulator X detects the parallel resistance. Rx, Re1 and Rj1 resistance state is adjusted to operate the metal oxide semiconductor field effect transistor M corresponds to the adjustment operating mode, to stabilize the current I4 H.

當輸入電壓vi克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),同時,(Vth Xe 為並聯調節器Xe的閥值電壓,Vth Xj 為並聯調節器Xj的閥值電壓),此時,並聯調節器Xe截止,啟動電阻Re2提供金氧半場效電晶體Me之閘極電位而使之導通。並且,並聯調節器Xj導通,金氧半場效電晶體Mj之閘極電位被拉低而截止。此時,電阻Rx與Re1並聯(阻 值為Rx∥Re1),通過LED子陣列的電流由I4H 下降至(對應至圖9B(d)、(e)及(f)部份的時間t41 ),定義Vth X 為電流調節器120中並聯調 節器X的閥值電壓,並聯調節器X偵測並聯之電阻Rx與Re1的阻值而操作於調節態,使金氧半場效電晶體M對應地操作於調節態,以將電流穩定在I4MWhen the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), And ( Vth Xe is the threshold voltage of the shunt regulator Xe, Vth Xj is the threshold voltage of the shunt regulator Xj). At this time, the shunt regulator Xe is turned off, and the starting resistor Re2 provides the gate potential of the metal oxide half field effect transistor Me. And make it conductive. Moreover, the shunt regulator Xj is turned on, and the gate potential of the gold-oxygen half-field effect transistor Mj is pulled off and turned off. In this case, Re1 in parallel with the resistor Rx (resistance to Rx∥Re1), down to the current through the LED array by the sub-I4 H (corresponding to time t4 1 of part (d), (e) and (f) of Fig. 9B, Vth X is defined as the threshold voltage of the parallel regulator X in the current regulator 120, and the parallel regulator X detects the parallel connection. The resistances of the resistors Rx and Re1 are operated in the regulated state, so that the gold-oxygen half-effect transistor M operates correspondingly in the regulated state to stabilize the current at I4 M .

隨輸入電壓vi繼續上升至克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),且時,並聯調節器Xe及Xj均導通,金氧半場效電晶體Me及Mj之閘極電位均被拉低而截止。此時,電阻Rx的阻值較阻值Rx∥Re1更高,通過LED子陣列的電流由I4M 降至I4L (對應至圖9B(d)、(e)及(f)部份的時間t42 )。此時,並聯調節器X操作於調節態,使金氧半場效電晶 體M對應地操作於調節態,通過LED子陣列的電流穩定維持在As the input voltage vi continues to rise to overcome the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), and but When the parallel regulators Xe and Xj are both turned on, the gate potentials of the metal oxide half field effect transistors Me and Mj are pulled off and turned off. At this time, the resistance of the resistor Rx is higher than the resistance value Rx∥Re1, and the current through the LED sub-array is reduced from I4 M to I4 L (corresponding to the time of the parts of FIG. 9B(d), (e) and (f) T4 2 ). At this time, the shunt regulator X operates in the regulated state, so that the gold-oxygen half-field effect transistor M operates correspondingly in the regulated state, and the current through the LED sub-array is stably maintained. .

於輸入電壓vi之後半週期,輸入電壓vi開始下降至,且,但仍克服所有LED子陣列的順向電壓降(vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )時,並聯調節器Xe截止,金氧半場效電晶體Me導通。並且,並聯調節器Xj導通,金氧半場效電晶體Mj之閘極電位被拉低而截止。此時,電阻Rx與Re1並聯(阻值為Rx∥ Re1),通過LED子陣列的電流由I4L 又上升至(對應至圖9B(d)、(e)及(f)部份的時間t51 )。After the input voltage vi half cycle, the input voltage vi begins to drop to And However, while still overcoming the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), the shunt regulator Xe is turned off, the gold-oxygen half-field effect transistor Me Turn on. Moreover, the shunt regulator Xj is turned on, and the gate potential of the gold-oxygen half-field effect transistor Mj is pulled off and turned off. At this time, the resistor Rx is connected in parallel with Re1 (the resistance is Rx∥ Re1), and the current through the LED sub-array is increased from I4 L to (corresponding to time t5 1 of part (d), (e) and (f) of Fig. 9B.

當輸入電壓vi繼續下降至,且,但仍克服所有LED子陣列的順向電壓降(vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )時,並聯調節器Xe與Xj均截止,金氧半場效電晶體Me與Mj均導通,電阻Rx、Re1與Rj1並聯(其中,Rx∥Re1∥Rj1的阻值<Rx∥Re1的阻值<Rx的阻值)而具有較低的等效電阻,使通過LED子陣列的電流由I4M 上升至I4H (時間t52 ),通過LED子陣列的電流穩定在I4H , 直到輸入電壓vi繼續下降無法克服所有LED子陣列的順向電壓降(vi<V G 1 +V G 2 +V G 3 +V G 4 =V G ),通過LED子陣列的電流由I4H 下降至I3(時間t5)。When the input voltage vi continues to drop to And However, when the forward voltage drop of all LED sub-arrays is overcome (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), the shunt regulators Xe and Xj are both turned off, and the gold-oxygen half-field effect The transistors Me and Mj are both turned on, and the resistors Rx, Re1 and Rj1 are connected in parallel (wherein the resistance value of Rx ∥ Re1 ∥ Rj1 < the resistance value of Rx ∥ Re1 < Rx) has a lower equivalent resistance, so that The current of the LED sub-array rises from I4 M to I4 H (time t5 2 ), and the current through the LED sub-array is stabilized at I4 H until the input voltage vi continues to fall without overcoming the forward voltage drop of all LED sub-arrays (vi< V G 1 + V G 2 + V G 3 + V G 4 = V G ), the current through the LED sub-array drops from I4 H to I3 (time t5).

請參考圖8E,其繪示依照本發明另一實施例之線電壓調整率緊縮器140a的實施方式。圖8E之電流調節器120與線電壓調整率緊縮器140a的結構及實施方式相同或相似於圖8A之實施方式,主要差異在於圖8E之電流調節器120與線電壓調整率緊縮器140a設置於電流檢測電阻160與LED陣列之陰極端間。Please refer to FIG. 8E, which illustrates an embodiment of a line voltage regulation rate reducer 140a in accordance with another embodiment of the present invention. The current regulator 120 of FIG. 8E is the same as or similar to the embodiment of the line voltage regulation rate reducer 140a, and the main difference is that the current regulator 120 and the line voltage adjustment rate tightener 140a of FIG. 8E are disposed on The current sense resistor 160 is between the cathode terminal of the LED array.

於圖8E之實施例中,假設忽略正弦電壓補償器(R1及R2)以及電流檢測電阻160兩端的跨壓V160 ,電阻Re3與電阻Re4(電壓偵測分壓電阻)之節點主要係偵測輸入電壓vi克服所有LED子陣列的順向電壓降(vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )的時候,於此時期,旁通開關S1、S2及S3皆導通。電阻Re3與電阻Re4之節點所分到的電壓為輸入電壓vi扣除所有LED子陣列的順向電壓降V G 後,於電阻Re3與電阻Re4作分壓(即,,此特徵與圖8A相近,表示圖8E之線電壓調整率緊縮器140a對於輸入電壓vi的偵測方式與圖8A的偵測方式相近,其調控方式容此不再贅述。換句話說,不論將電流調節器120與線電壓調整率緊縮器140a設置於輸入電壓vi端(high side)或接地端(low side),皆不影響其作用結果。FIG. 8E of the embodiments, it is assumed to ignore a sinusoidal voltage compensator (R1 and R2) and across the current detecting resistor 160 of the voltage across the 160 V, the resistance of the resistor Re3 and Re4 (detection voltage dividing resistors) the mainly detection node When the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), during this period, the bypass switches S1, S2 and S3 All are conductive. The voltage divided by the node of the resistor Re3 and the resistor Re4 is the input voltage vi minus the forward voltage drop V G of all the LED sub-arrays, and then the voltage is divided by the resistor Re3 and the resistor Re4 (ie, This feature is similar to that of FIG. 8A, and indicates that the line voltage adjustment rate tightener 140a of FIG. 8E detects the input voltage vi in a similar manner to the detection mode of FIG. 8A, and the control manner thereof will not be described again. In other words, regardless of whether the current regulator 120 and the line voltage regulation rate reducer 140a are disposed on the input side vi side or the low side, the effect of the operation is not affected.

請接著參照圖8F之實施例中,線電壓調整率緊縮器146a可以包括旁路電阻Ra5、電壓偵測分壓電阻(電阻Re3及電阻Re4)、控制電路142及金氧半場效電晶體M5。假設忽略正弦電壓補償器(R1及R2)以及電流檢測電阻160兩端的跨壓V160 ,電阻Re3與電阻Re4(電壓偵測分壓電阻)之節點同時耦接於通過整流器100之輸入電壓vi以及控制電路142的輸入端,用 以偵測輸入電壓vi,並將輸入電壓vi之分壓供應至控制電路142。電流調節器120設於電流檢測電阻160與LED陣列之陰極端之間,電流調節器120中的金氧半場效電晶體M之源極,透過電阻Re5耦接於金氧半場效電晶體M5之汲極,且金氧半場效電晶體M5之閘極耦接至控制電路142的輸出端。Referring to the embodiment of FIG. 8F, the line voltage regulation rate reducer 146a may include a shunt resistor Ra5, a voltage detecting voltage dividing resistor (resistor Re3 and resistor Re4), a control circuit 142, and a MOS field effect transistor M5. Ignore assumed sinusoidal voltage compensator (R1 and R2) and across the current detecting resistor 160 across the voltage V 160, the resistance of the resistor Re3 and Re4 (detection voltage dividing resistors) coupled to the nodes simultaneously via the input 100 of the rectifier and voltage vi The input end of the control circuit 142 is configured to detect the input voltage vi and supply the divided voltage of the input voltage vi to the control circuit 142. The current regulator 120 is disposed between the current detecting resistor 160 and the cathode end of the LED array, and the source of the metal oxide half field effect transistor M in the current regulator 120 is coupled to the gold oxide half field effect transistor M5 through the resistor Re5. The gate of the MOSFET and the gate of the MOS transistor M5 is coupled to the output of the control circuit 142.

於此實施例中,當輸入電壓vi尚未克服所有LED子陣列的順向電壓降(vi<V G 1 +V G 2 +V G 3 +V G 4 =V G )而處於相對低壓時,控制電路142偵測輸入電壓vi於電阻Re3與電阻Re4之節點分壓後,使金氧半場效電晶體M5恆導通,此時,並聯調節器X偵測電阻Rx∥Re5的阻值後切換於導通與截止之間,使金氧半場效電晶體M對應地切換於截止與導通而進入調節態,通過LED子陣列的電流受到電阻Rx並聯Re5的阻值(Rx∥Re5)所控制。In this embodiment, when the input voltage vi has not overcome the forward voltage drop of all LED sub-arrays (vi < V G 1 + V G 2 + V G 3 + V G 4 = V G ) and is at a relatively low voltage, control The circuit 142 detects that the input voltage vi is divided by the node of the resistor Re3 and the resistor Re4, so that the gold-oxygen half-field effect transistor M5 is constantly turned on. At this time, the parallel regulator X detects the resistance of the resistor Rx∥Re5 and then switches to the conduction. Between the cut-off and the cut-off, the gold-oxide half-effect transistor M is switched to be turned off and on to enter the regulated state, and the current passing through the LED sub-array is controlled by the resistance (Rx ∥ Re5) of the resistor Rx in parallel with Re5.

當輸入電壓vi克服所有LED子陣列的順向電壓降(vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )而處於相對高壓時,此時的金氧半場效電晶體M5類似於可變電阻。控制電路142偵測輸入電壓vi於電阻Re3與電阻Re4之節點分壓後,使金氧半場效電晶體M5的通道由導通趨向截止。即,金氧半場效電晶體M5的通道電阻逐漸變大,此種阻值的改變為連續且平滑地變化。此時,電流調節器120調節通過LED子陣列的電流,此電流受到電阻Rx及電阻Re5與金氧半場效電晶體M5之阻值(R M 5 )和的並聯電阻所控制,並聯之等效阻值為Rx∥(Re5+R M 5 ),且金氧半場效電晶體M5之阻值R M 5 會受到輸入電壓vi的變化而改變。換句話說,當輸入電壓vi克服所有LED子陣列的順向電壓降(處於相對高壓區)時,通過LED子陣列的電流受到等效阻值為Rx∥(Re5+R M 5 )所調控,等效阻值的範圍為Rx∥Re5<Rx∥(Re5+R M 5 )<Rx。當輸入電壓vi由(vi<V G 1 +V G 2 +V G 3 +V G 4 =V G )甫上升至(vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )時,金氧半場效電晶體M5之通道阻值R M 5 最小(接近0),此時,具有最小之等效電阻值Rx∥(Re5+R M 5 ),僅略大於 Rx∥Re5。隨著輸入電壓vi持續上升,金氧半場效電晶體M5的通道由導通趨向截止,且通道阻值R M 5 也逐漸變大,使得等效電阻值Rx∥(Re5+R M 5 )也變大,通過LED子陣列的電流會逐漸減少。當輸入電壓vi繼續上升至金氧半場效電晶體M5的通道完全截止(R M 5 接近∞)而斷路,等效電阻值為Rx,使得通過LED子陣列的電流受到電阻Rx的阻值所控制。When the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ) and is at a relatively high voltage, the gold-oxygen half-field effect at this time The crystal M5 is similar to a variable resistor. The control circuit 142 detects that the input voltage vi is divided by the node of the resistor Re3 and the resistor Re4, so that the channel of the metal oxide half field effect transistor M5 is turned off by conduction. That is, the channel resistance of the MOS field-effect transistor M5 gradually becomes larger, and the change in the resistance value changes continuously and smoothly. At this time, the current regulator 120 regulates the current through the LED sub-array, and the current is controlled by the resistance of the resistor Rx and the resistor Re5 and the resistance of the MOS field M5 ( R M 5 ) and the parallel resistance. The resistance value is Rx∥(Re5+ R M 5 ), and the resistance value R M 5 of the gold-oxygen half-field effect transistor M5 is changed by the change of the input voltage vi. In other words, when the input voltage vi overcomes the forward voltage drop of all LED sub-arrays (in the relatively high voltage region), the current through the LED sub-array is regulated by the equivalent resistance value Rx∥(Re5+ R M 5 ), etc. The range of the effect resistance value is Rx ∥ Re5 < Rx ∥ (Re5 + R M 5 ) < Rx. When the input voltage vi is raised by (vi < V G 1 + V G 2 + V G 3 + V G 4 = V G ) ( (vi > V G 1 + V G 2 + V G 3 + V G 4 = V When G ), the channel resistance value R M 5 of the gold-oxygen half-field effect transistor M5 is the smallest (close to 0). At this time, it has the smallest equivalent resistance value Rx∥(Re5+ R M 5 ), which is only slightly larger than Rx∥Re5. As the input voltage vi continues to rise, the channel of the gold-oxygen half-field effect transistor M5 is turned off by conduction, and the channel resistance R M 5 is also gradually increased, so that the equivalent resistance value Rx ∥ (Re5+ R M 5 ) also becomes larger. The current through the LED sub-array will gradually decrease. When the input voltage vi continues to rise until the channel of the gold-oxygen half-effect transistor M5 is completely turned off ( R M 5 is close to ∞) and the circuit is broken, the equivalent resistance value is Rx, so that the current passing through the LED sub-array is controlled by the resistance of the resistor Rx. .

請接著參照圖8G,電流調節器120耦接於線電壓調整率緊縮器148a。線電壓調整率緊縮器148a透過電阻Re1及電阻Rk1耦接至電流調節器120的電阻Rx,線電壓調整率緊縮器148a更包括金氧半場效電晶體Me及Mk,電阻Re2、電阻Re3、電阻Re4、電阻Rk2、電阻Rk3及電阻Rk4,並聯調節器Xe及Xk,齊納二極體Ze及Zk。於此實施例中,假設忽略正弦電壓補償器(R1及R2)以及電流檢測電阻160兩端的跨壓V160 ,當輸入電壓vi克服所有LED子陣列的順向電壓降(vi>V G 1 +V G 2 +V G 3 +V G 4 =V G )且時,(其中Vth Xe 為並聯調節器Xe的閥值電壓,Vth Xk 為並聯調節器Xk的閥值電壓,Vth Xe Vth Xk 相同 或相近,且),並聯調節器Xe及Xk均截止,金氧半場效電晶體Me及Mk均導通,使得Re1及Rk1均被旁通,使電流調節器120受控於最小的等效電阻Rx,而提供最大的等效電流I4HReferring next to FIG. 8G, the current regulator 120 is coupled to the line voltage regulation rate reducer 148a. The line voltage regulation rate tightener 148a is coupled to the resistor Rx of the current regulator 120 through the resistor Re1 and the resistor Rk1. The line voltage adjustment rate tightener 148a further includes a metal oxide half field effect transistor Me and Mk, a resistor Re2, a resistor Re3, and a resistor. Re4, resistor Rk2, resistor Rk3 and resistor Rk4, shunt regulators Xe and Xk, Zener diodes Ze and Zk. In this embodiment, it is assumed negligible cross voltage V sinusoidal voltage compensator 160 (R1 and R2), and both ends of the current detection resistor 160, when the input voltage vi overcome all the sub-arrays LED forward voltage drop (vi> V G 1 + V G 2 + V G 3 + V G 4 = V G ) and but When Vth Xe is the threshold voltage of the shunt regulator Xe, Vth Xk is the threshold voltage of the shunt regulator Xk, Vth Xe is the same or similar to Vth Xk , and ), the shunt regulators Xe and Xk are both turned off, and the gold-oxygen half-field effect transistors Me and Mk are both turned on, so that both Re1 and Rk1 are bypassed, so that the current regulator 120 is controlled by the minimum equivalent resistance Rx, and provides maximum The equivalent current I4 H .

當輸入電壓vi上升至克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),且時,並聯調節器Xe導通但並聯調節器Xk截止,金氧半場效電晶體Me截止但金氧半場效電晶體Mk導通,使得Rk1被旁通,等效電阻為電阻Rx串聯電阻Re1(電阻Rx+Re1),提供對應之等效電流I4M (電流I4M <I4H )。When the input voltage vi rises to overcome the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), and but When the shunt regulator Xe is turned on but the shunt regulator Xk is turned off, the gold-oxygen half field effect transistor Me is turned off but the gold-oxygen half field effect transistor Mk is turned on, so that Rk1 is bypassed, and the equivalent resistance is the resistance Rx series resistance Re1 (resistance Rx +Re1), providing the corresponding equivalent current I4 M (current I4 M <I4 H ).

當輸入電壓vi繼續上升至克服所有LED子陣列的順向電壓降 (vi>V G 1 +V G 2 +V G 3 +V G 4 =V G ),時,並聯調節器Xe及Xk均導通,金氧半場效電晶體Me及Mk均截止,使得等效電阻為電阻Rx串聯電阻Re1再串聯Rk1(電阻Rx+Re1+Rk1),對應之等效電流為I4L (電流I4L <I4M <I4H )。When the input voltage vi continues to rise to overcome the forward voltage drop of all LED sub-arrays (vi > V G 1 + V G 2 + V G 3 + V G 4 = V G ), And When the parallel regulators Xe and Xk are both turned on, the metal oxide half field effect transistors Me and Mk are cut off, so that the equivalent resistance is the resistance Rx series resistance Re1 and then the series Rk1 (resistance Rx+Re1+Rk1), corresponding to the equivalent current Is I4 L (current I4 L <I4 M <I4 H ).

於輸入電壓vi之後半段週期,輸入電壓vi開始往下降,使得並聯調節器Xk及Xe由原本的導通狀態又相繼被截止,等效電阻由電阻值(Rx+Re1+Rk1)降低為電阻值(Rx+Re1),再將低至電阻值(Rx),如此一來,對應的等效電流由I4L 升高為I4M 再升高至I4HDuring the second half of the input voltage vi, the input voltage vi begins to decrease, so that the parallel regulators Xk and Xe are successively turned off by the original conduction state, and the equivalent resistance is reduced from the resistance value (Rx+Re1+Rk1) to the resistance value. (Rx+Re1), which will be as low as the resistance value (Rx), so that the corresponding equivalent current rises from I4 L to I4 M and then rises to I4 H .

請同時參考圖8D~8G與圖9B,於實施例中,通過LED子陣列的電流I0~I3在線電壓調整率緊縮器140a、140a及145a、146a或148a設置後(圖9B之(d)、(e)及(f)部份的波形)與線電壓調整率緊縮器140a、140a及145a、146a或148a設置前(圖9B之(a)、(b)及(c)部份的波形)實質上相同,表示線電壓調整率緊縮器140a、140a及145a、146a或148a的設置主要係改變輸入電壓克服所有LED子陣列的順向電壓降時,將通過LED子陣列的電流I4劃分為I4H 、I4M 與I4L ,且I4=I4H >I4M >I4L >I3>I2>I1。輸入電壓vi的有效值越高時,輸入電壓vi的波形於上升緣(rising edge)及下降緣(falling edge)斜率越大,表示通過LED子陣列的電流I4H 經過的時間t4至t41 及t52 至t5間隔越短,通過LED子陣列的電流I4M 及/或I4L 的時間t41 至t42 及t51 至t52 及/或t42 至t51 間隔越長。因此,可以調整通過LED子陣列的電流ILED 與時間的積分面積,穩定平均電流而不受輸入電壓vi的有效值影響。於實施例中,線電壓調整率緊縮器的數量可以為n階,使得通過LED子陣列的電流I4被劃分為n+1階。Please refer to FIGS. 8D-8G and FIG. 9B at the same time. In the embodiment, after the current voltage adjustment ratios 140a, 140a and 145a, 146a or 148a are set by the current I0~I3 of the LED sub-array ((d) of FIG. 9B, (e) and (f) part of the waveform) and the line voltage adjustment rate tighteners 140a, 140a and 145a, 146a or 148a before setting (waveforms of parts (a), (b) and (c) of Fig. 9B) Substantially the same, indicating that the line voltage regulation rate reducers 140a, 140a and 145a, 146a or 148a are arranged to change the input voltage to overcome the forward voltage drop of all LED sub-arrays, dividing the current I4 through the LED sub-array into I4. H , I4 M and I4 L , and I4=I4 H >I4 M >I4 L >I3>I2>I1. The higher the effective value of the input voltage vi, the larger the slope of the rising edge and the falling edge of the waveform of the input voltage vi, indicating the time t4 to t4 1 of the current I4 H passing through the LED sub-array and The shorter the interval between t5 2 and t5, the longer the interval between the times t4 1 to t4 2 and t5 1 to t5 2 and/or t4 2 to t5 1 of the current I4 M and/or I4 L passing through the LED sub-array. Therefore, the integrated area of the current I LED and the time passing through the LED sub-array can be adjusted to stabilize the average current without being affected by the effective value of the input voltage vi. In an embodiment, the number of line voltage regulation rate reducers may be n steps such that current I4 through the LED sub-array is divided into n+1 steps.

圖10A及10B所示為依照圖1A之LED光引擎的電子控制裝置的不同實施例之具體電路示意圖。請先參考圖10A,此LED光引擎的電子控制裝置包括複數個閃爍抑制電容Cg1、Cg2、Cg3及Cg4,與複數個二極體Dg1、Dg2、Dg3及Dg4,各個閃爍抑制電容Cg1、Cg2、Cg3及Cg4分別並聯於對應之外部LED子陣列G1、G2、G3及G4,且各個二極體Dg1、Dg2、Dg3及Dg4之陰極耦接至對應之外部LED子陣列G1、G2、G3及G4的陽極。於一實施例中,可以由非電解電容所組成M×N矩陣來實施閃爍抑制電容的實施態樣。舉例來說,可選擇使用非電解電容例如係陶瓷電容(ceramic capacitors)、鉭電容(tantalum capacitors)及固態電容(solid-state capacitors)等非電解電容,透過建立M列(row)的非電解電容來建立電壓額定(voltage rating),並透過N行(column)的非電解電容來建立電流額定(current rating),如此,可以避免使用短壽命的電解電容(electrolytic capacitor)。當然,若不考慮使用期限的長短,也可以選用電解電容作為閃爍抑制電容Cg1、Cg2、Cg3及Cg4。10A and 10B are schematic circuit diagrams showing different embodiments of an electronic control unit of the LED light engine of FIG. 1A. Referring first to FIG. 10A, the electronic control device of the LED light engine includes a plurality of scintillation suppression capacitors Cg1, Cg2, Cg3, and Cg4, and a plurality of diodes Dg1, Dg2, Dg3, and Dg4, and respective scintillation suppression capacitors Cg1 and Cg2. Cg3 and Cg4 are respectively connected in parallel to the corresponding external LED sub-arrays G1, G2, G3 and G4, and the cathodes of the respective diodes Dg1, Dg2, Dg3 and Dg4 are coupled to the corresponding external LED sub-arrays G1, G2, G3 and G4 The anode. In an embodiment, the embodiment of the flicker suppression capacitor can be implemented by an M×N matrix composed of non-electrolytic capacitors. For example, non-electrolytic capacitors such as ceramic capacitors, tantalum capacitors, and solid-state capacitors can be used to establish non-electrolytic capacitors of M columns. To establish a voltage rating and establish a current rating through a column of non-electrolytic capacitors, thus avoiding the use of short-lived electrolytic capacitors. Of course, electrolytic capacitors can also be used as the scintillation suppression capacitors Cg1, Cg2, Cg3, and Cg4, regardless of the length of use.

以下先說明於輸入電壓的第一次週期期間,閃爍抑制電容Cg1、Cg2、Cg3及Cg4在零初始狀態(即完全放電)下,LED子陣列的點亮與熄滅的方式。Hereinafter, the manner in which the blink suppression capacitors Cg1, Cg2, Cg3, and Cg4 are turned on and off in the zero initial state (ie, full discharge) during the first period of the input voltage will be described.

於一週期之前半,當旁通開關S15、S25及S35的通道建立而均導通成串聯之旁通開關列時,二極體Dg1~Dg4順偏,輸入電壓vi透過二極體Dg1~Dg4以分別對閃爍抑制電容Cg1~Cg4充電。於此階段,閃爍抑制電容Cg1~Cg4係串聯充電。直到當輸入電壓vi克服最後一級LED子陣列G4之順向電壓降(VG4 )時,閃爍抑制電容Cg4充電生電壓VG4 後維持於電壓VG4 。此時,輸入電壓vi繼續透過二極體Dg1~Dg3以對閃爍抑制電容Cg1~Cg3充電,同時,輸入電流點亮G4並通過電流檢測電阻160。In the first half of the cycle, when the channels of the bypass switches S15, S25 and S35 are established and are turned into a series of bypass switch columns, the diodes Dg1 to Dg4 are biased, and the input voltage vi is transmitted through the diodes Dg1 to Dg4. The flicker suppression capacitors Cg1 to Cg4 are respectively charged. At this stage, the flicker suppression capacitors Cg1 to Cg4 are charged in series. When the input voltage vi until the last LED overcome the G4 sub-array along a forward voltage drop (V G4), Cg4 flicker suppression capacitor charging voltage V G4 green sustain voltage V G4. At this time, the input voltage vi continues to pass through the diodes Dg1 to Dg3 to charge the flicker suppression capacitors Cg1 to Cg3, and the input current illuminates G4 and passes through the current detecting resistor 160.

當輸入電壓vi上升至克服倒數兩級LED子陣列G3及G4之順向電壓降(VG3 +VG4 ),且介於LED子陣列G3及G4之順向電壓降(VG3 +VG )與LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )之間時,旁通開關S35截止,旁通開關S25轉為調節態,輸入電流經旁通開關S15至S25後,通過並點亮LED子陣列G3及G4,此時,閃爍抑制電容Cg3充電至電壓VG3 後維持於電壓VG3 。此時,輸入電壓vi持續透過二極體Dg1及Dg2對閃爍抑制電容Cg1及Cg2進行充電。When the input voltage vi rises to overcome the forward voltage drop (V G3 + V G4 ) of the inverse two-stage LED sub-arrays G3 and G4, and the forward voltage drop (V G3 + V G ) between the LED sub-arrays G3 and G4 When there is a forward voltage drop (V G2 + V G3 + V G4 ) between the LED sub-arrays G2, G3 and G4, the bypass switch S35 is turned off, the bypass switch S25 is turned into an adjusted state, and the input current is passed through the bypass switch S15. After S25, the LED sub-arrays G3 and G4 are turned on and turned on. At this time, the flicker suppression capacitor Cg3 is charged to the voltage V G3 and then maintained at the voltage V G3 . At this time, the input voltage vi continues to charge the flicker suppression capacitors Cg1 and Cg2 through the diodes Dg1 and Dg2.

當輸入電壓vi上升至克服LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 ),且介於LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )與第一至四級LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )之間時,旁通開關S25及S35截止,旁通開關S15轉為調節態,輸入電流經旁通開關S15至LED子陣列G2、G3至LED子陣列G4以點亮LED子陣列G2、G3及G4,閃爍抑制電容Cg2充電至電壓VG2 後維持於電壓VG2 。此時,輸入電壓vi持續透過二極體Dg1對閃爍抑制電容Cg1進行充電。When the input voltage vi rises to overcome the forward voltage drop of the LED sub-arrays G2, G3, and G4 (V G2 + V G3 + V G4 ), and the forward voltage drop between the LED sub-arrays G2, G3, and G4 (V G2 ) +V G3 +V G4 ) and the forward voltage drop (V G1 +V G2 +V G3 +V G4 ) between the first to fourth LED sub-arrays G1, G2, G3 and G4, the bypass switch S25 and S35 is cut off, the bypass switch S15 is turned into an adjusted state, and the input current is passed through the bypass switch S15 to the LED sub-arrays G2, G3 to the LED sub-array G4 to illuminate the LED sub-arrays G2, G3, and G4, and the flicker suppression capacitor Cg2 is charged to the voltage. V G2 is maintained at voltage V G2 . At this time, the input voltage vi continues to charge the flicker suppression capacitor Cg1 through the diode Dg1.

直到輸入電壓vi上升至克服所有的LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )時,閃爍抑制電容Cg1充電至電壓VG1 後維持於電壓VG1 。此時,由於雙載子接面電晶體B1、B2及B3皆處於導通狀態,旁通開關S15、S25及S35均截止,輸入電流經LED子陣列G1、G2及G3至LED子陣列G4,以點亮第一至四級LED子陣列G1、G2、G3及G4,並通過電流檢測電阻160。電流調節器120將通過LED子陣列G1、G2、G3至G4的電流維持在I4。Until the input voltage vi rises to overcome the forward voltage drop (V G1 +V G2 +V G3 +V G4 ) of all the LED sub-arrays G1, G2, G3 and G4, the flicker suppression capacitor Cg1 is maintained after being charged to the voltage V G1 . At voltage V G1 . At this time, since the bipolar junction transistors B1, B2, and B3 are all in the on state, the bypass switches S15, S25, and S35 are all turned off, and the input current is passed through the LED sub-arrays G1, G2, and G3 to the LED sub-array G4 to The first to fourth stage LED sub-arrays G1, G2, G3, and G4 are lit and passed through the current detecting resistor 160. Current regulator 120 maintains the current through LED sub-arrays G1, G2, G3 through G4 at I4.

於一週期後半,輸入電壓vi開始下降至克服倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 ),且介於LED子陣列G2、G3及 G4之順向電壓降(VG2 +VG3 +VG4 )與第一至四級LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )之間,二極體Dg1逆偏,且閃爍抑制電容Cg1放電以點亮LED子陣列G1。此時,雙載子接面電晶體B2及B3皆處於導通狀態,旁通開關S25及S35均截止,旁通開關S15轉為調節態,輸入電流經旁通開關S15點亮倒數三級LED子陣列G2、G3及G4,並通過電流檢測電阻160,以將導通過LED子陣列G2、G3及G4的電流維持在I3。In the second half of the cycle, the input voltage vi begins to drop to overcome the forward voltage drop (V G2 + V G3 + V G4 ) of the third-order LED sub-arrays G2, G3, and G4, and is interposed between the LED sub-arrays G2, G3 and Forward voltage drop of G4 (V G2 +V G3 +V G4 ) and forward voltage drop of first to fourth LED sub-arrays G1, G2, G3 and G4 (V G1 +V G2 +V G3 +V G4 ) Between the diodes Dg1 is reverse biased, and the flicker suppression capacitor Cg1 is discharged to illuminate the LED sub-array G1. At this time, the dual-carrier junction transistors B2 and B3 are all in the on state, the bypass switches S25 and S35 are both turned off, the bypass switch S15 is turned into the regulation state, and the input current is turned on by the bypass switch S15 to turn the third-order LED Sub-arrays G2, G3, and G4 pass through current sense resistor 160 to maintain the current through LED sub-arrays G2, G3, and G4 at I3.

隨輸入電壓vi繼續下降至克服倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 ),且介於倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )與倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )之間,二極體Dg1及Dg2逆偏。閃爍抑制電容Cg1及Cg2分別放電,以點亮LED子陣列G1及G2。此時,電流檢測電阻160之跨壓不足以導通雙載子接面電晶體B1,旁通開關S15轉為導通態。同時,雙載子接面電晶體B2透過防箝位電阻Rx2偵測電流檢測電阻160之跨壓後導通,拉低旁通開關S25之閘源極間電壓而截止旁通開關S25,流經電流檢測電阻160之電流下降,使雙載子接面電晶體B2截止,旁通開關S25又導通而進入調節態,雙載子接面電晶體B3處於導通狀態,旁通開關S35截止,輸入電流I2通過旁通開關S15及S25點亮LED子陣列G3及G4,並通過電流檢測電阻160。As the input voltage vi continues to drop to overcome the forward voltage drop (V G3 + V G4 ) of the countdown secondary LED sub-arrays G3 and G4, and the forward voltage drop between the reciprocal secondary LED sub-arrays G3 and G4 ( between V G3 + V G4) and the sub-array LED G2, G3 and G4 of three reciprocal cis forward voltage drop (V G2 + V G3 + V G4), diodes Dg1 and Dg2 reverse bias. The flicker suppression capacitors Cg1 and Cg2 are respectively discharged to illuminate the LED sub-arrays G1 and G2. At this time, the voltage across the current detecting resistor 160 is insufficient to turn on the bipolar junction transistor B1, and the bypass switch S15 is turned into an on state. At the same time, the bipolar contact transistor B2 detects the voltage across the voltage detecting resistor 160 through the anti-clamping resistor Rx2, and pulls down the voltage between the gate and the source of the bypass switch S25 to turn off the bypass switch S25, and flows through the current. The current of the detecting resistor 160 drops, the bipolar junction transistor B2 is turned off, the bypass switch S25 is turned on again and enters the regulation state, the bipolar junction transistor B3 is in the on state, the bypass switch S35 is turned off, and the input current I2 is turned off. The LED sub-arrays G3 and G4 are lit by the bypass switches S15 and S25, and passed through the current detecting resistor 160.

隨輸入電壓vi繼續下降至克服最後一級LED子陣列G4之順向電壓降(VG4 ),且介於LED子陣列G4之順向電壓降(VG4 )與最後二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )間,二極體Dg1、Dg2及Dg3逆偏,閃爍抑制電容Cg1、Cg2及Cg3分別放電,以點亮LED子陣列G1、G2及G3。此時,電流檢測電阻160之跨壓不足以導通雙載子接面電晶體B1及B2,旁通開關S15及S25分別轉為導通態。雙載子接面電晶體B3透過防箝位電阻Rx3偵測電流檢測電阻160之跨壓後快速地切換於導通態與截止態,使得旁通 開關S35對應地進入調節態,輸入電流I1通過並點亮LED子陣列G4,且通過電流檢測電阻160。Vi with the input voltage continues to drop to overcome the last stage G4 of the LED arrays to the sub-cis voltage drop (V G4), and G4 between the sub-arrays of LED forward voltage drop (V G4) and the last two sub-array LED G3 and G4 During the forward voltage drop (V G3 + V G4 ), the diodes Dg1, Dg2, and Dg3 are reversely biased, and the flicker suppression capacitors Cg1, Cg2, and Cg3 are respectively discharged to illuminate the LED sub-arrays G1, G2, and G3. At this time, the voltage across the current detecting resistor 160 is insufficient to turn on the bipolar junction transistors B1 and B2, and the bypass switches S15 and S25 are respectively turned into an on state. The bipolar junction transistor B3 detects the voltage across the current detecting resistor 160 through the anti-clamping resistor Rx3, and then quickly switches between the on state and the off state, so that the bypass switch S35 enters the regulation state correspondingly, and the input current I1 passes through The LED sub-array G4 is lit and passed through the current detecting resistor 160.

於輸入電壓的第一次週期以後,閃爍抑制電容Cg1、Cg2、Cg3及Cg4的初始狀態建立並達到穩態(充電完成),以下說明於穩態期間,LED子陣列的點亮與熄滅的方式。於一週期之前半,輸入電壓vi小於最後一級LED子陣列G4之順向電壓降(VG4 )時,二極體Dg1、Dg2、Dg3及Dg4逆偏,閃爍抑制電容Cg1、Cg2、Cg3及Cg4放電以分別點亮LED子陣列G1、G2、G3及G4,避免空載時間(dead time)發生。After the first cycle of the input voltage, the initial states of the flicker suppression capacitors Cg1, Cg2, Cg3, and Cg4 are established and reach a steady state (charge completion). The following describes the manner in which the LED sub-array is turned on and off during steady state. . In the first half of a cycle, when the input voltage vi is smaller than the forward voltage drop (V G4 ) of the last LED sub-array G4, the diodes Dg1, Dg2, Dg3, and Dg4 are reverse biased, and the flicker suppression capacitors Cg1, Cg2, Cg3, and Cg4 Discharge to illuminate the LED sub-arrays G1, G2, G3, and G4, respectively, to avoid dead time.

當輸入電壓vi上升至克服最後一級LED子陣列G1之順向電壓降(VG4 ),且介於最後一級LED子陣列G4之順向電壓降(VG4 )與最後二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )之間,二極體Dg1、Dg2及Dg3逆偏,閃爍抑制電容Cg1、Cg2及Cg3放電,以分別點亮LED子陣列G1、G2及G3。二極體Dg4順偏,輸入電流點亮最後一級LED子陣列G4,並對閃爍抑制電容Cg4重新充電(Recharge)至電壓VG4 ,且通過電流檢測電阻160。雙載子接面電晶體B3透過防箝位電阻Rx3偵測電流檢測電阻160之跨壓後切換於導通與截止之間,使旁通開關S35快速切換於截止與導通之間而進入調節態,以將通過LED子陣列G4的電流維持在I1。When the input voltage vi rises to overcome a last sub-LED arrays along the G1 to the voltage drop (V G4), and the last one is interposed along G4 sub-array of LED forward voltage drop (V G4) and the last two sub-LED arrays and G3 Between the forward voltage drop of G4 (V G3 + V G4 ), the diodes Dg1, Dg2, and Dg3 are reversely biased, and the flicker suppression capacitors Cg1, Cg2, and Cg3 are discharged to illuminate the LED sub-arrays G1, G2, and G3, respectively. The diode Dg4 is biased, the input current illuminates the last stage LED sub-array G4, and the flicker suppression capacitor Cg4 is recharged to the voltage V G4 and passed through the current sense resistor 160. The double carrier junction transistor B3 detects the voltage across the current detecting resistor 160 through the anti-clamping resistor Rx3 and switches between the conduction and the off, so that the bypass switch S35 is quickly switched between the off and the conduction to enter the regulation state. The current through LED sub-array G4 is maintained at I1.

當輸入電壓vi上升至克服倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 ),且介於倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )與倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )之間時,二極體Dg1及Dg2逆偏,閃爍抑制電容Cg1及Cg2放電以分別點亮LED子陣列G1及G2。同時,二極體Dg3順偏,輸入電流經旁通開關S15及S25至LED子陣列G3至LED子陣列G4以點亮LED子陣列G3及G4,並分別對閃爍抑制電容Cg3及Cg4重新充電至電壓VG3 及VG4 。此時,輸入電流通過電流檢測電 阻160,雙載子接面電晶體B2透過防箝位電阻Rx2偵測電流檢測電阻160之跨壓後快速地切換於導通與截止之間,使旁通開關S25對應切換於截止與導通之間而進入調節態,以將通過LED子陣列G3及G4的電流維持在I2。雙載子接面電晶體B3透過防箝位電阻Rx3偵測電流檢測電阻160之跨壓後恆導通,使旁通開關S35恆截止。When the input voltage vi rises to overcome the forward voltage drop (V G3 + V G4 ) of the reciprocal secondary LED sub-arrays G3 and G4, and the forward voltage drop between the reciprocal secondary LED sub-arrays G3 and G4 (V) When G3 +V G4 ) is between the forward voltage drop (V G2 +V G3 +V G4 ) of the third-order LED sub-array G2, G3 and G4, the diodes Dg1 and Dg2 are reverse biased, and the flicker suppression capacitor Cg1 And Cg2 discharge to illuminate the LED sub-arrays G1 and G2, respectively. At the same time, the diode Dg3 is biased, the input current is passed through the bypass switches S15 and S25 to the LED sub-array G3 to the LED sub-array G4 to illuminate the LED sub-arrays G3 and G4, and the flicker suppression capacitors Cg3 and Cg4 are respectively recharged to Voltages V G3 and V G4 . At this time, the input current passes through the current detecting resistor 160, and the bipolar contact transistor B2 detects the voltage across the current detecting resistor 160 through the anti-clamping resistor Rx2, and then quickly switches between the conducting and the off, so that the bypass switch S25 Corresponding to switching between off and on, enters the regulated state to maintain the current through LED sub-arrays G3 and G4 at I2. The double carrier junction transistor B3 detects the constant conduction of the voltage across the current detecting resistor 160 through the anti-clamping resistor Rx3, so that the bypass switch S35 is always turned off.

當輸入電壓vi上升至克服倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 ),且介於倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )與倒數四級LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )之間時,二極體Dg1逆偏,閃爍抑制電容Cg1放電以點亮LED子陣列G1。同時,二極體Dg2順偏,輸入電流經經旁通開關S15至LED子陣列G2、G3至LED子陣列G4,並對閃爍抑制電容Cg2、Cg3及Cg4重新充電至電壓VG2 、VG3 及VG4 。輸入電流點亮LED子陣列G2、G3及G4,並通過電流檢測電阻160。雙載子接面電晶體B1透過防箝位電阻Rx1偵測電流檢測電阻160之跨壓後切換於導通與截止之間,旁通開關S15對應地切換於截止與導通之間而進入調節態,以將通過LED子陣列G2、G3及G4的電流維持在I3。此時,雙載子接面電晶體B2及B3分別透過防箝位電阻Rx2及Rx3偵測電流檢測電阻160之跨壓後恆導通,使旁通開關S25及S35恆截止。When the input voltage vi rises to overcome the forward voltage drop of the third-order LED sub-arrays G2, G3, and G4 (V G2 +V G3 +V G4 ), and is in the third-order LED sub-arrays G2, G3, and G4 The forward voltage drop (V G2 +V G3 +V G4 ) and the forward voltage drop of the reciprocal four-level LED sub-arrays G1, G2, G3, and G4 (V G1 +V G2 +V G3 +V G4 ) When the diode Dg1 is reverse biased, the flicker suppression capacitor Cg1 is discharged to illuminate the LED sub-array G1. At the same time, the diode Dg2 is biased, the input current passes through the bypass switch S15 to the LED sub-arrays G2, G3 to the LED sub-array G4, and the flicker suppression capacitors Cg2, Cg3 and Cg4 are recharged to the voltages V G2 , V G3 and V G4 . The input current illuminates the LED sub-arrays G2, G3, and G4 and passes through the current sense resistor 160. The bipolar junction transistor B1 detects the voltage across the current detecting resistor 160 through the anti-clamping resistor Rx1 and then switches between the on and the off, and the bypass switch S15 switches between the off and the on and enters the regulated state. The current through the LED sub-arrays G2, G3, and G4 is maintained at I3. At this time, the bipolar-substrate transistors B2 and B3 respectively detect the cross-voltage of the current detecting resistor 160 through the anti-clamping resistors Rx2 and Rx3, and then make the bypass switches S25 and S35 constantly cut off.

當輸入電壓vi上升至克服所有的LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )時,二極體Dg1順偏,輸入電流經LED子陣列G1、G2及G3至LED子陣列G4以點亮全部之LED子陣列,並通過電流檢測電阻160。輸入電壓vi對閃爍抑制電容Cg1重新充電至電壓VG1 。此時,雙載子接面電晶體B1、B2及B3分別透過防箝位電阻Rx1、Rx2及Rx3偵測 電流檢測電阻160之跨壓後恆導通,使旁通開關S15、S25及S35恆截止,由電流調節器120調控通過LED子陣列G1、G2、G3及G4的電流維持在I4。When the input voltage vi rises to overcome the forward voltage drop (V G1 +V G2 +V G3 +V G4 ) of all the LED sub-arrays G1, G2, G3 and G4, the diode Dg1 is biased, and the input current is passed through the LED. Sub-arrays G1, G2, and G3 to LED sub-array G4 to illuminate all of the LED sub-arrays and pass current sense resistor 160. The input voltage vi recharges the flicker suppression capacitor Cg1 to the voltage V G1 . At this time, the dual-carrier junction transistors B1, B2, and B3 respectively pass the anti-clamping resistors Rx1, Rx2, and Rx3 to detect the constant conduction of the current detecting resistor 160, and the bypass switches S15, S25, and S35 are always cut off. The current regulated by the current regulator 120 through the LED sub-arrays G1, G2, G3, and G4 is maintained at I4.

於一週期後半,輸入電壓vi開始下降後,LED子陣列的點亮與熄滅的方式相似於前述之初始狀態時的LED子陣列的點亮與熄滅的方式,容此不再贅述。After the input voltage vi begins to decrease in the second half of the cycle, the manner in which the LED sub-array is turned on and off is similar to the manner in which the LED sub-array is turned on and off in the initial state described above, and thus will not be described again.

請接著參考圖10B,此LED光引擎的電子控制裝置包括複數個閃爍抑制電容Cg1’、Cg2’、Cg3’及Cg4’,與複數個二極體Dg1、Dg2、Dg3及Dg4,各個閃爍抑制電容Cg1’、Cg2’、Cg3’及Cg4’分別並聯於對應的串聯之多個外部LED子陣列G1、G2、G3及G4;串聯之多個外部LED子陣列G2、G3及G4;串聯之多個外部LED子陣列G3及G4;及單一個對應的外部LED子陣列G4,且各個二極體Dg1、Dg2、Dg3及Dg4之陰極耦接至對應之外部LED子陣列G1、G2、G3及G4的陽極。閃爍抑制電容的實施態樣可以為電解電容或非電解電容所組成M×N矩陣來實施,非電解電容的類型已經說明於前,容此不再贅述。Referring to FIG. 10B, the electronic control device of the LED light engine includes a plurality of scintillation suppression capacitors Cg1', Cg2', Cg3', and Cg4', and a plurality of diodes Dg1, Dg2, Dg3, and Dg4, and each of the flicker suppression capacitors. Cg1', Cg2', Cg3' and Cg4' are respectively connected in parallel to a plurality of external LED sub-arrays G1, G2, G3 and G4 in series; a plurality of external LED sub-arrays G2, G3 and G4 are connected in series; The external LED sub-arrays G3 and G4; and a corresponding one of the external LED sub-arrays G4, and the cathodes of the respective diodes Dg1, Dg2, Dg3 and Dg4 are coupled to the corresponding external LED sub-arrays G1, G2, G3 and G4 anode. The implementation of the flicker suppression capacitor can be implemented by an M×N matrix composed of an electrolytic capacitor or a non-electrolytic capacitor. The type of the non-electrolytic capacitor has been described above, and will not be described again.

以下先說明於輸入電壓的第一次週期期間,閃爍抑制電容Cg1’、Cg2’、Cg3’及Cg4’在零初始狀態(即完全放電)下,LED子陣列的點亮與熄滅的方式。Hereinafter, the manner in which the blink suppression capacitors Cg1', Cg2', Cg3', and Cg4' are turned on and off in the zero initial state (i.e., full discharge) during the first period of the input voltage will be described.

於一週期之前半,當旁通開關S15、S25及S35的通道建立且均導通而形成串聯之旁通開關列時,輸入電壓vi透過二極體Dg1~Dg4以分別對閃爍抑制電容Cg1’~Cg4’充電的作用機制相似於圖10A,差異在於,閃爍抑制電容Cg4’充電至電壓VG4 後維持於電壓VG4 ,閃爍抑制電容Cg3’充電至電壓VG3 +VG4 後維持於電壓VG3 +VG4 ,閃爍抑制電容Cg2’充電至電壓VG2 +VG3 +VG4 後維持於電壓VG2 +VG3 +VG4 ,閃爍抑制電容Cg1’充電至電壓VG1 +VG2 +VG3 +VG4 後維持於電壓VG1 +VG2 +VG3 +VG4In the first half of a cycle, when the channels of the bypass switches S15, S25, and S35 are established and both are turned on to form a series of bypass switch columns, the input voltage vi passes through the diodes Dg1 to Dg4 to respectively respectively blink the suppression capacitor Cg1'~ Cg4 'mechanism of charging is similar to 10A, the difference being that the flicker suppression capacitor Cg4' charged to a voltage V G4 is maintained at a voltage V G4, flicker suppression capacitor Cg3 'charged to the voltage V G3 + after V G4 is maintained at a voltage V G3 +V G4 , flicker suppression capacitor Cg2' is charged to voltage V G2 +V G3 +V G4 and is maintained at voltage V G2 +V G3 +V G4 , and the flicker suppression capacitor Cg1' is charged to voltage V G1 +V G2 +V G3 + After V G4 is maintained at voltage V G1 +V G2 +V G3 +V G4 .

於一週期後半,輸入電壓vi開始下降至克服倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 ),且介於LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )與第一至四級LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )之間,二極體Dg1逆偏,且閃爍抑制電容Cg1’放電以供應放電電流I4’至LED子陣列G1~G4。此時,旁通開關S15由截止態轉為調節態,旁通開關S25及S35維持截止態,輸入電流經旁通開關S15點亮倒數三級LED子陣列G2、G3及G4,並通過電流檢測電阻160,以提供電流I3至LED子陣列G2、G3及G4。也就是說,於此階段通過LED子陣列G1的電流為I4’,通過LED子陣列G2、G3及G4的電流I4’+I3。In the second half of the cycle, the input voltage vi begins to drop to overcome the forward voltage drop (V G2 + V G3 + V G4 ) of the third-order LED sub-arrays G2, G3, and G4, and is interposed between the LED sub-arrays G2, G3 and Forward voltage drop of G4 (V G2 +V G3 +V G4 ) and forward voltage drop of first to fourth LED sub-arrays G1, G2, G3 and G4 (V G1 +V G2 +V G3 +V G4 ) Between the diodes Dg1 is reverse biased, and the flicker suppression capacitor Cg1' is discharged to supply the discharge current I4' to the LED sub-arrays G1 to G4. At this time, the bypass switch S15 is turned from the off state to the regulated state, the bypass switches S25 and S35 are maintained in the off state, and the input current is turned on by the bypass switch S15 to turn on the third-order LED sub-arrays G2, G3, and G4, and the current is passed. Resistor 160 is sensed to provide current I3 to LED sub-arrays G2, G3, and G4. That is, the current through the LED sub-array G1 at this stage is I4', and the current I4'+I3 through the LED sub-arrays G2, G3, and G4.

隨輸入電壓vi繼續下降至克服倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 ),且介於倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )與倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )之間,二極體Dg1及Dg2逆偏。閃爍抑制電容Cg1’放電,以提供LED子陣列G1~G4放電電流I4’,閃爍抑制電容Cg2’放電,以提供LED子陣列G2~G4放電電流I3’。此時,旁通開關S15轉為導通態,旁通開關S25進入調節態,旁通開關S35截止,輸入電流經由旁通開關S15及S25提供電流I2至LED子陣列G3及G4及電流檢測電阻160。於此階段,通過LED子陣列G1的電流為I4’,通過LED子陣列G2的電流為I4’+I3’,通過LED子陣列G3及G4的電流I4’+I3’+I2。As the input voltage vi continues to drop to overcome the forward voltage drop (V G3 + V G4 ) of the countdown secondary LED sub-arrays G3 and G4, and the forward voltage drop between the reciprocal secondary LED sub-arrays G3 and G4 ( between V G3 + V G4) and the sub-array LED G2, G3 and G4 of three reciprocal cis forward voltage drop (V G2 + V G3 + V G4), diodes Dg1 and Dg2 reverse bias. The flicker suppression capacitor Cg1' is discharged to provide the LED sub-arrays G1~G4 discharge current I4', and the flicker suppression capacitor Cg2' is discharged to provide the LED sub-arrays G2~G4 discharge current I3'. At this time, the bypass switch S15 is turned to the on state, the bypass switch S25 enters the regulation state, the bypass switch S35 is turned off, and the input current supplies the current I2 to the LED sub-arrays G3 and G4 and the current detecting resistor 160 via the bypass switches S15 and S25. . At this stage, the current through the LED sub-array G1 is I4', the current through the LED sub-array G2 is I4'+I3', and the current through the LED sub-arrays G3 and G4 is I4'+I3'+I2.

隨輸入電壓vi繼續下降至克服最後一級LED子陣列G4之順向電壓降(VG4 ),且介於LED子陣列G4之順向電壓降(VG4 )與最後二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )間,二極體Dg1、Dg2及Dg3逆偏,閃爍抑制電容Cg1’、Cg2’及Cg3’分別放電,以點亮LED子陣列G1、G2及G3。具體而言,閃爍抑制電容Cg1’放電,以提供LED子陣列G1~G4放電電流 I4’,閃爍抑制電容Cg2’放電,以提供LED子陣列G2~G4放電電流I3’。閃爍抑制電容Cg3’放電,以提供LED子陣列G3~G4放電電流I2’。此時,旁通開關S15及S25分別轉為導通態,旁通開關S35對應地進入調節態,輸入電流通過旁通開關S15~S35並提供輸入電流I1以點亮LED子陣列G4。於此階段,通過LED子陣列G1的電流為I4’,通過LED子陣列G2的電流為I4’+I3’,通過LED子陣列G3的電流I4’+I3’+I2’,且通過LED子陣列G4的電流I4’+I3’+I2’+I1。Vi with the input voltage continues to drop to overcome the last stage G4 of the LED arrays to the sub-cis voltage drop (V G4), and G4 between the sub-arrays of LED forward voltage drop (V G4) and the last two sub-array LED G3 and G4 During the forward voltage drop (V G3 +V G4 ), the diodes Dg1, Dg2 and Dg3 are reverse biased, and the flicker suppression capacitors Cg1', Cg2' and Cg3' are respectively discharged to illuminate the LED sub-arrays G1, G2 and G3. . Specifically, the flicker suppression capacitor Cg1' is discharged to provide the LED sub-arrays G1 to G4 discharge current I4', and the flicker suppression capacitor Cg2' is discharged to provide the LED sub-arrays G2 to G4 discharge current I3'. The flicker suppression capacitor Cg3' is discharged to provide the LED sub-array G3~G4 discharge current I2'. At this time, the bypass switches S15 and S25 are respectively turned into an on state, the bypass switch S35 correspondingly enters an adjustment state, and the input current passes through the bypass switches S15 to S35 and provides an input current I1 to illuminate the LED sub-array G4. At this stage, the current through the LED sub-array G1 is I4', the current through the LED sub-array G2 is I4'+I3', the current through the LED sub-array G3 is I4'+I3'+I2', and through the LED sub-array The current of G4 is I4'+I3'+I2'+I1.

於輸入電壓的第一次週期以後,閃爍抑制電容Cg1’、Cg2’、Cg3’及Cg4’的初始狀態建立並達到穩態(充電完成),以下說明於穩態期間,LED子陣列的點亮與熄滅的方式。於一週期之前半,輸入電壓vi小於最後一級LED子陣列G4之順向電壓降(VG4 )時,二極體Dg1、Dg2、Dg3及Dg4逆偏,閃爍抑制電容Cg1’、Cg2’、Cg3’及Cg4’分別放電,以點亮LED子陣列G1~G4、G2~G4、G3~G4及G4,避免空載時間(dead time)發生。After the first cycle of the input voltage, the initial states of the flicker suppression capacitors Cg1', Cg2', Cg3', and Cg4' are established and reach steady state (charge completion). The following illustrates the illumination of the LED sub-array during steady state. With the way to extinguish. In the first half of a cycle, when the input voltage vi is smaller than the forward voltage drop (V G4 ) of the last LED sub-array G4, the diodes Dg1, Dg2, Dg3, and Dg4 are reverse biased, and the flicker suppression capacitors Cg1', Cg2', and Cg3 'And Cg4' are discharged separately to illuminate the LED sub-arrays G1~G4, G2~G4, G3~G4 and G4 to avoid dead time.

當輸入電壓vi上升至克服最後一級LED子陣列G1之順向電壓降(VG4 ),且介於最後一級LED子陣列G4之順向電壓降(VG4 )與最後二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )之間,二極體Dg1、Dg2及Dg3逆偏,閃爍抑制電容Cg1’、Cg2’及Cg3’分別放電,分別提供電流I4’、電流I3’及電流I2’以點亮LED子陣列G1~G4、G2~G4及G3~G4。此時,二極體Dg4順偏,輸入電流點亮最後一級LED子陣列G4,並對閃爍抑制電容Cg4’重新充電(Recharge)至電壓VG4 。並且,旁通開關S35進入調節態,以提供電流I1至LED子陣列G4。When the input voltage vi rises to overcome a last sub-LED arrays along the G1 to the voltage drop (V G4), and the last one is interposed along G4 sub-array of LED forward voltage drop (V G4) and the last two sub-LED arrays and G3 Between the forward voltage drop of G4 (V G3 +V G4 ), the diodes Dg1, Dg2 and Dg3 are reversed, and the flicker suppression capacitors Cg1', Cg2' and Cg3' are respectively discharged, respectively providing current I4' and current I3'. And the current I2' to illuminate the LED sub-arrays G1~G4, G2~G4, and G3~G4. At this time, the diode Dg4 is biased, the input current illuminates the last-stage LED sub-array G4, and the flicker suppression capacitor Cg4' is recharged to the voltage V G4 . And, the bypass switch S35 enters an adjustment state to provide a current I1 to the LED sub-array G4.

當輸入電壓vi上升至克服倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 ),且介於倒數二級LED子陣列G3及G4之順向電壓降(VG3 +VG4 )與倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )之間時, 二極體Dg1及Dg2逆偏,閃爍抑制電容Cg1’及Cg2’放電,以分別提供電流I4’及電流I3’點亮LED子陣列G1~G4及G2~G4。二極體Dg3順偏,輸入電流經旁通開關S15及S25至LED子陣列G3及G4以點亮LED子陣列G3及G4,並分別對閃爍抑制電容Cg3’及Cg4’重新充電至電壓VG3 及VG4 。此時,旁通開關S35恆截止,旁通開關S25進入調節態,提供電流I2通過LED子陣列G3及G4。When the input voltage vi rises to overcome the forward voltage drop (V G3 + V G4 ) of the reciprocal secondary LED sub-arrays G3 and G4, and the forward voltage drop between the reciprocal secondary LED sub-arrays G3 and G4 (V) When G3 +V G4 ) is between the forward voltage drop (V G2 +V G3 +V G4 ) of the third-order LED sub-array G2, G3 and G4, the diodes Dg1 and Dg2 are reverse biased, and the flicker suppression capacitor Cg1 'And Cg2' discharges to illuminate the LED sub-arrays G1~G4 and G2~G4 with current I4' and current I3', respectively. The diode Dg3 is biased, and the input current is passed through the bypass switches S15 and S25 to the LED sub-arrays G3 and G4 to illuminate the LED sub-arrays G3 and G4, and recharge the flicker suppression capacitors Cg3' and Cg4' to the voltage V G3, respectively. And V G4 . At this time, the bypass switch S35 is always turned off, the bypass switch S25 enters the regulation state, and the current I2 is supplied through the LED sub-arrays G3 and G4.

當輸入電壓vi上升至克服倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 ),且介於倒數三級LED子陣列G2、G3及G4之順向電壓降(VG2 +VG3 +VG4 )與倒數四級LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )之間時,二極體Dg1逆偏,閃爍抑制電容Cg1’放電以提供電流I4’點亮LED子陣列G1~G4。同時,二極體Dg2順偏,輸入電流經經旁通開關S15至LED子陣列G2、G3及G4,並對閃爍抑制電容Cg2’、Cg3’及Cg4’重新充電主電壓VG2 、VG3 及VG4 。旁通開關S15進入調節態,以提供電流I3至LED子陣列G2、G3及G4。此時,旁通開關S25及S35恆截止。When the input voltage vi rises to overcome the forward voltage drop of the third-order LED sub-arrays G2, G3, and G4 (V G2 + V G3 + V G4 ), and is in the third-order LED sub-arrays G2, G3, and G4 The forward voltage drop (V G2 +V G3 +V G4 ) and the forward voltage drop of the reciprocal four-level LED sub-arrays G1, G2, G3, and G4 (V G1 +V G2 +V G3 +V G4 ) When the diode Dg1 is reverse biased, the flicker suppression capacitor Cg1' discharges to provide the current I4' to illuminate the LED sub-arrays G1 to G4. At the same time, the diode Dg2 is biased, and the input current is passed through the bypass switch S15 to the LED sub-arrays G2, G3 and G4, and the main voltages V G2 and V G3 are recharged to the flicker suppression capacitors Cg2', Cg3' and Cg4'. V G4 . The bypass switch S15 enters an adjusted state to provide current I3 to the LED sub-arrays G2, G3, and G4. At this time, the bypass switches S25 and S35 are always turned off.

當輸入電壓vi上升至克服所有的LED子陣列G1、G2、G3及G4之順向電壓降(VG1 +VG2 +VG3 +VG4 )時,二極體Dg1順偏,輸入電流經LED子陣列G1、G2、G3及G4以點亮全部之LED子陣列,並通過電流檢測電阻160。輸入電壓vi對閃爍抑制電容Cg1’重新充電至電壓VG1 。此時,旁通開關S15、S25及S35恆截止,由電流調節器120調控以提供電流I4通過LED子陣列G1、G2、G3及G4。When the input voltage vi rises to overcome the forward voltage drop (V G1 +V G2 +V G3 +V G4 ) of all the LED sub-arrays G1, G2, G3 and G4, the diode Dg1 is biased, and the input current is passed through the LED. Sub-arrays G1, G2, G3, and G4 illuminate all of the LED sub-arrays and pass current sense resistor 160. The input voltage vi recharges the flicker suppression capacitor Cg1' to the voltage V G1 . At this time, the bypass switches S15, S25, and S35 are constantly turned off, and are regulated by the current regulator 120 to supply the current I4 through the LED sub-arrays G1, G2, G3, and G4.

於一週期後半,輸入電壓vi開始下降後,LED子陣列的點亮與熄滅的方式相似於前述之初始狀態時的LED子陣列的點亮與熄滅的方式,容此不再贅述。於實施例中,閃爍抑制電容同樣可以有效地改善閃爍百分比閃爍及閃爍指數,並維持高功率因數及低諧波失真。After the input voltage vi begins to decrease in the second half of the cycle, the manner in which the LED sub-array is turned on and off is similar to the manner in which the LED sub-array is turned on and off in the initial state described above, and thus will not be described again. In an embodiment, the flicker suppression capacitor can also effectively improve the flicker percentage flicker and flicker index while maintaining high power factor and low harmonic distortion.

圖10C所示為圖10A之LED光引擎的電子控制裝置,於閃爍抑制電容與二極體設置前後,其輸入電壓、輸入電流及通過LED子陣列之電流相對於時間軸的波形比較圖,其中圖10C之(a)、(b)部份分別繪示如圖10A之閃爍抑制電容與二極體設置前後,輸入電壓Vin、輸入電流Iin相對於時間t的波形比較圖,圖10C之(c)、(d)部份分別繪示如圖10A之閃爍抑制電容與二極體設置前後,輸入電壓Vin、通過LED子陣列之電流ILED 相對於時間t的波形比較圖,圖10C之(e)、(f)部份分別繪示如圖10A之閃爍抑制電容與二極體設置前後,光輸出強度(Light Intensity)相對於時間t的波形比較圖。依照LED光源特性,通過LED子陣列之電流ILED 與其光輸出強度呈現線性關係,故圖10C之(e)、(f)的波形圖分別與圖10C之(c)、(d)的波形圖相近似。此外,圖10B之LED光引擎的電子控制裝置與圖10A之LED光引擎的電子控制裝置的作用機制相似,差異在於各個閃爍抑制電容的充電的截止電位以及其放電時所供應的LED子陣列數量,故圖10B之LED光引擎的電子控制裝置於閃爍抑制電容與二極體設置前後,其輸入電壓、輸入電流及通過LED子陣列之電流相對於時間軸的波形比較圖相近於圖10A,容此不多贅述。FIG. 10C is a diagram showing the comparison of the input voltage, the input current, and the current through the LED sub-array with respect to the time axis before and after the flicker suppression capacitor and the diode are set, in which the electronic control device of the LED light engine of FIG. 10A is compared. (a) and (b) of FIG. 10C respectively show a waveform comparison diagram of the input voltage Vin and the input current Iin with respect to time t before and after the setting of the scintillation suppression capacitor and the diode of FIG. 10A, and FIG. 10C(c) And (d) respectively show the waveform comparison of the input voltage Vin and the current I LED passing through the LED sub-array with respect to time t before and after the flicker suppression capacitor and the diode arrangement as shown in FIG. 10A, and FIG. 10C(e) And (f) are respectively a waveform comparison diagram of the light output intensity (Light Intensity) with respect to time t before and after the setting of the scintillation suppression capacitor and the diode in FIG. 10A. According to the characteristics of the LED light source, the current I LED through the LED sub-array has a linear relationship with the light output intensity, so the waveforms of (e) and (f) of FIG. 10C and the waveforms of (c) and (d) of FIG. 10C, respectively. Similar. In addition, the electronic control device of the LED light engine of FIG. 10B functions similarly to the electronic control device of the LED light engine of FIG. 10A, with the difference being the cut-off potential of each of the flicker suppression capacitors and the number of LED sub-arrays supplied during discharge. Therefore, the electronic control device of the LED light engine of FIG. 10B is similar to the waveform comparison diagram of the input voltage, the input current, and the current through the LED sub-array with respect to the time axis before and after the flicker suppression capacitor and the diode are disposed, and is similar to FIG. 10A. This is not to be repeated.

請先參考圖10A、10B及圖10C之(a)、(b)部份,於閃爍抑制電容與二極體設置前後,輸入電流Iin的波形幾乎沒有改變,表示閃爍抑制電容與二極體設置後,功率因數與諧波失真相近於閃爍抑制電容與二極體設置前。換句話說,不會因為閃爍抑制電容與二極體設置後,造成功率因數降低或諧波失真增加。於圖10A或10B之閃爍抑制電容設置後,因各個閃爍抑制電容僅充電至其所對應並聯之一個或多個LED子陣列的總順向電壓降,故閃爍抑制電容的設置,並不會影響整流後的正弦輸入電壓以及總LED子 陣列之順向電壓降的比較結果,當然也不會影響旁通開關的操作狀態,故得以維持高的功率因數及低的總諧波失真。Referring to FIGS. 10A, 10B and 10C (a) and (b), the waveform of the input current Iin is hardly changed before and after the flicker suppression capacitor and the diode are set, indicating the flicker suppression capacitor and the diode setting. After that, the power factor is similar to the harmonic distortion before the flicker suppression capacitor and the diode are set. In other words, the power factor is reduced or the harmonic distortion is not increased because the flicker suppression capacitor and the diode are set. After the flicker suppression capacitor of FIG. 10A or 10B is set, since the respective flicker suppression capacitors are only charged to the total forward voltage drop of one or more LED sub-arrays corresponding thereto, the setting of the flicker suppression capacitor does not affect. Rectified sinusoidal input voltage and total LED The comparison of the forward voltage drop of the array does not of course affect the operating state of the bypass switch, thus maintaining a high power factor and low total harmonic distortion.

請接著參考圖10A、10B及圖10C之(c)、(d)部份,於閃爍抑制電容與二極體設置前後,通過LED子陣列之電流ILED 的波形有明顯的改變。請先參考圖10C之(c)部份,於閃爍抑制電容與二極體設置前,通過LED子陣列之電流ILED 類似於靶型,於此波形之輸入電壓Vin較低的部份,輸入電壓Vin尚無法克服LED子陣列G4的順向電壓降,無電流通過LED子陣列G4,定義此段期間為空載時間(dead time)t1。Referring to FIGS. 10A, 10B and 10C (c), (d), the waveform of the current I LED passing through the LED sub-array is significantly changed before and after the flicker suppression capacitor and the diode are disposed. Please refer to part (c) of FIG. 10C first. Before the flicker suppression capacitor and the diode are set, the current I LED passing through the LED sub-array is similar to the target type, and the input voltage Vin of the waveform is lower. The voltage Vin has not been able to overcome the forward voltage drop of the LED sub-array G4, and no current flows through the LED sub-array G4, defining a dead time t1 during this period.

請參考圖10C之(d)部份,於閃爍抑制電容與二極體設置後,通過LED子陣列G4之電流ILED 類似於疊加於直流電流上的漣波(a ripple superimposed on a DC current)。值得注意的是,於此波形之輸入電壓Vin較低的部份,輸入電壓Vin雖無法克服LED子陣列G4的順向電壓降,但閃爍抑制電容(繪示於圖10A)可以提供電流以點亮LED子陣列G4。因此,於圖10C之(d)部份中,輸入電壓Vin小於LED子陣列G4的順向電壓降(VG1 )的區間,所對應之通過LED子陣列G4之電流ILED 波形圖上的時間t1’內,通過LED子陣列G1之電流ILED 仍大於0(由閃爍抑制電容提供電流)。換句話說,閃爍抑制電容與二極體的設置,可避免空載時間(dead time)t1的發生。Referring to part (d) of FIG. 10C, after the flicker suppression capacitor and the diode are set, the current I LED passing through the LED sub-array G4 is similar to a ripple superimposed on a DC current. . It is worth noting that the input voltage Vin cannot overcome the forward voltage drop of the LED sub-array G4 in the lower part of the input voltage Vin of the waveform, but the flicker suppression capacitor (shown in FIG. 10A) can provide current to the point. Bright LED sub-array G4. Therefore, in part (d) of FIG. 10C, the input voltage Vin is smaller than the interval of the forward voltage drop (V G1 ) of the LED sub-array G4, corresponding to the time on the current I LED waveform diagram of the LED sub-array G4. Within t1', the current I LED through LED sub-array G1 is still greater than zero (current is provided by the flicker suppression capacitor). In other words, the flicker suppression capacitor and the setting of the diode can avoid the occurrence of dead time t1.

請參考圖10C之(e)部份,圖中標示出於一週期T之間,光輸出(Light output)L波形的最大值Lmax與最小值Lmin,並定義平均光輸出(Average Light Output)Lave以上的面積為A,定義平均光輸出Lave以下的面積為B。根據照明協會修訂之照明手冊(Modified from IES Lighting Handbook)所定義,百分比閃爍(percent flicker)常用以衡量日光燈的品 質,公式為,閃爍指數(flicker index)則可用以衡量LED 的品質,公式為,一般來說,閃爍指數的值低於LED電流波形頻率(例如120Hz)的千分之一(12%)為佳。Please refer to part (e) of Fig. 10C, which shows the maximum value Lmax and the minimum value Lmin of the light output L waveform between one period T, and defines the average light output (Average Light Output) Lave. The above area is A, and the area below the defined average light output Lave is B. Percent flicker is commonly used to measure the quality of fluorescent lamps, as defined by the Modified IES Lighting Handbook. The flicker index can be used to measure the quality of the LED. The formula is In general, the value of the scintillation index is preferably less than one thousandth (12%) of the LED current waveform frequency (for example, 120 Hz).

請接著參考圖10C之(f)部份,圖中標示出光輸出L’波形的最大值Lmax’與最小值Lmin’,並定義平均光輸出Lave’以上的面積為A’,定義平均光輸出Lave’以下的面積為B’。根據定義,此時的百分比閃爍為,閃爍指數為。比較圖10C之(e)部份與(f)部 份的波形,可明顯發現,且。也就是說,於閃爍抑制電容與二極體設置後,百分比閃爍與閃爍指數均明顯地下降。Please refer to part (f) of FIG. 10C, where the maximum value Lmax' and the minimum value Lmin' of the light output L' waveform are indicated, and the area above the average light output Lave' is defined as A', and the average light output is defined. 'The area below is B'. By definition, the percentage blinking at this time is , the flicker index is . Comparing the waveforms of parts (e) and (f) of Figure 10C, it is obvious that And . That is to say, after the flicker suppression capacitor and the diode are set, the percentage flicker and the flicker index both decrease significantly.

綜上所述,於一實施例中,當輸入電壓克服當級(例如為LED子陣列G3)及當級以下之外部LED子陣列的順向電壓降之和,但未克服上級(例如為LED子陣列G2)及上級以下之外部LED子陣列的順向電壓降之和時,輸入電流點亮當級及當級以下之外部LED子陣列,且閃爍抑制電容(例如為Cg1及Cg2)放電以點亮上級及上級以上之外部LED子陣列(例如為LED子陣列G1及G2)。換句話說,藉由設置閃爍抑制電容與二極體,可以避免輸入電壓未克服LED子陣列的順向電壓降時造成的空載時間。並且,可進一步改善百分比閃爍與閃爍指數,且不會造成功率因數降低或諧波失真增加的問題,可使LED陣列的照明品質更好。上述設置閃爍抑制電容與二極體的實施例可適用於本發明任何實施例中。In summary, in one embodiment, when the input voltage overcomes the sum of the forward voltage drops of the current stage (eg, LED sub-array G3) and the external LED sub-array below the current level, but does not overcome the upper stage (eg, LED) When the sum of the forward voltage drops of the sub-array G2) and the external LED sub-array below the upper stage, the input current illuminates the external LED sub-array of the current level and below, and the flicker suppression capacitors (for example, Cg1 and Cg2) are discharged. The external LED sub-arrays of the upper and upper levels are illuminated (for example, LED sub-arrays G1 and G2). In other words, by setting the flicker suppression capacitor and the diode, it is possible to avoid the dead time caused when the input voltage does not overcome the forward voltage drop of the LED sub-array. Moreover, the percentage flicker and flicker index can be further improved without causing a problem of a decrease in power factor or an increase in harmonic distortion, which can make the illumination quality of the LED array better. The above embodiments in which the scintillation suppression capacitor and the diode are provided can be applied to any embodiment of the present invention.

綜上所述,本發明之實施例所提出的LED光引擎的電子控制裝置,透過比較電路偵測通過LED子陣列的電流於電流檢測電阻的跨壓,調控對應之旁通開關的操作狀態,以逐級點亮或逐級熄滅TED子陣列的發光二極體光引擎電子控制裝置,具有簡化電路,改善功率因數與降低諧波失 真之功效。本發明一實施例所提出之LED光引擎的電子控制裝置可連接LED陣列,而形成可調光之發光二極體照明設備。In summary, the electronic control device of the LED light engine according to the embodiment of the present invention detects the cross-voltage of the current through the LED sub-array through the comparison circuit to adjust the operating state of the corresponding bypass switch. Light-emitting diode light engine electronic control device that illuminates the TED sub-array step by step or stepwise, with simplified circuit, improved power factor and reduced harmonic loss The effect of the truth. An electronic control device for an LED light engine according to an embodiment of the present invention can be connected to an LED array to form a dimmable light-emitting diode lighting device.

本發明LED光引擎的電子控制裝置,可以實作於一積體電路上,或以模組區分實作於多個積體電路,再整合於一電路板上。The electronic control device of the LED light engine of the present invention can be implemented on an integrated circuit, or can be implemented as a plurality of integrated circuits by a module, and then integrated on a circuit board.

本發明LED光引擎的電子控制裝置,可與一LED陣列整合,其中LED陣列與LED光引擎的電子控制裝置並聯設置,作為一種LED子陣列之照明設備。The electronic control device of the LED light engine of the present invention can be integrated with an LED array, wherein the LED array is arranged in parallel with the electronic control device of the LED light engine as an illumination device for the LED sub-array.

依上述內容已描述了本發明的原理、較佳實施例以及操作模式。然而,本發明不應被理解成受限於討論過的特定實施例。相反地,以上所描述的實施例應該被視為例示而非限制,並且應該要體認為在不脫離以下申請專利範圍所定義的本發明範圍的情況之下,所屬技術領域中具有通常知識者可對這些實施例做出變化。The principles, preferred embodiments, and modes of operation of the invention have been described in the foregoing. However, the invention should not be construed as being limited to the specific embodiments discussed. Rather, the above-described embodiments are to be considered as illustrative and not restrictive, and the scope of the invention as defined by the following claims Changes are made to these embodiments.

AC‧‧‧交流電壓源AC‧‧‧AC voltage source

100‧‧‧整流器100‧‧‧Rectifier

120‧‧‧電流調節器120‧‧‧current regulator

150、152、154‧‧‧比較電路150, 152, 154‧‧‧ comparison circuit

M‧‧‧金氧半場效電晶體M‧‧‧Gold Oxygen Half Field Effect Crystal

X‧‧‧並聯調節器X‧‧‧ shunt regulator

Rx1、Rx2、Rx3、Ra、Rx‧‧‧電阻Rx1, Rx2, Rx3, Ra, Rx‧‧‧ resistors

R1、R2‧‧‧正弦電壓補償器R1, R2‧‧‧ sinusoidal voltage compensator

G1、G2、G3、G4‧‧‧LED子陣列G1, G2, G3, G4‧‧‧ LED sub-arrays

G‧‧‧外部LED陣列G‧‧‧External LED array

Zd1、Zd2‧‧‧齊納二極體Zd1, Zd2‧‧‧ Zener diode

S1、S2、S3‧‧‧旁通開關S1, S2, S3‧‧‧ bypass switch

160‧‧‧電流檢測電阻160‧‧‧current sense resistor

Claims (23)

一種LED光引擎的電子控制裝置,包含:一整流器,用以連接一外部交流電壓源,提供一直流脈衝電壓;一旁通開關列,耦接該整流器且與一外部LED陣列並聯設置,該外部LED陣列包括串聯之複數個LED子陣列,該旁通開關列包括串聯之複數個旁通開關,於導通時用以旁通對應之LED子陣列;一開關控制電路,具有一電流檢測電阻及複數個比較電路,該電流檢測電阻耦接於該外部LED陣列之陰極與接地端之間,且耦接至各該比較電路的參考端,該些比較電路分別具有不同的參考電壓,且該些比較電路分別依據該電流檢測電阻的跨壓與各該參考電壓作比較,調控對應之旁通開關為截止或導通,該電流檢測電阻的跨壓與該直流脈衝電壓有關,以使該旁通開關列依據該直流脈衝電壓,分段點亮該些LED子陣列,其中每該比較電路具有第一端、第二端及該參考端,該些比較電路中,除最後一級比較電路之外,上級之比較電路的第一端耦接於下級比較電路的該參考端。 An electronic control device for an LED light engine, comprising: a rectifier for connecting an external AC voltage source to provide a DC pulse voltage; a bypass switch column coupled to the rectifier and disposed in parallel with an external LED array, the external LED The array includes a plurality of LED sub-arrays connected in series, the bypass switch column includes a plurality of bypass switches connected in series to bypass a corresponding LED sub-array when turned on; a switch control circuit having a current detecting resistor and a plurality of a comparison circuit, the current detecting resistor is coupled between the cathode and the ground of the external LED array, and coupled to the reference ends of the comparison circuits, the comparison circuits respectively have different reference voltages, and the comparison circuits The cross-voltage of the current detecting resistor is compared with each of the reference voltages, and the corresponding bypass switch is turned off or turned on, and the voltage across the current detecting resistor is related to the DC pulse voltage, so that the bypass switch is based on The DC pulse voltage is segmented to illuminate the LED sub-arrays, wherein each of the comparison circuits has a first end, a second end, and the reference end, and the In the comparison circuit, except for the last one comparator circuit, a first terminal coupled to the lower end of the reference circuit comparator comparing circuit superiors. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中該上級之比較電路的第一端係透過齊納二極體耦接於該下級比較電路的該參考端。 The LED light engine electronic control device of claim 1, wherein the first end of the comparison circuit of the upper stage is coupled to the reference end of the lower level comparison circuit via a Zener diode. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中每該比較電路具有第一端、第二端及該參考端,該些比較電路的該些參考端彼此耦接於該電流檢測電阻,且每該比較電路的該第二端分別對應地控制每該旁通開關。 The LED light engine electronic control device of claim 1, wherein each of the comparison circuits has a first end, a second end, and the reference end, and the reference terminals of the comparison circuits are coupled to the current The resistance is sensed, and each of the bypass switches is controlled correspondingly to each of the second ends of the comparison circuit. 如申請專利範圍第3項所述的LED光引擎電子控制裝置,其中該些比較電路的該些參考端分別透過一防箝位電阻而共接於該電流檢測電阻。 The LED light engine electronic control device of claim 3, wherein the reference terminals of the comparison circuits are connected to the current detecting resistor through an anti-clamping resistor. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中該電流檢測電阻包括一共享電流感測與調變單元,耦接該外部LED陣列,用以規劃點亮之外部LED子陣列的電流,以調整該點亮之外部LED子陣列的亮度,其中該共享電流感測與調變單元,包括一電位計、一壓控電阻或一電晶體開關之其中一者。 The LED light engine electronic control device of claim 1, wherein the current detecting resistor comprises a shared current sensing and modulation unit coupled to the external LED array for planning the illuminated external LED sub-array. The current is adjusted to adjust the brightness of the illuminated external LED sub-array, wherein the shared current sensing and modulation unit comprises one of a potentiometer, a voltage controlled resistor or a transistor switch. 如申請專利範圍第5項所述的LED光引擎電子控制裝置,其中當該共享電流感測與調變單元包括該壓控電阻時,該共享電流感測與調變單元更包括一脈衝寬度調變單元、一低通濾波器及一電壓追隨器。 The LED light engine electronic control device of claim 5, wherein when the shared current sensing and modulation unit comprises the voltage control resistor, the shared current sensing and modulation unit further comprises a pulse width adjustment A variable unit, a low pass filter and a voltage follower. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中任一該旁通開關是一N通道金氧半場效電晶體或一N通道接面場效電晶體,任一該比較電路包括一並聯調節器或一雙載子接面電晶體。 The LED light engine electronic control device according to claim 1, wherein the bypass switch is an N-channel MOSFET or an N-channel junction field effect transistor, and any of the comparison circuits Includes a shunt regulator or a pair of carrier junction transistors. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,更包括一電流調節器,耦接該外部LED陣列,用以調整輸入電流波形成類正弦的方波(square wave)或步階波之波形,其中,除最後一級的外部LED子陣列外,每該外部LED子陣列與對應之旁通開關連接,且任一該旁通開關包括一電晶體。 The LED light engine electronic control device of claim 1, further comprising a current regulator coupled to the external LED array for adjusting the input current wave to form a sinusoidal square wave or step A waveform of waves, wherein each of the outer LED sub-arrays is connected to a corresponding bypass switch except for the outer LED sub-array of the last stage, and any one of the bypass switches includes a transistor. 如申請專利範圍第8項所述的LED光引擎電子控制裝置,更包括一線電壓調整率緊縮器,耦接於該電流調節器,該線電壓調整率緊縮器包括一電壓偵測並聯調節器或一電壓偵測雙載子接面電晶體,透過一電壓偵測分壓電阻,耦接於輸入電壓,其中,當輸入電壓克服所有的該些外部LED子陣 列之順向電壓降,但尚未克服該電壓偵測並聯調節器或該電壓偵測雙載子接面電晶體之參考電壓時,通過點亮之外部LED子陣列的電流為一第一電流,當輸入電壓克服所有的該些外部LED子陣列之順向電壓降,且克服該電壓偵測並聯調節器或該電壓偵測雙載子接面電晶體之參考電壓時,通過點亮之外部LED子陣列的電流為一第二電流,該第一電流大於該第二電流。 The LED light engine electronic control device according to claim 8 , further comprising a line voltage regulation rate compactor coupled to the current regulator, the line voltage adjustment rate compactor comprising a voltage detection parallel regulator or a voltage detecting double carrier junction transistor coupled to the input voltage through a voltage detecting voltage dividing resistor, wherein when the input voltage overcomes all of the external LED subarrays When the voltage drop of the column is reversed, but the reference voltage of the voltage detecting shunt regulator or the voltage detecting bipolar junction transistor has not been overcome, the current through the external LED sub-array is a first current, When the input voltage overcomes the forward voltage drop of all of the external LED sub-arrays and overcomes the reference voltage of the voltage detecting shunt regulator or the voltage detecting bipolar junction transistor, the external LED is illuminated The current of the sub-array is a second current, and the first current is greater than the second current. 如申請專利範圍第9項所述的LED光引擎電子控制裝置,其中該線電壓調整率緊縮器設置於該外部LED陣列之陰極與該電流檢測電阻之間,或該外部LED陣列之陽極與該外部交流電壓源之間。 The LED light engine electronic control device of claim 9, wherein the line voltage adjustment rate tightener is disposed between a cathode of the external LED array and the current detecting resistor, or an anode of the external LED array Between external AC voltage sources. 如申請專利範圍第8項所述的LED光引擎電子控制裝置,其中,更包括一線電壓調整率緊縮器,耦接於該電流調節器,該線電壓調整率緊縮器包括一電壓偵測分壓電阻、一旁路電阻、一電晶體及一控制電路,其中,該旁路電阻耦接於該電流調節器,該電晶體耦接於該旁路電阻,該控制電路之輸入端耦接該電晶體、該控制電路之輸出端耦接該電壓偵測分壓電阻,且該電壓偵測分壓電阻之分壓節點耦接於該外部交流電壓源。 The LED light engine electronic control device of claim 8, further comprising a line voltage regulation rate compactor coupled to the current regulator, the line voltage adjustment rate compactor comprising a voltage detection voltage divider a resistor, a shunt resistor, a transistor, and a control circuit, wherein the shunt resistor is coupled to the current regulator, the transistor is coupled to the shunt resistor, and an input end of the control circuit is coupled to the transistor The output end of the control circuit is coupled to the voltage detecting voltage dividing resistor, and the voltage dividing node of the voltage detecting voltage dividing resistor is coupled to the external AC voltage source. 如申請專利範圍第9項所述的LED光引擎電子控制裝置,其中該線電壓調整率緊縮器更包括一另一電壓偵測並聯調節器或一另一電壓偵測雙載子接面電晶體,透過一另一電壓偵測分壓電阻,耦接於輸入電壓,當輸入電壓克服所有的該些外部LED子陣列之順向電壓降,但尚未克服該另一電壓偵測並聯調節器或該另一電壓偵測雙載子接面電晶體之參考電壓,且未克服該電壓偵測並聯調節器或該電壓偵測雙載子接面電晶體之參考電壓時,通過點亮之外部LED子陣列的電流為該第一電流,當輸入電壓克服所有的該些外部LED子陣列之順向電壓降,且克服該另一電壓偵測並聯調節器或該另一電 壓偵測雙載子接面電晶體之參考電壓時,並克服該電壓偵測並聯調節器或該電壓偵測雙載子接面電晶體之參考電壓時,通過點亮之外部LED子陣列的電流為一第二電流,當輸入電壓克服所有的該些外部LED子陣列之順向電壓降,且克服該另一電壓偵測並聯調節器或該另一電壓偵測雙載子接面電晶體之參考電壓時,但未克服該電壓偵測並聯調節器或該電壓偵測雙載子接面電晶體之參考電壓時,通過點亮之外部LED子陣列的電流為一第三電流,該第一電流大於該第三電流,且該第三電流大於該第二電流。 The LED light engine electronic control device according to claim 9, wherein the line voltage adjustment rate compactor further comprises another voltage detecting parallel regulator or another voltage detecting double carrier junction transistor. Through another voltage detecting voltage dividing resistor, coupled to the input voltage, when the input voltage overcomes all of the forward voltage drops of the external LED sub-arrays, but has not overcome the other voltage detecting shunt regulator or the The other voltage detects the reference voltage of the bipolar junction transistor, and does not overcome the reference voltage of the voltage detection shunt regulator or the voltage detection bipolar junction transistor, and the external LED through the illumination The current of the array is the first current, when the input voltage overcomes all of the forward voltage drops of the external LED sub-arrays, and the other voltage is detected to overcome the shunt regulator or the other When detecting the reference voltage of the bipolar junction transistor and overcoming the reference voltage of the voltage detection shunt regulator or the voltage detection bipolar junction transistor, by illuminating the external LED sub-array The current is a second current, when the input voltage overcomes all of the forward voltage drops of the external LED sub-arrays, and overcomes the other voltage detection shunt regulator or the other voltage detection bi-carrier junction transistor When the reference voltage is not overcome, the current of the external LED sub-array that is illuminated is a third current when the reference voltage of the voltage detecting shunt regulator or the voltage detecting bipolar junction transistor is not overcome. A current is greater than the third current, and the third current is greater than the second current. 如申請專利範圍第9項所述的LED光引擎電子控制裝置,其中該線電壓調整率緊縮器更包括一電壓偵測旁通開關,該電壓偵測旁通開關受控於該電壓偵測並聯調節器或該電壓偵測雙載子接面電晶體,且該電壓偵測旁通開關的通道係與一分壓電阻的一部分並聯耦接,該分壓電阻更耦接於該電流檢測電阻,當該電壓偵測並聯調節器或該電壓偵測雙載子接面電晶體導通時,該電壓偵測旁通開關導通而旁通該分壓電阻,使該線電壓調整率緊縮器調控該通過LED子陣列的電流為該第二電流。 The LED light engine electronic control device according to claim 9, wherein the line voltage adjustment rate compactor further comprises a voltage detection bypass switch, wherein the voltage detection bypass switch is controlled by the voltage detection in parallel The regulator or the voltage detecting bipolar junction transistor, and the channel of the voltage detection bypass switch is coupled in parallel with a portion of a voltage dividing resistor, and the voltage dividing resistor is further coupled to the current detecting resistor. When the voltage detecting shunt regulator or the voltage detecting double carrier junction transistor is turned on, the voltage detecting bypass switch is turned on to bypass the voltage dividing resistor, so that the line voltage adjusting rate tightener regulates the passage. The current of the LED sub-array is the second current. 如申請專利範圍第13項所述的LED光引擎電子控制裝置,其中該電壓偵測旁通開關為金氧半場效電晶體或光電晶體。 The LED light engine electronic control device of claim 13, wherein the voltage detection bypass switch is a gold oxide half field effect transistor or a photoelectric crystal. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,更包括一正弦電壓補償器,該正弦電壓補償器之第一端耦接該整流器,該正弦電壓補償器之第二端接地,該正弦電壓補償器之分壓節點耦接該些比較電路之一,該直流脈衝電壓於該正弦電壓補償器之分壓節點具有一分壓,其中,該分壓用以提供分段點亮該些LED子陣列之複數個電流一正弦成份,使得分段點亮該些LED子陣列之該些電流的波形更接近正弦波。 The LED light engine electronic control device of claim 1, further comprising a sinusoidal voltage compensator, the first end of the sinusoidal voltage compensator being coupled to the rectifier, the second end of the sinusoidal voltage compensator being grounded, The voltage dividing node of the sinusoidal voltage compensator is coupled to one of the comparison circuits, the DC pulse voltage having a partial pressure at a voltage dividing node of the sinusoidal voltage compensator, wherein the voltage dividing is used to provide segmentation lighting The plurality of current-sinusoidal components of the LED sub-arrays cause the waveforms of the currents that segmentally illuminate the LED sub-arrays to be closer to a sine wave. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中每該旁通開關包括一空乏型金氧半場效電晶體,耦接一齊納二極體、一第一電阻及一第二電阻,該齊納二極體之陽極耦接該空乏型金氧半場效電晶體之閘極,該齊納二極體之陰極耦接該空乏型金氧半場效電晶體之源極,該第一電阻與該齊納二極體並聯,該第二電阻耦接該金氧半場效電晶體之閘極與對應之比較電路。 The LED light engine electronic control device of claim 1, wherein each of the bypass switches includes a depletion type MOS field effect transistor coupled to a Zener diode, a first resistor, and a second a resistor, the anode of the Zener diode is coupled to the gate of the depleted metal oxide half field effect transistor, and the cathode of the Zener diode is coupled to the source of the depleted metal oxide half field effect transistor A resistor is coupled in parallel with the Zener diode, and the second resistor is coupled to the gate of the MOS field transistor and the corresponding comparison circuit. 如申請專利範圍第16項所述的LED光引擎電子控制裝置,更包括一另一雙載子接面電晶體,該第二電阻係透過該另一雙載子接面電晶體耦接該比較電路。 The LED light engine electronic control device of claim 16, further comprising a further dual carrier junction transistor, wherein the second resistor is coupled to the other through the other dual carrier junction transistor Circuit. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中每該旁通開關包括一增強型金氧半場效電晶體及一啟動電阻,該啟動電阻耦接於該增強型金氧半場效電晶體之閘極與汲極間,該增強型金氧半場效電晶體之閘極與源極間的電容透過該啟動電阻充電。 The LED light engine electronic control device of claim 1, wherein each of the bypass switches includes an enhanced MOS field effect transistor and a starting resistor, and the starting resistor is coupled to the enhanced MOS field. Between the gate and the drain of the effect transistor, the capacitance between the gate and the source of the enhanced MOS field-effect transistor is charged through the startup resistor. 如申請專利範圍第18項所述的LED光引擎電子控制裝置,更包括複數個二極體,該些二極體之陽極分別耦接於對應之旁通開關,且該些二極體之陰極分別耦接於對應之外部LED子陣列的陽極。 The LED light engine electronic control device of claim 18, further comprising a plurality of diodes, wherein the anodes of the diodes are respectively coupled to the corresponding bypass switches, and the cathodes of the diodes They are respectively coupled to the anodes of the corresponding external LED sub-arrays. 如申請專利範圍第18所述的LED光引擎電子控制裝置,更包括一電壓調節器,其中該電壓調節器包括一第四雙載子接面電晶體、一電容、一另一齊納二極體及一第三電阻,該電容耦接於該雙載子接面電晶體之射極與該另一齊納二極體之陽極間,且該第三電阻係跨接於該第四雙載子接面電晶體之基極與集極之間。 The LED light engine electronic control device of claim 18, further comprising a voltage regulator, wherein the voltage regulator comprises a fourth dual carrier junction transistor, a capacitor, and another Zener diode And a third resistor, the capacitor is coupled between the emitter of the bipolar junction transistor and the anode of the other Zener diode, and the third resistor is connected to the fourth bipolar carrier Between the base and the collector of the surface transistor. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中更 包括複數個閃爍抑制電容與複數個二極體,每該閃爍抑制電容分別並聯於對應之外部LED子陣列,且每該二極體之陰極耦接至對應之外部LED子陣列的陽極,使得當輸入電壓克服當級及當級以下之外部LED子陣列的順向電壓降之和,但未克服上級及上級以下之外部LED子陣列的順向電壓降之和時,輸入電流點亮當級及當級以下之外部LED子陣列,且該些閃爍抑制電容放電以點亮當級以上之外部LED子陣列。 For example, the LED light engine electronic control device described in claim 1 is more The plurality of flash suppression capacitors and the plurality of diodes are respectively connected in parallel to the corresponding external LED sub-array, and the cathode of each of the diodes is coupled to the anode of the corresponding external LED sub-array, so that The input voltage overcomes the sum of the forward voltage drops of the external LED sub-array below the current level and below, but does not overcome the sum of the forward voltage drops of the external LED sub-array below the upper stage and the upper stage, the input current is lit and the level is An external LED sub-array below the stage, and the flicker suppression capacitors discharge to illuminate the external LED sub-array above the level. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中更包括複數個閃爍抑制電容與複數個二極體,每該閃爍抑制電容分別並聯對應之一個或串聯之多個外部LED子陣列,且每該二極體之陰極耦接至對應之外部LED子陣列的陽極,使得當輸入電壓克服當級及當級以下之外部LED子陣列的順向電壓降之和,但未克服上級及上級以下之外部LED子陣列的順向電壓降之和時,輸入電流點亮當級及當級以下之外部LED子陣列,且該些閃爍抑制電容放電以點亮上級及上級以下之外部LED子陣列。 The LED light engine electronic control device of claim 1, further comprising a plurality of flicker suppression capacitors and a plurality of diodes, wherein each of the flicker suppression capacitors is connected in parallel or in plurality of external LEDs in series An array, and each cathode of the diode is coupled to an anode of the corresponding external LED sub-array such that when the input voltage overcomes the sum of the forward voltage drops of the external LED sub-array of the current stage and below, but does not overcome the superior And the sum of the forward voltage drops of the external LED sub-array below the upper level, the input current illuminates the external LED sub-array of the current level and below, and the flicker suppression capacitors discharge to illuminate the external LEDs of the upper stage and the upper level Subarray. 如申請專利範圍第1項所述的LED光引擎電子控制裝置,其中該LED光引擎電子控制裝置係實作於一積體電路上,或以模組區分實作於多個積體電路,再整合於一電路板上。 The LED light engine electronic control device according to claim 1, wherein the LED light engine electronic control device is implemented on an integrated circuit, or is divided into a plurality of integrated circuits by a module, and then Integrated on a circuit board.
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