TWI499078B - Device substrate, manufacturing method of device substrate, optical apparatus and manufacturing method thereof - Google Patents

Description

Element substrate, method of manufacturing the element substrate, photovoltaic device, and manufacturing thereof method

The present application relates to a substrate and a method of fabricating the same, a semiconductor device and a method of fabricating the same, and more particularly to an element substrate and a method of fabricating the same, an optoelectronic device, and a method of fabricating the same.

In recent years, light-emitting diodes (LEDs) have been widely used in the market. For example, a combination of blue light and yellow fluorescent powder made of gallium nitride (GaN) can obtain white light, not only in terms of brightness or power consumption. It is brighter and saves power than the traditional bubble light source, which can greatly reduce the power consumption. In addition, the light-emitting diode has the advantages of fast reaction speed, small volume, low pollution, high reliability, and suitable mass production.

Light-emitting diodes from red, green, blue, and ultraviolet light are mostly dominated by GaN series compounds, but because GaN substrates are too expensive and not common, Therefore, an alumina (sapphire) substrate is often used in the manufacture of the aforementioned gallium nitride light-emitting diode. However, the alumina substrate itself has a certain degree of difference from the lattice constant, thermal expansion coefficient and chemical properties of gallium nitride, so that it is on a heterogeneous substrate (for example, a germanium substrate, a tantalum carbide substrate or an aluminum oxide substrate). The grown gallium nitride layer has many line defects and misalignments, and these misalignments extend as the thickness of the grown gallium nitride layer increases, that is, the formation of a penetration misalignment. These cases of penetration misalignment will seriously affect the electrical transmission effect in the gallium nitride layer, which in turn leads to poor performance of the photovoltaic device. therefore, How to make the component substrate have a good component growth basis to reduce the occurrence of penetration misalignment is a problem that the technicians in the field are eager to solve.

The present application provides a method of fabricating an element substrate such that the element substrate can provide an appropriate component growth basis.

The present application provides an element substrate that can provide a suitable basis for component growth.

The present application provides a method of fabricating an optoelectronic device such that the optoelectronic device has good electrical performance.

The present application provides an optoelectronic device that has good electrical performance.

The present application proposes a method of manufacturing an element substrate comprising the following steps. First, a surface treatment is performed on a growth surface of a substrate to form an amorphous shallow junction region in the substrate, wherein the amorphous shallow junction region is extended by the growth surface. To the inside of the substrate. Next, a nitride nucleation layer is formed on the amorphous shallow junction region at a temperature lower than 800 degrees Celsius.

The present application proposes an element substrate comprising a substrate and a nitride crystal nucleation layer. The substrate has an amorphous shallow junction region, wherein the amorphous shallow junction region extends from one of the growth surfaces of the substrate to the interior of the substrate. The nitride nucleation layer is located on the amorphous shallow junction region.

The present application proposes a method of manufacturing an optoelectronic device, which includes the following step. First, a surface of a growth surface of a substrate is subjected to a surface treatment to form an amorphous shallow junction region in the substrate, wherein the amorphous shallow junction region extends from the growth surface to the inside of the substrate. Next, a nitride crystal nucleation layer is formed on the amorphous shallow junction region at a temperature lower than 800 degrees Celsius. Thereafter, a photovoltaic element layer is formed on the nitride crystal nucleation layer.

The present application further provides an optoelectronic device comprising a substrate, a nitride nucleation layer, and a photovoltaic element layer. The substrate has an amorphous shallow junction region, wherein the amorphous shallow junction region extends from one of the growth surfaces of the substrate to the interior of the substrate. The nitride nucleation layer is located on the amorphous shallow junction region. The photovoltaic element layer is on the nitride crystal nucleation layer.

Based on the above, the present application forms an amorphous shallow junction region extending from the growth surface to the inside in the substrate, and forms a nitride crystal nucleation layer on the amorphous shallow junction region, and the nitride crystal nucleation layer can The component substrate has a good component growth basis, thereby reducing the dislocation density in the photosensor layer to improve the electrical performance of the photovoltaic device.

The above-described features and advantages of the present application will become more apparent and understood.

1 to 5 are schematic views showing a manufacturing process of a photovoltaic device according to an embodiment of the present invention. Referring to FIG. 1 , first, a stop layer 120 is formed on a growth surface 112 of a substrate 110. The barrier layer 120 may be made of an oxide such as yttrium oxide (SiO). ₂ ). The thickness of the barrier layer 120 is, for example, 900 Å. In the present embodiment, the material of the substrate 110 is alumina (Al ₂ O ₃ ), that is, the content of the aluminum element in the substrate 110 is about 2/3 times the content of the oxygen element.

Next, referring to FIG. 2, the substrate 110 is subjected to a surface treatment S such that the substrate 110 has an amorphous shallow junction region 114. Specifically, the surface treatment S described above is, for example, ion implantation of the substrate 110 to implant a plurality of modifying elements 130 into the barrier layer 120 and a portion of the substrate 110, wherein the substrate 110 has a modification therein. The region of element 130 may form an amorphous shallow junction region 114. The reforming element 130 is, for example, an argon element (Ar), and the content of the modifying element 130 is, for example, greater than 10 ¹⁵ cm ^-3 .

In the present embodiment, the amorphous shallow junction region 114 extends, for example, from the growth surface 112 of the substrate 110 to the interior of the substrate 110. In other words, the amorphous shallow junction region 114 extends from the growth surface 112 of the substrate 110 in the thickness direction and has a depth D. In the present embodiment, the depth D of the amorphous shallow junction region 114 is, for example, less than 1 micrometer.

It is worth mentioning that the surface treatment S is, for example, comprehensively ion-implanted the growth surface 112 of the substrate 110 so that the growth surface 112 of the substrate 110 is modified. At this time, the growth surface 112 of the substrate 110 is comprehensive. It is qualitatively modified to an amorphous shallow junction region 114.

Referring next to FIG. 3, the barrier layer 120 is removed to expose a rough surface 116 of the amorphous shallow junction region 114. In other words, through the ion implantation described above, a portion of the modifying element 130 is implanted in the substrate 110 to form an amorphous shallow junction region 114 such that the originally flat growth surface 112 is roughened into a rough surface 116. In addition, a portion of the modifying element 130 will remain on the growth surface 112 of the substrate 110 to make the amorphous shallow junction region 114 thick. The rough surface 116, wherein the roughness (Ra) of the rough surface 116 is, for example, on average greater than 0.3 nm.

In the above, after the ion implantation is performed on the substrate 110, the implantation of the modifying element 130 affects the average ratio of the content of the aluminum element to the content of the oxygen element in the substrate 110 of the shallow junction region 114. In the present embodiment, after the ion implantation is performed on the substrate 110, the content of the aluminum element in the amorphous shallow junction region 114 is x times the content of the oxygen element, and x is, for example, greater than 2/3. This means that the proportion of aluminum content will increase. In other words, the present embodiment can adjust the surface ratio of the substrate 110 located in the shallow junction region 114 of the crystalline form by changing the average ratio of the content of the aluminum element to the content of the oxygen element in the substrate 110 of the shallow junction region 114. Such as chemical properties, lattice coefficients or other surface characteristics to be adjusted.

It should be noted that the present embodiment is an example in which the substrate 110 is alumina, however, the invention is not limited thereto. In other embodiments, the material of the substrate 110 may also be tantalum, tantalum carbide, sapphire, gallium nitride, aluminum nitride, glass, quartz, zinc oxide, magnesium oxide or lithium gallium oxide. Further, in the present embodiment, the substrate 110 is ion-implanted through the argon element as the modifying element 130, however, the present invention is not limited thereto. In other embodiments, the modifying element 130 may also be aluminum, indium, gallium, germanium, zirconium, titanium, chromium, antimony, arsenic, phosphorus, antimony, boron, hydrogen, carbon, nitrogen, oxygen, argon or the foregoing elements. random combination. In other words, the designer can select different modifying elements 130 to perform ion implantation according to the material of the substrate 110, thereby adjusting the surface characteristics of the substrate 110.

Furthermore, in this embodiment, the surface treatment S is performed by ion implantation to make the substrate 110 have an amorphous shallow junction region 114. However, the present invention is not limited thereto. herein. In other embodiments, the surface treatment S can also be thermal diffusion, plasma treatment, chemical etching, or laser irradiation. In other words, any treatment procedure capable of roughening the surface of the substrate 110 can be used as the surface treatment S of the present invention.

Next, referring to FIG. 4, a nitride nucleation layer 140 is formed on the amorphous shallow junction region 114 at a temperature lower than 800 degrees Celsius, wherein the thickness of the nitride nucleation layer 140 is 10 Nano to 100 nm. The material of the nitride crystal core layer 140 is, for example, aluminum nitride (AlN), gallium nitride (GaN), boron nitride (BN), hafnium nitride (HfN), chromium nitride (CrN), titanium nitride (TiN). ), zirconium nitride (ZrN) and tantalum nitride (ScN). In the present embodiment, the material of the nitride crystal core layer 140 is preferably aluminum nitride (AlN).

Specifically, aluminum nitride may be crystallized on the rough surface 116 of the amorphous shallow junction region 114 at a temperature of about 500 degrees Celsius to form a nitride crystal core layer 140. Moreover, since the amorphous shallow junction region 114 has a comprehensive rough surface 116, the nitride crystal core layer 140 is, for example, wholly located on the rough surface 116 of the amorphous shallow junction region 114. In addition, since the content of the aluminum element in the substrate 110 of the amorphous shallow junction region 114 is increased, the modified amorphous shallow connection is compared with the growth surface 112 of the substrate 110 which has not been surface treated S. The rough surface 116 of the face region 114 is more suitable for the growth of the nitride nucleation layer 140.

So far, the element substrate 100 in the photovoltaic device 10 has been initially completed. Next, a manufacturing flow for forming a photovoltaic element layer 200 on the element substrate 100 will be described below.

Please refer to FIG. 5, on the nitride crystal nucleation layer 140 of the element substrate 100. A photovoltaic element layer 250 is formed. The photo-electric device layer 250 is, for example, a light-emitting diode element layer, and includes a buffer semiconductor layer 210, a first-type doped semiconductor layer 220, an active layer 230, a second-type doped semiconductor layer 240, and a first electrode. Layer 250 and a second electrode layer 260.

The buffer semiconductor layer 210 is on the nitride crystal nucleation layer 140. The first type doped semiconductor layer 220 is on the buffer semiconductor layer 210. The active layer 230 is on the first type doped semiconductor layer 220. The second type doped semiconductor layer 240 is on the active layer 230. The first electrode layer 250 is disposed on the second type doped semiconductor layer 240, and the first electrode layer 250 may include a metal electrode layer 250a and a transparent electrode layer 250b. The second electrode layer 260 is located on the first type doped semiconductor layer 220, and the active layer 230, the second type doped semiconductor layer 240, and the first electrode layer 250 expose the second electrode layer 260. The structure of the light-emitting diode element layer and the material of each component should be well known to those skilled in the art, and will not be described herein.

In the present embodiment, the material of the first type doped semiconductor layer 220 is, for example, gallium nitride containing a group C element, and the material of the second type doped semiconductor layer 240 is, for example, gallium nitride containing a group III element. In other words, the first type doped semiconductor layer 220 is, for example, an n-type doped semiconductor layer, and the second type doped semiconductor layer 220 is, for example, a p-type doped semiconductor layer. Of course, the invention is not limited thereto. In other embodiments, the first type doped semiconductor layer 220 may be a p-type doped semiconductor layer, and the second type doped semiconductor layer 220 may be an n-type doped semiconductor layer.

In the present embodiment, the material of the buffer semiconductor layer 210 is, for example, undoped gallium nitride, and the material of the nitride crystal core layer 140 is, for example, aluminum nitride. when When the buffer semiconductor layer 210 is formed on the nitride crystal core layer 140, since the properties of the nitride crystal core layer 140 and the buffer semiconductor layer 210 are similar, the nitride crystal core layer 140 helps to buffer the growth of the semiconductor layer 210, thereby reducing The situation of penetrating misplacement occurs. In other words, the element substrate 100 can provide a good growth base of the photovoltaic element layer 200 through the nitride crystal core layer 140, so that the photovoltaic device 10 can be further provided with good electrical performance.

In the present embodiment, the photo-electric element layer 250 is a light-emitting diode element layer as an example, but the present invention is not limited thereto. In other embodiments, the photovoltaic element layer 250 can also be a layer of solar cell elements or other layer of photovoltaic elements having a layer of nitride semiconductor material.

Experimental example

The influence of the element substrate on the grown gallium nitride layer will be described below with reference to Example 1 and Comparative Example 1. In detail, in the first example, after the ion implantation of the alumina substrate to form an amorphous shallow junction region, the gallium nitride crystal nucleation layer is formed at a growth temperature of about 500 degrees Celsius on the amorphous shallow junction region. Next, a gallium nitride layer is grown on the element substrate at a growth temperature of about 1000 degrees Celsius. In Comparative Example 1, a gallium nitride layer was grown directly on the surface substrate which was not surface-treated. Table 1 is the parameters of the ion implantation of the element substrate of Example 1. Fig. 6 is a chart showing the X-ray absorption diffraction spectrum of the element substrate of Example 1 and Comparative Example 1.

As shown in FIG. 6, the full width at half maximum of Example 1 was about 480 arc seconds (arcsec), and the full width at half maximum of Comparative Example 1 was about 565 arc seconds (arcsec). From this, it is understood that the crystal quality of the gallium nitride layer of Example 1 is superior to that of the gallium nitride layer of Comparative Example 1. In other words, the element substrate produced by the method for manufacturing an element substrate of the present application can surely provide a good growth basis for the gallium nitride layer.

Evaluation of light-emitting diodes

The structures of the light-emitting diodes of Example 2, Example 3, and Example 4 are shown in FIG. The structures of Comparative Example 2, Comparative Example 3, and Comparative Example 4 were similar to those of Example 2 except that Comparative Example 2, Comparative Example 3, and Comparative Example 4 were used to fabricate light-emitting diodes directly on an untreated alumina substrate. Body element layer. 7 is a leakage current test result of the light-emitting diodes of Example 2, Example 3, and Example 4. Fig. 8 shows the results of leakage current test of the light-emitting diode elements of Comparative Example 2, Comparative Example 3, and Comparative Example 4. 7 and FIG. 8, the leakage currents of the light-emitting diodes of Example 2, Example 3, and Example 4 were significantly higher than those of Comparative Example 2, Comparative Example 3, and Comparative Example 4 when the voltage was -20 volts (V). The leakage current of the diode is small. In other words, the light-emitting diode elements of Comparative Example 2, Comparative Example 3, and Comparative Example 4 did have a better electrical performance.

In summary, the component substrate of the present application forms a comprehensive amorphous shallow junction region in the substrate and forms a nitride crystal nucleation layer on the amorphous shallow junction region. The nitride crystal nucleation layer may have desirable surface characteristics, for example, similar to the properties of the buffer semiconductor layer in the photovoltaic element layer, thereby providing light The electrical component layer has a good component growth base, thereby reducing the misalignment density in the photovoltaic device layer, and thereby optimizing the electrical performance of the photovoltaic device.

Although the present application has been disclosed in the above embodiments, it is not intended to limit the application, and any person having ordinary skill in the art can make some changes without departing from the spirit and scope of the present application. Retouching, the scope of protection of this application is subject to the definition of the scope of the patent application attached.

10‧‧‧Optoelectronic devices

100‧‧‧ element substrate

110‧‧‧Substrate

112‧‧‧Growth surface

114‧‧‧Amorphous shallow junction area

116‧‧‧Rough surface

120‧‧‧Barrier layer

130‧‧‧Modified elements

140‧‧‧Nitride nucleation layer

200‧‧‧Photoelectric layer

210‧‧‧buffered semiconductor layer

220‧‧‧First type doped semiconductor layer

230‧‧‧ active layer

240‧‧‧Second type doped semiconductor layer

250‧‧‧First electrode layer

250a‧‧‧metal electrode layer

250b‧‧‧transparent electrode layer

260‧‧‧Second electrode layer

S‧‧‧Surface treatment

1 to 5 are schematic views showing a manufacturing process of a photovoltaic device according to an embodiment of the present invention.

Fig. 6 is a chart showing the X-ray absorption diffraction spectrum of the element substrate of Example 1 and Comparative Example 1.

7 is a leakage current test result of the light-emitting diodes of Example 2, Example 3, and Example 4.

Fig. 8 shows the results of leakage current test of the light-emitting diode elements of Comparative Example 2, Comparative Example 3, and Comparative Example 4.

10‧‧‧Optoelectronic devices

100‧‧‧ element substrate

110‧‧‧Substrate

114‧‧‧Amorphous shallow junction area

116‧‧‧Rough surface

130‧‧‧Modified elements

140‧‧‧Nitride nucleation layer

200‧‧‧Photoelectric layer

210‧‧‧buffered semiconductor layer

220‧‧‧First type doped semiconductor layer

230‧‧‧ active layer

240‧‧‧Second type doped semiconductor layer

250‧‧‧First electrode layer

250a‧‧‧metal electrode layer

250b‧‧‧transparent electrode layer

260‧‧‧Second electrode layer

Claims (35)

A method for manufacturing a component substrate, comprising: performing a surface treatment on a growth surface of a substrate to form an amorphous shallow junction region in the substrate, wherein the amorphous shallow junction region extends from the growth surface to the An inner portion of the substrate; and a nitride crystal nucleation layer formed on the amorphous shallow junction region at a temperature lower than 800 degrees Celsius. The method for manufacturing an element substrate according to claim 1, wherein the material of the substrate is alumina (Al ₂ O ₃ ), and the content of the aluminum element in the amorphous shallow junction region is oxygen content. x times and x is greater than 2/3. The method of fabricating an element substrate according to claim 1, wherein the amorphous shallow junction region has a depth of less than 1 micrometer. The method of manufacturing a component substrate according to claim 1, wherein the amorphous shallow junction region has a rough surface, wherein the roughness of the rough surface is greater than 0.3 nm. The method of manufacturing an element substrate according to claim 1, wherein the nitride crystal nucleation layer has a thickness of from 10 nm to 100 nm. The method for manufacturing an element substrate according to claim 1, wherein the material of the nitride crystal nucleation layer comprises aluminum nitride (AlN), gallium nitride (GaN), boron nitride (BN), and tantalum nitride. (HfN), titanium nitride (TiN), chromium nitride (CrN), zirconium nitride (ZrN), and tantalum nitride (ScN). The method for manufacturing an element substrate according to claim 1, wherein the surface treatment comprises ion implantation, thermal diffusion, plasma treatment, Chemical etching or laser irradiation. The method of manufacturing a component substrate according to claim 1, wherein the surface treatment comprises: forming a barrier layer on the growth surface of the substrate; performing an ion implantation to implant a plurality of modified elements Forming the amorphous shallow junction region into the substrate; and removing the barrier layer. The method for manufacturing an element substrate according to claim 8, wherein the modified elements include aluminum, indium, gallium, germanium, zirconium, titanium, chromium, antimony, arsenic, phosphorus, antimony, boron, hydrogen, carbon. , nitrogen, oxygen, argon or any combination of the foregoing. An element substrate comprising: a substrate having an amorphous shallow junction region, wherein the amorphous shallow junction region extends from a growth surface of the substrate to the inside of the substrate; and a nitride nucleation layer Located on the amorphous shallow junction area. The component substrate according to claim 10, wherein the substrate is made of aluminum oxide (Al ₂ O ₃ ), and the aluminum element in the amorphous shallow junction region is x times the oxygen content. And x>2/3. The element substrate of claim 10, wherein the amorphous shallow junction region has a depth of less than 1 micrometer. The element substrate of claim 10, wherein the amorphous shallow junction region has a rough surface, wherein the roughness of the rough surface is greater than 0.3 nm. The element substrate of claim 10, wherein the nitride crystal nucleation layer has a thickness of from 10 nm to 100 nm. The component substrate according to claim 10, wherein the material of the nitride crystal nucleation layer comprises aluminum nitride (AlN), gallium nitride (GaN), boron nitride (BN), hafnium nitride (HfN). , chromium nitride (CrN), titanium nitride (TiN), zirconium nitride (ZrN) and tantalum nitride (ScN). The component substrate according to claim 10, wherein the substrate has a plurality of modifying elements in the amorphous shallow junction region, and the content of the modifying elements is greater than 10 ¹⁵ cm ^-3 . The component substrate according to claim 16, wherein the modified elements include aluminum, indium, gallium, germanium, zirconium, titanium, chromium, strontium, arsenic, phosphorus, antimony, boron, hydrogen, carbon, nitrogen, Oxygen, argon or any combination of the foregoing. A method of manufacturing a photovoltaic device, comprising: performing a surface treatment on a growth surface of a substrate to form an amorphous shallow junction region in the substrate, the amorphous shallow junction region extending from the growth surface to the The inside of the substrate; forming a nitride crystal nucleation layer on the amorphous shallow junction region at a temperature lower than 800 degrees Celsius; and forming a photovoltaic element layer on the nitride crystal nucleation layer. The method for manufacturing a photovoltaic device according to claim 18, wherein the substrate is made of alumina (Al ₂ O ₃ ), and the content of the aluminum element in the amorphous shallow junction region is oxygen content. x times and x is greater than 2/3. Manufacture of photovoltaic devices as described in claim 18 The method wherein the amorphous shallow junction region has a depth of less than 1 micron. The method of fabricating a photovoltaic device according to claim 18, wherein the amorphous shallow junction region has a rough surface, wherein the roughness of the rough surface is greater than 0.3 nm. The method of manufacturing a photovoltaic device according to claim 18, wherein the nitride crystal nucleation layer has a thickness of from 10 nm to 100 nm. The method of manufacturing a photovoltaic device according to claim 18, wherein the material of the nitride crystal nucleation layer comprises aluminum nitride (AlN), gallium nitride (GaN), boron nitride (BN), and chromium nitride. (CrN), hafnium nitride (HfN), titanium nitride (TiN), zirconium nitride (ZrN), and tantalum nitride (ScN). The method of manufacturing a photovoltaic device according to claim 18, wherein the surface treatment comprises ion implantation, thermal diffusion, plasma treatment, chemical etching or laser irradiation. The method of manufacturing a photovoltaic device according to claim 18, wherein the surface treatment comprises: forming a barrier layer on the growth surface of the substrate; performing an ion implantation to cause a plurality of modified elements to be implanted Forming the amorphous shallow junction region into the substrate; and removing the barrier layer. The method for manufacturing a photovoltaic device according to claim 25, wherein the modified elements include aluminum, indium, gallium, germanium, zirconium, titanium, chromium, strontium, arsenic, phosphorus, antimony, boron, hydrogen, carbon. , nitrogen, oxygen, argon or any combination of the foregoing. An optoelectronic device comprising: a substrate having an amorphous shallow junction region, wherein the amorphous shallow junction region extends from a growth surface of the substrate to the interior of the substrate; a nitride crystal nucleation layer is located in the amorphous shallow junction And a photo-electric element layer on the nitride crystal nucleation layer. The photovoltaic device according to claim 27, wherein the substrate is made of aluminum oxide (Al ₂ O ₃ ), and the aluminum element in the amorphous shallow junction region is x times the oxygen content. And x>2/3. The photovoltaic device of claim 27, wherein the amorphous shallow junction region has a depth of less than 1 micron. The photovoltaic device of claim 27, wherein the amorphous shallow junction region has a rough surface, wherein the roughness of the rough surface is greater than 0.3 nm. The photovoltaic device of claim 27, wherein the nitride nucleation layer has a thickness of from 10 nm to 100 nm. The photovoltaic device according to claim 27, wherein the material of the nitride crystal nucleation layer comprises aluminum nitride, gallium nitride (GaN), boron nitride (BN), hafnium nitride (HfN), and nitride. Chromium (CrN), titanium nitride (TiN), zirconium nitride (ZrN), and tantalum nitride (ScN). The photovoltaic device according to claim 27, wherein the substrate has a plurality of modifying elements in the amorphous shallow junction region, and the content of the modifying elements is greater than 10 ¹⁵ cm ^-3 . The photovoltaic device according to claim 33, wherein the modified elements include aluminum, indium, gallium, germanium, zirconium, titanium, chromium, strontium, arsenic, phosphorus, antimony, boron, hydrogen, carbon, nitrogen, Oxygen, argon or any combination of the foregoing. The photovoltaic device of claim 27, wherein the photovoltaic element layer comprises a light emitting diode element layer.