I24164W/C 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種切割晶圓的前製程以及切割晶 圓的方法，且特別是有關於一種玎避免在晶圓切割過程中 晶粒邊角處發生損傷(damages)之切割晶圓的前製程以及 切割晶圓的方法。 【先前技術】 隨著科技曰新月異，積體電路(Integrated Circuits，1C) 元件已廣泛地應用於我們日常生活當中。一般而言，積體 電路的生產，主要分為三個階段：矽晶圓的製造、積體電 路的製作及積體電路的封裝(package)等。而以積體電路的 封裝而言，其首要步驟就是要先進行晶粒切割(DieSaw)。 在一矽晶圓上，通常具有多個相互平行之水平切割 遏(Scribe line)與多個相互垂直之垂直切割道，用以將多 個晶粒(die)彼此分隔開。當晶圓上的元件製作完成後，係 利用鑽石刀具(Diamond Blade)沿著晶圓之切割道切割，以 得到夕數個晶粒。由於晶圓上覆蓋有多種不同材料層，因 此在晶圓切割操作期間，位於切割道上的材料層，會因彼 此材料性質有所差異，而在切割道上產生龜裂（chipping) 或裂痕(peeling)等損傷(damage)。 特別是，上述所提及之損傷，在靠近晶粒邊角處 (comer)，即切割道交叉處會最為嚴重，而形成應力集中 區。而且，此邊角處遭受損傷之晶粒，在完成封裝製程後， 還會因為一些外在應力的作用，例如冷熱之溫度變化，而 ^796twf.doc/c 使封裝體在界面處造成裂痕擴大或脫層（delamination)的問 題，如此將會導致元件失效或降低元件之使用壽命，造成 製程上成本的耗費，並且影響後續封裝製程以及元件可靠 度。 習知另一種切告彳技術為使用雷射切割(laser grooving) 替代鑽石刀切割(blade sawing)。然而，此雷射切割技術仍 具有一些問題。例如，在晶圓切割操作期間，晶圓上覆蓋 的材料層若為含有金屬之材料層，則金屬在雷射熔化過程 中不易被清除乾淨，而在晶圓上殘留一些殘骸(debris)， 進而造成晶粒污染。另外，雷射切割亦會在切割道的周圍 形成熱影響區(heat effect area)，而此熱影響區過大則會影 f晶粒之可靠度(reliability)。而且，一般雷射切割設備的 價格為鑽石刀切割設備的2〜3倍，因此會耗費更多的成 本。 —另外，美國專利第 5,530,280 號(u.S· Pat. No. 5,530,280) 2容已揭露-種在元件上製作防止裂縫(cradst〇p)的結構 『方法，但此方法仍然無法有效解決上述之問題。 【發明内容】 的此，本發明的目的就是在提供—種切割晶圓 二藉由此前製程以避免在晶圓切割操作期間，可 &成_邊角產生龜裂或裂痕等損傷問題。 由此2明的又—目的是提供—種切割晶81的方法，藉 1241645 13796twf.doc/c 本發明提出一種切割晶圓的前製程，包括提供一晶 圓，此晶圓具有多數條切割道以及由切割道所定義出之多 數個晶粒，而且在晶圓上已覆蓋有至少〆材料層。接著， 進行一移除步驟，去除各晶粒邊角處所對應之位於切割道 上的材料層。 。本發明又提出一種切割晶圓的方法，包括提供一晶 圓’此晶圓具有多數條切割道以及由切割道所定義出之多 數個晶粒，而且在晶圓上已覆蓋有至少一材料層。接著， 進行一移除步驟，去除各晶粒邊角處所對應之位於切割道 上的材料層。然後，對晶圓進行切割。 、由於本發明之切割晶圓的方法係利用一移除步驟， 二進割晶圓之前，先將切割道上之部分材料層移 處於切割過程中產生龜裂或免=角 二”方法可使切割後之晶粒保持完整，而 、、子衣衣耘，並能提升封裝體之可靠度。 、曼 為讓本發明之上述和其他目的、特ι微、^ i 月顯易懂，下文特舉較g给 、，、 和偸點能更 細說明如下。‘把例’亚配合所附圖式，作詳 【實施方式】 —般在晶圓上所形成之元件 ，，，而在製作這些元件的過程中：二(:材料層所 形成於切割道上。因此，在進 二材#層亦同樣會 上的輸，容易因為各個材料; 12416% 796twf.doc/c 而在刀d道上4成龜裂或裂痕專問題。而這些損 其以在晶粒邊角處(c。贿）’即切割道交叉處最為嚴、 而在此處形成應力集中區。 ‘、、、厫重， 因此，本發明係在切割晶圓之前對晶圓進行—前制 程。此前製程係利用—移除步驟，以去除晶圓上各ς 邊角處所對應之位於切割道上的材料層。如此—來可 區的應力，而在進行切割晶圓時’減少晶粒 邊f處之彳‘，從岐得，日粒能保持完整，並提升元件的 2度。以下鱗—較佳實施例說明本發明之切割 方法。 立圖1是繪示為本發明一較佳實施例的晶圓之上視示 t圖i首先，請參照圖i，本發明之切割晶圓的方法係提 供=晶圓100，此晶圓1〇〇具有多數條切割道11〇以及由 切割這110所定義出之多數個晶粒120，其中切割道11〇 包括相互平行之平行切割道ll〇a與多數條相互垂直之垂 直切割道U〇b。而且，在晶圓1〇〇上係已覆蓋有至少一 材料層。在一較佳實施例中，在晶圓1〇〇上係已覆蓋有介 ^層（未繪示）與導電層（未繪示），其中介電層的材質例如 是低介電常數值(κ)的介電材料或是其他介電材料，、而導 電層的材質例如是銅或是其他導電材質。 接著，對晶圓1〇〇進行移除步驟，以去除各晶粒12〇 邊角處所對應之位於切割道11〇上的材料層。在此，所謂 ，粒120邊角處所對應之位於切割道110上的材料層指的 疋切J道11〇上距離晶粒有適當寬度處的材料層（如圖1 1241645 13796twf.doc/c 所示之箭頭標號130)。 利用雷射、+ 其中，此移除步驟的進行例如是 言出an# 施例巾’在移除步驟之後， 路出日日圓表面，以避务接诗 曰暴 有材料性質不同的圓時’因晶圓上覆复 題。 消抖層，而造成習知之龜裂或裂痕等問 曰m日』:較佳實施例中，此移除步驟除了去除 曰:口上各個曰曰粒邊角處所對應之位於切割道上 甩 號no所指處)之外，更包括去除位於切割道^ =:處的材，以於_道UG交會處形成 =之凹槽圖案⑽。其中，圖2^所示為切p ^之局部區域(圖1之區域標號_的放大圖，而^ :、、'圖2A由I-Ι剖面線所得之剖面示意圖。凹槽圖案⑺ 例如是十字形(如g| 2A所示）、邊角圓弧形之十字形(如 2B所利、圓形(如圖2C所示）、橢圓形(如圖犯所示^ 夕邊幵y等。其中，多邊形例如是圖之四邊形或圖$ 之八邊形。 由於位在切割道110交會處的材料層已於移除步驟 中移除，即移除應力集中區的材料層。因此，在後續進行 晶圓切割時，可以避免晶粒邊角處之龜裂或裂痕等問題。τ 而在又一較佳實施例中，上述的移除步驟除了去除 位於切割道110交會處的材料層外，更包括去除各晶粒120 邊上(Side)所對應之位於切割道11〇上的材料層，而於切 割道110上形成圍繞各晶粒120周圍之多數條溝渠104。 1241645 13796twf.doc/c 以凹槽圖案102為十字形圖案(如圖2A所示）來說，直曰 在切割道1U)上於靠近晶粒12G側邊的位置形成如圖: 所示之多數條溝渠104，而圖5為圖4A由M，剖面 得之剖面示意圖。而以凹槽圖案102為邊角圓弧形之 形（如® 2B所示）為例，其可於切割道11〇上 4B所不之圍繞各晶粒⑽周圍之多數條溝渠ι〇 : 凹槽圖案102為其他圖案者（如圖2C〜2F所示=卜' ，圍繞各晶粒120周圍形成多數條溝渠(未繪:以：： 績所切割出的晶粒為完整的晶粒。 ）乂使後 由於本發明移除晶粒12〇邊角處鱼苴 應之位於切割道110上的材料層，因此，除" I側邊所對 之應力集中區夕卜，於靠近晶粒側邊的切^ =刀軎⑷1〇 產生損傷的問題。 U0亦不容易 另外在較佳實施例中，上述之^ 去除切割道110上位於溝ϋ私除步驟更包括 案102為十字形圖案（ 日支材料層。以凹槽圖 、， 1如圖2Α所不）為例，甘〆， Μ 這m上位於溝渠104之間的材料層 其係去除切割 意圖。另外 圖7為圖从由m-nr剖面=== (如I24164W / C IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a pre-process for dicing wafers and a method for dicing wafers, and more particularly, to a method for avoiding dies during wafer dicing. Pre-process of dicing wafers with damages at corners and methods for dicing wafers. [Previous Technology] With the advancement of technology, Integrated Circuits (1C) components have been widely used in our daily lives. Generally speaking, the production of integrated circuits is mainly divided into three stages: the manufacture of silicon wafers, the production of integrated circuits, and the packaging of integrated circuits. For integrated circuit packaging, the first step is to perform die cutting (DieSaw). On a silicon wafer, there are usually a plurality of parallel horizontal scribe lines and a plurality of vertical vertical scribe lines to separate a plurality of dies from each other. After the components on the wafer are manufactured, they are cut along the scribe lines of the wafer with a diamond blade to obtain several dies. Because the wafer is covered with a variety of different material layers, during the wafer dicing operation, the material layers located on the dicing path may have chipping or peeling on the dicing path due to different material properties of each other. Wait for damage. In particular, the damage mentioned above is most severe near the corner of the grain (comer), that is, at the intersection of the scribe lines, and forms a stress concentration area. In addition, the damaged die at this corner will cause cracks to expand at the interface due to some external stresses, such as changes in hot and cold temperatures, after the packaging process is completed. Or delamination, which will cause component failure or reduce the service life of the component, cause cost in the manufacturing process, and affect the subsequent packaging process and component reliability. Another technique known in the art is the use of laser grooving instead of blade sawing. However, this laser cutting technique still has some problems. For example, during the wafer dicing operation, if the material layer covered on the wafer is a material layer containing metal, the metal is not easily removed during the laser melting process, and some debris remains on the wafer, and further, Causes grain contamination. In addition, laser cutting will also form a heat effect area around the cutting path, and if the heat effect area is too large, it will affect the reliability of the crystal grains. Moreover, the price of general laser cutting equipment is 2-3 times that of diamond knife cutting equipment, so it will cost more. -In addition, US Pat. No. 5,530,280 (u.S. Pat. No. 5,530,280) has disclosed a method of making a structure to prevent cracks on the element, but this method still cannot effectively solve the above problems. [Summary of the Invention] Therefore, the object of the present invention is to provide a kind of dicing wafer by using the previous process to avoid damage problems such as cracks or cracks that may occur during the wafer cutting operation. It is clear from this that—the purpose is to provide—a method for dicing crystal 81. By 1241645 13796twf.doc / c, the present invention proposes a pre-process for dicing a wafer, including providing a wafer, and the wafer has a plurality of dicing channels. And most of the dies defined by the scribe lines, and the wafer has been covered with at least a layer of plutonium material. Then, a removing step is performed to remove the material layer corresponding to the corners of each die located on the cutting track. . The present invention further provides a method for dicing a wafer, including providing a wafer. The wafer has a plurality of scribe lines and a plurality of dies defined by the scribe lines, and the wafer is covered with at least one material layer. . Then, a removing step is performed to remove the material layer corresponding to the corners of each die located on the cutting track. Then, the wafer is diced. 2. Since the method for cutting a wafer of the present invention uses a removing step, before cutting the wafer, the material layer on the dicing path is first moved to a crack or avoidance during the cutting process. The subsequent grains remain intact, and can improve the reliability of the package. In order to make the above and other purposes of the present invention, special, and easy to understand, the following special mentions G, ,, and 偸 points can be explained in more detail as follows. 'Exemplifications' are described in detail with the attached drawings. [Embodiment]-components formed on a wafer, and these components are being produced. In the process of: two (: material layer is formed on the cutting path. Therefore, in the second material # layer will also lose on the same, easy for each material; 12416% 796twf.doc / c and 40% tortoise on the knife path Cracks or fissures are special problems. These damages are most severe at the grain corners (c. Bribes), that is, at the intersection of the cutting track, and a stress concentration area is formed here. The invention is the pre-process of the wafer before the wafer is cut. The previous process is The use-removal step is to remove the material layer on the scribe line corresponding to the corners on the wafer. In this way, the stress in the area can be reduced, and the wafer at the edge of the wafer is 'reduced' during the cutting process. From Qide, the sun grain can be kept intact and the component can be raised by 2 degrees. The following scales-the preferred embodiment illustrate the cutting method of the present invention. Fig. 1 is a schematic diagram of a wafer showing a preferred embodiment of the present invention. The top view is shown in FIG. T. First, please refer to FIG. I. The method for cutting a wafer of the present invention is to provide = wafer 100. This wafer 100 has a plurality of cutting lanes 11 and is defined by cutting 110. The plurality of dies 120, wherein the scribe lines 110 include parallel scribe lines 110a parallel to each other and a plurality of vertical scribe lines U0b perpendicular to each other. Moreover, at least one material is covered on the wafer 100. In a preferred embodiment, the wafer 100 is covered with a dielectric layer (not shown) and a conductive layer (not shown), wherein the material of the dielectric layer is, for example, a low dielectric constant. (Κ) dielectric material or other dielectric materials, and the material of the conductive layer is, for example, Copper or other conductive materials. Next, the wafer 100 is removed to remove the material layer corresponding to the corner 120 of each die located on the scribe line 110. Here, the so-called grain 120 side The corner corresponding to the material layer on the cutting path 110 refers to the material layer at the appropriate width from the die on the cutting J path 1110 (see arrow number 130 shown in Figure 1241645 13796twf.doc / c). Laser, + Among them, this removal step is performed, for example, by saying an # 例 例 'After the removal step, the surface of the Japanese yen is exposed to avoid the situation, saying that there is a circle with different material properties.' The wafer is covered with re-questions. The anti-shake layer causes the conventional cracks or cracks to be m-days ": In a preferred embodiment, this removal step is in addition to removing: the corresponding corners of the grain edges It is located outside of the cutting lane where the no. Indicates, and it also includes removing the material at the cutting lane ^ =: to form a groove pattern = at the intersection of _ 道 UG. Among them, Fig. 2 ^ shows a partial region of p ^ (an enlarged view of the area label _ in Fig. 1), and ^: ,, 'Fig. 2A is a schematic cross-sectional view obtained from the I-I section line. The groove pattern ⑺ is, for example, A cross shape (as shown in g | 2A), a cross shape with rounded corners (as advantaged by 2B, a circle (as shown in FIG. 2C)), and an oval shape (as shown in figure ^ Xibian 幵 y). The polygon is, for example, a quadrangle or a octagon of the graph. Since the material layer at the intersection of the cutting line 110 has been removed in the removal step, the material layer in the stress concentration area is removed. Therefore, in the subsequent During wafer dicing, problems such as cracks or cracks at the corners of the die can be avoided. Τ In another preferred embodiment, in addition to removing the material layer at the intersection of the scribe lines 110, The method further includes removing the material layer corresponding to the side of each die 120 located on the scribe line 110, and forming a plurality of trenches 104 around the dies 120 on the scribe line 110. 1241645 13796twf.doc / c Taking the groove pattern 102 as a cross-shaped pattern (as shown in FIG. 2A), the groove pattern 102 is directly near the die 12 on the cutting track 1U. The position of the side of G is formed as shown in FIG .: Most of the trenches 104 are shown, and FIG. 5 is a schematic cross-sectional view taken from M and section of FIG. 4A. The groove pattern 102 is a corner arc shape (such as ® 2B (Shown) as an example, it can be surrounded on the cutting path 11B by most of the trenches around each die ι: the groove pattern 102 is other patterns (as shown in FIG. 2C ~ 2F = Bu ' A plurality of trenches are formed around each of the crystal grains 120 (not shown: the crystal grains cut out are complete crystal grains). After the grains are removed by the present invention due to the present invention, the corners of the crystal grains are removed at the corners of the corners. The material layer located on the cutting path 110, so, except for the stress concentration area on the side of "I", a cut near the side of the crystal grain = 軎 ⑷10 will cause damage. U0 is not easy. In addition, in a preferred embodiment, the above-mentioned step of removing the gully on the cutting path 110 further includes the case 102 in a cross-shaped pattern (the material layer of the Japanese branch. In the groove diagram, 1 as shown in Figure 2A) is For example, Gan Ying, M. The material layer between m and m between mitch 104 removes the cutting intention. In addition, FIG. 7 is a cross section from m-nr === (such as
圖2BW為例，其可於_道sit十 不之圖形。而凹槽圖案102為豆他圖宏夕成如圖犯所 所示）同樣也可以去除 '、、、，、θ案者（如圖2C〜2F 材料層，而於切割道u10上位於涛渠104之間 可以有效避免在上形成其他圖形⑷f示），=Fig. 2BW is an example, which can be shown in the figure of _sit. The groove pattern 102 is shown in the figure as shown in Figure 1. The same can also be removed from the case of ',,,,, and θ (as shown in Figures 2C ~ 2F). 104 can effectively avoid the formation of other graphics on the above (ff)), =
切割晶圓時’切割道遭受損C 1241645 13796twf.doc/c 社力-較佳貫施例中’請參照圖8，移除步驟除了去 除晶圓上各個晶粒邊角處所對應之位於切割道 (前頭標號m所指處)之外，更包括去除各晶粒丨丄 所對應之位於切割道110上的材料層，以於切割道⑽上 形成圍繞各晶粒120周圍之多數條溝渠。 此外，在又一較佳實施例中，移除步驟 邊上所對應之位於切割道則上的材料層 ^括去除切割道110上位於溝渠觸之間 成如圖9所示之圖形。 十曰以幵 y 然後’於㈣㈣之後，對晶圓進 :割的進行例如是利用鑽石刀、雷射或是其他 來進H坪細的說明是’其利用鑽石刀或是雷射沿圓 ^切別運進行切割，進而將晶圓分成多個晶粒， 圓切割的整個流程。特別是，由於此時切 兀成日日 中區，甚至是晶粒邊上所對應之材料岸° k上之應力集 行晶圓切割時，所切割下來的晶粒可因此在進 綜上所述，本發明至少具有下面的優點凡 、1.本發明於切割晶圓之前，對晶圓進二 避免因晶圓上所覆蓋之材料層的材料性質所=王’以 在進行晶圓的切割時，對切割道造成龜裂或裂痕3 2.本發明於切割晶圓之前，對晶 ㈣_的材_二S3得 1241645 13796twf.doc/cWhen dicing the wafer, 'the dicing path is damaged C 1241645 13796twf.doc / c Social Force-In the preferred embodiment', please refer to FIG. 8. The removal step is in addition to removing the corresponding corners of each die on the wafer. (Indicated by the former reference number m), the method further includes removing a material layer corresponding to each die 丄 on the cutting track 110 to form a plurality of trenches around the die 120 on the cutting track ⑽. In addition, in yet another preferred embodiment, the material layer on the cutting edge corresponding to the removal step includes removing the material on the cutting edge 110 between the trench contacts and forming a pattern as shown in FIG. 9. On the tenth, "幵 y" and "after", the wafer advancement: the cutting is performed using a diamond knife, laser, or other methods to enter the H flat. The description is' It uses a diamond knife or laser along the circle ^ The cutting process is not performed, and the wafer is divided into multiple dies, and the entire process of circular cutting is performed. In particular, at this time, when the wafer is cut in the middle of the day, the middle of the day, and even the material on the edge of the grain corresponding to the stress k °, the cut grain can be used in the comprehensive research. As mentioned, the present invention has at least the following advantages. 1. The present invention, before cutting the wafer, further advances the wafer to avoid the dicing of the wafer due to the material properties of the material layer covered on the wafer. Cracks or fissures on the dicing track at the time 3 2. The present invention, before dicing the wafer, is used for the material _ 2 S3 of the wafer 124 1241645 13796twf.doc / c
晶粒遭角處’在切割晶圓時不會造成龜裂或裂 而影響到元件的功能與使用壽命。 、、W 3.本發明之移除步較包括絲各晶㈣ 切割道的材料層，以於切割道上形成圍繞各晶:夕 數條雜。因此於切割晶圓時，可使晶粒的邊角處 I為兀整之側壁’而不會產生龜裂或裂痕等問題，且 得切割出晶粒較為完整’以大幅提昇封裝體之可靠度。 雖然本發明已以較佳實施例揭露如上，然^ 以限定本發明’任何熟習此技藝者，在不獅本發明之梦 當可作些許之更動與调飾，因此本發心 4粑圍§視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1所緣示為本發明一實施例的晶圓之上視示意圖。 、音至圖π所㈣為本發明—較佳實施例之切巧 運父會處形成凹槽圖案之示意圖。 圖3所繪示為本發明一較佳實施例之圖2a由η, 面線所得之剖面示意圖。 σ 、、固Α與圖4Β所緣示為本發明一較佳實施例之切 遏上形成凹槽圖案與溝渠之示意圖。 σ 圖5所繪示為本發明一較佳實施例之圖4Α由π 剖面線所得之剖面示意圖。 。Α與圖6Β所緣示為本發明一較佳實施例之於切 °1、上移除材料層之示意圖。 圖7所緣示為本發明一較佳實施例之圖6Α由ΐπ_ΙΙΓ 12 1241645 13796twf.doc/c 剖面線所得之剖面示意圖。 圖8所繪示為本發明另一較佳實施例之於切割道上 形成圍繞各晶粒周圍之溝渠之示意圖。 圖9所繪示為本發明另一較佳實施例之於切割道上 移除各溝渠間之材料層之示意圖。 【主要元件符號說明】 100 ·晶圓 102 ·•凹槽圖案 104、106 ·•溝渠 110 :切割道 110a :平行切割道 110b :垂直切割道 120 :晶粒 130 :箭頭標號 140 :局部放大區域The corner of the die will not cause cracks or cracks when dicing the wafer, which will affect the function and service life of the device. , W 3. The removing step of the present invention is compared with the material layer including the cutting lines of each crystal wire, so as to form a plurality of impurities around the crystals on the cutting line. Therefore, when the wafer is cut, the corners of the die can be made to be side walls without cracks or cracks, and the die can be cut more completely to greatly improve the reliability of the package . Although the present invention has been disclosed in the preferred embodiment as above, ^ to limit the present invention 'Any person skilled in the art can make some changes and adjustments in the dream of the present invention, so I ’ll take it to heart § Subject to the scope of the attached patent application. [Brief description of the drawings] FIG. 1 is a schematic top view of a wafer according to an embodiment of the present invention. Figures π and π are schematic diagrams of how the present invention—a preferred embodiment—coincidentally forms a groove pattern at the meeting of the father. FIG. 3 is a schematic cross-sectional view of FIG. 2a obtained from η, a surface line of a preferred embodiment of the present invention. The edges σ,, A, and FIG. 4B are schematic diagrams of forming groove patterns and trenches on the cut of a preferred embodiment of the present invention. σ FIG. 5 is a schematic cross-sectional view of FIG. 4A obtained from the π section line of a preferred embodiment of the present invention. . A and FIG. 6B are schematic diagrams of a preferred embodiment of the present invention for removing material layers on the cutting surface 1 and the cutting surface 1. FIG. 7 is a schematic cross-sectional view of FIG. 6A obtained from the section line ΐπ_ΙΙΓ 12 1241645 13796twf.doc / c according to a preferred embodiment of the present invention. FIG. 8 is a schematic diagram of forming trenches around the dies on the scribe line according to another preferred embodiment of the present invention. FIG. 9 is a schematic diagram of removing a material layer between trenches on a cutting track according to another preferred embodiment of the present invention. [Description of main component symbols] 100 · Wafer 102 ·· Groove pattern 104, 106 ·· Ditch 110: Cutting line 110a: Parallel cutting line 110b: Vertical cutting line 120: Die 130: Arrow number 140: Partially enlarged area