TW360964B - Process for flip-chip mounting - Google Patents

Process for flip-chip mounting

Info

Publication number
TW360964B
TW360964B TW086111173A TW86111173A TW360964B TW 360964 B TW360964 B TW 360964B TW 086111173 A TW086111173 A TW 086111173A TW 86111173 A TW86111173 A TW 86111173A TW 360964 B TW360964 B TW 360964B
Authority
TW
Taiwan
Prior art keywords
substrate
ceramics
flip chip
chip assembly
flip
Prior art date
Application number
TW086111173A
Other languages
Chinese (zh)
Inventor
Ralf Haug
Original Assignee
Bosch Gmbh Robert
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert filed Critical Bosch Gmbh Robert
Application granted granted Critical
Publication of TW360964B publication Critical patent/TW360964B/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49883—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
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    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
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    • H01L2924/078—Adhesive characteristics other than chemical
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    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0425—Solder powder or solder coated metal powder

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

Disclosed is a method enabling bump-free flip chip assembly of ICs on a substrate using anisotropically conductive adhesives (ACAs). The adhesive contains solder particles causing metallurgic bonding between IC and substrate i.e. selective diffusion to bonding pads. In this way finer contact spacings can be processed with the same amount of filler material i.e. greater miniaturization can be obtained and larger bumps between the IC and the substrate can be smoothed out. The method is particularly suited to flip chip assembly on ceramics, glass-ceramics or multi-chip modules and flexible base materials.
TW086111173A 1996-09-30 1997-08-05 Process for flip-chip mounting TW360964B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE1996140192 DE19640192A1 (en) 1996-09-30 1996-09-30 Process for flip chip assembly

Publications (1)

Publication Number Publication Date
TW360964B true TW360964B (en) 1999-06-11

Family

ID=7807362

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086111173A TW360964B (en) 1996-09-30 1997-08-05 Process for flip-chip mounting

Country Status (3)

Country Link
DE (1) DE19640192A1 (en)
TW (1) TW360964B (en)
WO (1) WO1998014995A1 (en)

Cited By (1)

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Publication number Priority date Publication date Assignee Title
CN105405825A (en) * 2015-12-09 2016-03-16 南通富士通微电子股份有限公司 Chip on film package structure

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DE19839760A1 (en) 1998-09-01 2000-03-02 Bosch Gmbh Robert Method for connecting electronic components to a carrier substrate and method for checking such a connection
WO2001003175A1 (en) * 1999-06-30 2001-01-11 Siemens Dematic Ag Electrical-mechanical connection between electronic circuit systems and substrates and method for the production thereof
US6706219B2 (en) * 1999-09-17 2004-03-16 Honeywell International Inc. Interface materials and methods of production and use thereof
JP2002289768A (en) * 2000-07-17 2002-10-04 Rohm Co Ltd Semiconductor device and its manufacturing method
DE10059813A1 (en) * 2000-12-01 2002-06-13 Hahn Schickard Ges Pressure measurement, especially differential pressure measurement between two fluids, in which gluing of support and pressure sensor is used
DE10064411A1 (en) * 2000-12-21 2002-06-27 Giesecke & Devrient Gmbh Electrically conductive connection between a chip and a coupling element as well as security element, security paper and document of value with such a connection
DE10232636A1 (en) * 2002-07-18 2004-02-12 Delo Industrieklebstoffe Gmbh & Co. Kg Method and adhesive for flip-chip contacting
DE10249855B4 (en) * 2002-10-25 2005-12-15 eupec Europäische Gesellschaft für Leistungshalbleiter mbH Material for supplying current to semiconductor devices and method for producing such
DE10336171B3 (en) * 2003-08-07 2005-02-10 Technische Universität Braunschweig Carolo-Wilhelmina Multi-chip circuit module and method of making this
US8709293B2 (en) 2004-12-17 2014-04-29 Panasonic Corporation Flip-chip mounting resin composition and bump forming resin composition
CN100495676C (en) * 2005-03-29 2009-06-03 松下电器产业株式会社 Flip chip mounting method and method for connecting substrates
EP1865549A4 (en) * 2005-03-29 2012-07-11 Panasonic Corp Flip chip mounting method and bump forming method
KR101175482B1 (en) 2005-04-06 2012-08-20 파나소닉 주식회사 flip chip mounting method and bump forming method
DE102005047106B4 (en) 2005-09-30 2009-07-23 Infineon Technologies Ag Power semiconductor module and method of manufacture
JP4591330B2 (en) * 2005-11-25 2010-12-01 パナソニック株式会社 Electronic component connection structure and electronic component connection method

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US4293451A (en) * 1978-06-08 1981-10-06 Bernd Ross Screenable contact structure and method for semiconductor devices
US4487638A (en) * 1982-11-24 1984-12-11 Burroughs Corporation Semiconductor die-attach technique and composition therefor
EP0265077A3 (en) * 1986-09-25 1989-03-08 Sheldahl, Inc. An anisotropic adhesive for bonding electrical components
US5001542A (en) * 1988-12-05 1991-03-19 Hitachi Chemical Company Composition for circuit connection, method for connection using the same, and connected structure of semiconductor chips
TW340132B (en) * 1994-10-20 1998-09-11 Ibm Structure for use as an electrical interconnection means and process for preparing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105405825A (en) * 2015-12-09 2016-03-16 南通富士通微电子股份有限公司 Chip on film package structure

Also Published As

Publication number Publication date
WO1998014995A1 (en) 1998-04-09
DE19640192A1 (en) 1998-04-02

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