TW200409250A - Substrate with plated metal layer over pads thereon, and method for fabricating the same - Google Patents

Abstract

A substrate with a plated metal layer over pads thereon, and a method for fabricating the substrate are proposed. The substrate is formed with a plurality of pads on at least a surface thereof, and a conductive film is formed on the surface of the substrate. A photoresist is applied over the conductive film and formed with a plurality of through holes for exposing portions of the conductive film corresponding in position to the pads on the substrate. Then, the exposed portions of the conductive film are removed to expose the pads on the substrate. After a metal layer such as Ni/Au is deposited on the pads by a plating method, the photoresist and the conductive film underneath the photoresist are removed. Finally, a solder mask is applied on the surface of the substrate and formed with a plurality of openings for exposing the pads with the plated metal layer thereon; this can eliminate drawbacks induced by conventional chemical Ni/Au deposition, and effectively increase routing area of the substrate without having to form plating traces on the substrate.

Description

200409250 V. Description of the invention (1) [Field of the invention] The present invention relates to a metal layer and a manufacturing method thereof. The nickel / gold is electroplated on the surface of the electrical connection. [Prior technology] Due to the trend of the industrialization of electronics, semiconductors are used for The conductive pad composed of semiconductor material provides the electrical coupling of the remaining conductive elements as the exposed surface of the transmission electrical connection, and also the oxidation of the pad body. Substrate (Flip-chip bump fresh pad (Bump The electrical connection pad can also be a ball pad (Bal 1 pad), a nickel / gold metal layer, the connection pad (usually gold to improve the quality of the bumps, pre-soldering solder. In the art, there are electrical connection of the substrate, electroplating and metallization. It is a method of making layered connections and pads, so as to provide rapid improvement with good related technology. The n + button is accompanied by the smallness of electronic products. Η: It also faces many key points in the manufacturing process. .: The surface of the substrate is formed with many electrical connections such as copper ^ ^ eight force to extend the electrical connection: No. or power supply, and usually a nickel / gold (Ni / Au) metal layer is connected to the electrical connection. With effective ° gold wires, bumps or solder balls and the chip or circuit board: to avoid the electrical connection of the electrical connection pad can be caused by the environmental influence t Λ7, such as a semiconductor package substrate (chip package substrate) and the chip Electrical consumables, pads, or pre-solder pads; for example, if the package substrate and the circuit board are electrically coupled with each other, the welding essence is formed by exposing the surface of the electrical connection pad body to provide a covering The electrical properties of the nickel / gold metal layer are copper) and are not easily affected by the external environment. It is oxidized by sound, and is electrically connected to the electrical connection pad by soldering or solder balls. The nickel / gold metal layer is formed on the surface of the electrical connection pad.

ZUU4UV2 ^ U 5. The method of invention description (2) includes the following steps: learn nickel / gold switch "b-learning / gold process and electricity ore record / gold process etc." Problems such as black patch (B1ack pad) and lack of fresh spot strength. The problem of the jump plating problem is caused by the following conditions: When the slot is reduced, even if it is all elephants, there will still be a black problem when the plating ability is not easy. The phenomenon of exposed copper appeared; and the nickel surface was subjected to excessive immersion of the nickel surface. When the nickel surface was replaced with gold, its product was “flying reaction” and irregularly sinking gold atoms with a large volume was actuated ^ Sparse and porous, As a result, the bottom nickel continues to pass through the nickel of the chemical battery: to: The old and the underside of the gold surface produce unstirred; ίΚΓΓί becomes the later gold wire, solder bumps *, pre-soldering images, which creates a question of reliability. The peeling cannot be electrically coupled to each other. In order to avoid the formation of the nickel / gold metal layer on the surface of the chemical nickel / gold 塾, the two types are used for electrical connection. As shown in Figure 1, the conventional nickel bond m uses electricity. In the process of mining nickel / gold, the 塾 10 package substrate is additionally arranged on the packaging substrate. ^^^ # is formed with most of the electrical properties to pass through the electricity wire coffee / gold: ΐΓ does not have to be laid with a lot of electricity in advance = and at high frequencies In use, it is caused by noise due to the antenna effect k of the extra plated wire 1. In order to solve the above-mentioned problems of electroplating nickel / gold process,

Page 9 200409250 V. Description of the invention (3) The method of GPP (Gold pattern plating), as shown in Figures 2A to 2D, is already familiar to the general industry. In this process, a conductive layer 21 (as shown in FIG. 2A) is formed on each of the upper and lower surfaces of a substrate 2 for carrying a semiconductor wafer. A plurality of via holes (PTH) or eye holes ( Blind via) (not shown); then, a photoresist layer (/ hot〇resist) 22 is covered on the conductive layer 21 of the substrate outside the area where a line is to be formed, and the conductive layer 21 is used as a current conduction path. 'The electrical layer 21 is not covered by the photoresist layer 22, the electric ore-nickel / gold metal layer 23 (as shown in FIG. 2B); after that, the photoresist layer 22 is removed, leaving only the recording, / To the subordinate layer 23 (as shown in FIG. 2C); and then use the nickel / gold metal layer 23 = as a masking resistance layer 'to pattern the conductive layer 2 through etching to define the circuit layer 2 4, The exposed surface of the circuit layer 24 is electroplated with a metal / gold metal layer 23 (as shown in FIG. 2D). f Although a conventional technique does not need to separately arrange electroplated wires, the surface of the substrate (including the electrical connection pads and all conductive lines) is covered with ^ ^ / gold metal layer, and the nickel / gold metal layer raw material It is quite expensive. When the top surface is covered with 88 "layers of conductive lines, the entire solder resist layer is counted. County 5, the table is a layer, and then the substrate is covered and strengthened. Differences, but fail to reach stability, and lack of reliability. The chemical process and production are borrowed from a simple process and cost less, similar to ... Reliability issues, or Xi Yu has become a goal ^ τ Ding Sheng added plating wires and cost waste problems, has become a month, "problems to be solved urgently," shouted,

200409250

[Summary of the Invention] In view of the shortcomings of the conventional technology described above, the main points of the present invention are as follows: 1. The electroplated metal layer of the electrical connection pad of the semiconductor package substrate and a method for making the same, so that the exposed surface of the electrical connection pad is electroplated. Second, the order, and the clothing 4 are layers that help gold wires, solder bumps, or solder balls. ° Two-gold coupling, this metal layer makes the electrical connection pad difficult to cause: J ::: 的 电 致 此The electrical connection pad body is oxidized. Another aspect of the present invention is to provide a method for making a pad electroplated metal layer, and a jump plating method produced by electrically connecting the substrates of the coating substrate, which can avoid the conventional chemical nickel / gold process. Invented to effectively improve the reliability of the captive structure.

Production of pad metal plating layer 2: for two types of semiconductor packaging substrates to be electrically connected with electroplated wires, it is necessary to reduce the amount of wiring due to the laying of electricity on the surface of the packaging substrate. The wiring area and the noise interference problem of the present invention. The production of the electroplated metal layer of the pad is to provide a method of ^^^ on the entire layer of the electrical connection board of the semiconductor package substrate, which can avoid the need to form a nickel / gold metal layer on the packaging base connection pad in the conventional manufacturing process. And only at the cost of the electrical gold. In addition, the table / gold metal layer is used to effectively reduce the electroplated nickel / to achieve the power supply of the metal chain and other connection pads. The semiconductor packaging substrate of the present invention has a plurality of electrical μ, t pulls: it must be tied to the packaging substrate. At least one surface is formed on the surface of the package substrate. The surface of the packaging substrate is covered with a plurality of electrical connection pads, which are plated with a metal layer to reveal the electrician's ancient A-layer solder resist layer. The solder resist layer has electrical properties of a plurality of openings with metal layers. Connections, at least-electrically connected

Page 11 200409250 V. Description of the invention (5) '-The pad is not connected with any key wire. The manufacturing method of the electrical connection pad electrical layer metal layer of the semiconductor packaging substrate of the present invention includes the following steps: a. First, provide a semiconductor packaging substrate with at least one surface having a plurality of electrical connection pads, and cover the surface of the substrate with a Electrically conductive film. For example, a photoresist layer is formed on the conductive film, and the photoresist layer is formed with a plurality of openings to expose the conductive film on the surface of the electrical connection pad. Car connection: 除 Remove the conductive film not covered by the photoresist layer so that the electrical connection pad can be exposed in the opening of the photoresist layer. ^ The package substrate is electroplated, so that the outer key of the electrical connection pad has a metal layer such as nickel / gold to be formed. After the surface, the photoresist layer and the conductive film it covers are removed. Then, a plurality of openings are formed on the surface of the package substrate to reveal that f = has been completed, and the solder resist layer has an electrical connection pad that is a metal layer of electrical money. The manufacturing method is τr I f. The electrical connection pad of the clothing substrate is electroplated with a metal layer. It can not only provide the same metal with nickel / gold; to the right; ^ the exposed surface of the pad is completely covered with solder balls. Wait for the bathroom to dry κ i / to effectively help the people of gold wire, solder bumps, and Japanese films or circuit boards ^ environmental impact caused this electrical connection pad: two at the same time it is not easy to be nickel / Jump plate / emulsification generated during the gold process; and avoid the reliability of the chemical structure. At the same time, tack the tantalum, net, and net issues to effectively improve the layout of the electrical and mining conductors. II = large force; when sealed, there is no / on the surface of the package substrate and reduce the effective wiring area due to the layout of the electroplated conductors and soil plates. Health's interference problem;

Page 12 200409250 V. Description of the invention (6) = For the nickel / gold production process, the entire layer of the package substrate must be covered with a metal layer containing nickel / gold, which is called the circuit layer. u Effectively reduce the plating nickel / gold composition. The following examples are given to further illustrate the present invention, but these examples are not limited by these examples. Especially + — this volume month The clock metal layer can be widely used in a 41; board-to-board connection 塾 flip-chip package substrate to clarify its implementation situation, heart;: C Ming Although the scope of application, it will be described first. "The dagger should not be used to limit the present invention. [Embodiment] Please refer to FIG. 3, which is a schematic cross-sectional view of a semiconductor package substrate to which the present invention is electrically connected and a plated metal layer is applied. The package substrate 3 is a flip-chip ball grid Array (FHp 讣.

Kid array) package substrate, which includes a plurality of insulating layers 3 and 3, and a layer of circuit layers 32 stacked alternately, a through hole (Via) 33 penetrating the insulating layers to electrically connect the circuit layer, and covering and protecting The solder resist layer 38 on the surface of the substrate 3. ^ The insulating layer 3 1 of the substrate 3 can be composed of organic materials, fiber-reinf or organic materials, such as Epoxy resin polyethylene Polimide, Bismalimide triazine-based resin, Cyanate ester, etc. The circuit layer 32 can be produced by forming a metal conductive layer, such as a copper layer, on the insulating layer 31, and then using an etching technique to form a circuit patterned circuit layer 32. And in the package substrate 3

Page 13 200409250 V. Description of the invention (7) The line π on the younger surface 3a and the first surface 31) is provided with 屮 丄 and the sexual connection pad 3 5. For example, in the third and q 7 ^ there is a plurality of electric one Bumps or bumps are provided to provide at least ^ = lp) semiconductor wafers 40 can be electrically connected to the substrate by forming a majority of them (F1 U, (older bump) 39a) The first surface 3 lets (bTi? 'In: the electric connection pads 35 on the second surface of the Haidi provide-solder ball pads 1 Luo Yue 糸 2 to plant a majority of solder balls (Solder bal l) 39b to k仏 μ Where the semiconductor wafer 40 is to be externally connected to the clothing, such as soldering to the circuit board. The material of the == circuit layer 32 and the electrical connection pad 35 is generally metal copper, and is楗 For the electrical connection pads 35 on the first surface 3a and the second surface 3b of the substrate, to prevent oxidation from being affected by the external environment, or to effectively bond with the solder block 39: or the solder ball 39b, the The electrical connection = the surface is plated with a metal layer 35. The Buddha is a metal barrier layer. The general metal barrier 2 layer includes a nickel adhesion layer and is formed on the electrical connection. A protective layer of gold on the pad 35. However, the barrier layer can also be deposited by methods such as electroplating, eleCtroless plating, or physical vapor deposition (physicai vapor deP0sition). , Nickel, palladium, silver, tin, nickel / rod, chromium / titanium, palladium / gold or nickel / rod / gold, etc. Then a solder resist layer 38 can be formed to cover the surface of the substrate 3 and resist The solder layer is formed with a plurality of openings 38a, so that the electrical connection pads are exposed in the openings 38a of the solder resist layer, and at least one of the electrical connection pads 35 is not in communication with any electroplated wire. See 4A to 4H The figure shows the semiconductor package substrate of the present invention.

Page 14 V. Description of the invention (8) Method for manufacturing the electroplated metal layer of the connection pad As shown in FIG. In addition to the flip chip as shown in FIG. 3, the substrate 3, the Wlre bonding substrate (type substrate) can also be a wire-type front-end process, such as most vias, What is needed to complete (not shown) is formed in it, the package base ^ = holes, (B 11 nci Vi a) and other circuit patterned circuit layers 3 2, and a connection pad 35 has been formed on the surface, of course, It may also include g including a plurality of electrical surfaces. There are many green circuit patterning technologies: 2 boards and 3 cores, which are not the technical features of this case, so I will not repeat them here. The clothes are as shown in FIG. 4B. A conductive film is coated on the surface of the sealing substrate 3. The V electric film 36 is mainly used for electroplating metal & conductive metal, gold or stacked metal layers as described later. The structure can be formed of a metal selected from the group consisting of copper, tin, nickel, chromium, titanium, copper-chromium alloy, or tin alloy. However, according to practical experience, the conductive film 36 is preferably composed of copper or palladium particles (especially electroless plating), and can be formed by physical vapor deposition (PVD), chemical vapor deposition (CVD), electroless plating, or Chemical precipitation, such as sputtering, evacuation, arc vapor deposition, ion beam sputtering: ion beam sputtering, laser ablation deposition (laser abUti (On deposition), plasma-assisted chemical vapor deposition, or organic metal chemical vapor deposition, are formed on the surface of the package substrate. As shown in FIG. 4C, a photoresist layer is formed on the surface of the package substrate 3 covered with the conductive film 36 by printing, spin coating, or bonding.

200409250 V. Description of the invention (9) (Phοt〇resist) 37, such as dry film or liquid photoresist, etc., and make the photoresist layer 37 to form a plurality of openings 3 7a, thereby exposing the electrical connection pad 3 5 The surface of the conductive film 36a. As shown in FIG. 4D, the conductive film 36a 'which is not covered by the photoresist layer 37 is removed by a time-lapse or laser technique, that is, the photoresist layer opening 37a is removed to cover the electrical connection. The conductive film 3 6 a of the pad 3 5 reveals the electrical connection pad 35 °. When the package is gold, nickel / palladium / gold, it can be used to connect the other gold surfaces of the present invention with this conductivity first, such as pad 3 5 It is the light that completes the desired surface.

As shown in FIG. 4E, a metal plating step is performed by electroplating (ElectrplatingW substrate 3). The electroplating metal can be palladium, silver, tin, nickel / palladium, chromium / titanium, nickel / gold, palladium / gold. Or nickel, etc. By virtue of the conductive properties of the conductive film 36, the electroplating is a current conduction path, preferably a nickel / gold metal layer, which is plated with a layer of nickel and then plated with a layer of gold and nickel. / Gold metal warp: The film 36 can be electroplated on the exposed surface of each electrical connection, so that the surface of the emperor pad 35 is covered with an electroplated metal layer 35c. Of course: the choice of metal plating material can only be as described above. For example, nickel, gold, or sweet ^ i, such as the direct exposure of gold plating on the electrical connection pad 35, is replaced by M single ^ g, which should all fall within the scope of the present invention.

As shown in the figure, after completing the electrical nickel / gold layer 3 5 c on the exposed surface of the electrical connection, the photoresist layer 37 is removed first, and then the conductive film 36 covered by the previous resist layer 37 is removed. As shown in FIG. 4G, an electroplated metal layer 35c is formed next to cover the electrical connection pad 35. As shown in FIG. 4H, a surface of the package substrate 3 can be covered with a

200409250 V. Description of the invention (ίο) ^ ^ Ref #dry layer (S ο 1 dermask) 3 8 'For example, green paint, to protect the encapsulation board 3 from external environmental pollution, the solder resist layer 3 8 and form There are a plurality of openings 3 8 a, so that the electrical connection pads 3 5 of the completed electroplated metal layer 3 5 c can be exposed in the openings 38 a of the solder resist layer. Among them, the hole diameter of the solder resist openings 388 is greater than Or smaller than the size of the electrical connection pad, and the electrical connection pad covered with a plated metal layer can be used as an interface for electrical connection with a chip or a circuit board. This is A. This method of electroplating metal pads for electrical connection pads of semiconductor package substrates of the present invention can not only provide the electrical connection of package substrates, but also provide significant benefits. The ΪΙίΓΐϊί 'can also avoid problems such as jump plating and black pads due to external environmental influences ... effectively improve; ΐ 4 structure V; or: electroplated nickel / gold metal process on the surface of the electrical connection pad, The conductive film is used as a current conduction path to seal the electrical connection pads of the Zhuang A. The helmet is a wire on the 44 Zr rr through the package substrate, so that a large area of the board is additionally provided with a conductive conductive wire wiring area, which reduces the Burned on the layout layer—Shi Yun's connection to the day guard 'must be defeated on the package substrate ^ all ...- Including the recording / gold metal layer to effectively reduce:; = road method installed f board electrical connection 塾 electroplating Prefabricated solder joints and pre-seconds made of metal; = Brightness: = 1The wire pads and convex pads in the substrate indicate that the actual ± φ is, 4 is the figure just before one electrical connection ... the number of electrical connection pads, as Current during power mining

200409250 V. Description of the invention (11) The conductive path and the photoresist layer for the mask are designed and distributed on the surface of the substrate according to the actual manufacturing process, and the process can be implemented on one or both sides of the substrate. The specific embodiments described above are only used to illustrate the features and effects of the present invention, rather than to limit the implementable scope of the present invention. Any application of the present invention without departing from the spirit and technical scope of the present invention is disclosed. Equivalent changes and modifications made by the disclosure of the invention should still be covered by the scope of patent application described below.

Page 18, 200409250 Simple description of the drawings [Simplified illustration of the drawings] Figure 1 is a schematic cross-sectional view of the conventional electrical connection pads of the package substrate plated with a nickel / gold metal layer; Figures 2A to 2D are another conventional method. A schematic cross-sectional view of the electroplating nickel / gold process of the electrical connection pads of the package substrate; FIG. 3 is a schematic cross-sectional view of the electroplated metal layer of the electrical connection pads of the semiconductor package substrate of the present invention; and FIGS. 4A to 4H are the semiconductor packages of the present invention [Cross-section of element symbol description] method of manufacturing method of electroplated metal layer of substrate electrical connection pad is not intended. 1 Package substrate 10 Electrical connection pads 11 Plating wires 12 Nickel / gold metal layer 2 Substrate 21 Conductive layer 22 Photoresist layer 23 Nickel / gold metal layer 24 Circuit layer 3 Package substrate 3 a First surface 3b Second surface 31 Insulating layer 32 Circuit layer 33 Through hole 35 Electrical connection pad 35c Plating metal layer 36 Conductive film 3 6a Conductive film to be removed 37 Photoresist layer 37a Opening hole 38 Rejection layer 3 8a Opening hole 3 9s Solder bump 39b Fresh ball 40 Semiconductor Chip

Page 19

Claims (1)

200409250 VI. Application Patent Scope 1 · A semiconductor packaging method, which provides a substrate step. The removal of the pads in the plurality of pads can obviously remove the plating on the surface. For example, apply for a metallized package. For example, a layered package substrate is applied for a metal plating layer. Such as applying for special metal plating 塾. If the application process includes at least one conductive film hole of the substrate to display the photoresistance range of the exposed base metal layer, the production range of the profit range, the production range of the profit range, and the substrate electrical properties. The production side of the electroplated metal layer of the connection pad is covered with a conductive film on a surface having a plurality of seals of the electrical connection pads; a light-emitting layer is formed, and the photoresist layer forms a conductive film on the surface of the connection pad; The conductive film covered by the resistance layer makes the opening of the electrical photoresist layer; the plate is electroplated so that the electrical connection pad is exposed, and the conductive film covered by it. Method for electrically connecting semiconductor package substrates, wherein the package substrate is a chip-on-chip electrical connection pad of the semiconductor package substrate item 1, and the package substrate is a wire-type item 1. The electrical connection pads of the semiconductor package substrate are electrically connected, wherein the electrical connection pads may be electrically connected to the semiconductor package substrate by one of the bumps, and the electrical connection pads may be solder balls. Connection of the semiconductor package substrate Page 20, 200409250 VI. Application scope of patent ~~~ -— Method for making mineral metal layer, where 'the electroplated metal layer can be gold, nickel, palladium, silver, tin, nickel / handle, chromium / titanium, nickel / gold , Palladium / Gold and Nickel / I Bar / Gold. For example, the method for manufacturing an electrically forged metal layer of an electrical connection pad of a semiconductor package substrate according to item 1 of the application, wherein the conductive film may be selected from the group consisting of copper, tin, nickel, chromium, titanium, copper-chromium alloy, and tin-alloy. Formed by groups of metals. 8. For example, the method for manufacturing an electrically forged metal layer of an electrical connection pad of a semiconductor package substrate according to the scope of application for patent, wherein the conductive film can be sputtered, electrolessly plated, or physically and chemically deposited. ion). 9. For example, a method for manufacturing a metallization layer of an electrical connection pad of a semiconductor package substrate according to the scope of application for a patent, wherein the photoresist layer may be a dry film. 10. For example, the method of manufacturing the electrical package of a semiconductor package substrate in the scope of the patent application 专利 = metal layer manufacturing method, wherein the photoresist layer can be a liquid photoelectric II type ^ conductor package substrate electrical connection pad plating metal layer manufacturing Method, the steps of which include: a sealing substrate with a plurality of electrical connection pads on a surface of "Xin Yi Yi Wan Ti ^ to"; a substrate is covered with a conductive film on the surface of the substrate; encapsulating a plurality of: Γ electrical film Form a photoresist layer and make the photoresist layer form a plurality of openings to expose the surface of the electrical connection pad. The removal of the photoresist is not caused by the photoresistor: ¥ 'Coupling can be ㊉ θ 复 复 V electrical film So that the electrical connection pad has an opening in the photoresist layer. Η Page 21 200409250 Page 22, 200409250 VI. Application for patent scope 17. For example, for the electroplated metal layer of the electrical connection pad of the semiconductor package substrate No. 15 of the scope of application for the patent, the aperture of the solder resist layer may be smaller than the size of the electrical connection pad. . 18. The electroplated metal layer of the electrical connection pad of the semiconductor package substrate according to item 15 of the scope of patent application, wherein the electrical connection pad may be a bump pad. 19. The electroplated metal layer of the electrical connection pad of the semiconductor package substrate according to item 15 of the scope of patent application, wherein the electrical connection pad may be a solder ball pad. 2 0. Electrical connection pads for semiconductor package substrates such as those in the 15th patent application A key metal layer, wherein the key metal layer may be a group consisting of gold, nickel, 4 bar, silver, tin, nickel / Ιε, complex / titanium, nickel / gold, Ιε / gold, or nickel / Ιε / gold Formed by metal. Page 23