SU752307A1 - Random code generator - Google Patents

Description

The invention relates to computing and can be applied to simulated communication channels and information processing devices. A random one-bit binary code generator is known, which contains a source of wideband noise, a limiter amplifier, key and threshold circuits, a time interval transducer, a pulse extender, and a trigger. This device allows to improve the uniformity of alternation of zeros and ones at the output of generator 1. However, the device does not allow obtaining random codes with specified properties, which significantly limits the use of this generator. The generator of random signals is also known, which contains a generator of a "random sequence of pulses, a delay element, two elements And two inverters. Such a generator allows the formation of direct and inverse pulse streams with a delay of 21. However, it does not ensure the formation of a uniform sequence of zeroes and ones with a small error of 12. Most close to the proposed device, containing a generator of random Poisson pulses, a delay line, two triggers, Two I. Schemes. A delay delay realizes a shift between a Poisson flow fed to one of the inputs of the AND circuit and the flow used for the gated I circuit. This increases stability. devices in the formation of uniformly distributed random numbers, providing high speed with a methodological error of zero 13. The disadvantage of this device is the limited functionality that does not allow obtaining a class of binary normal Fibonacci p-codes. The purpose of the invention is to improve the functionality by simulating normal p-Fibonacci numbers. To achieve this goal, a known random code generator containing

generator of Poisson flow of pulses, the output of which is connected to the first input of the first element I n through the first delay element - to the single input of the first trigger, the output of which is connected to the second input of the first element And the output of which is connected to the single input of the second trigger, zero input of which is combined with zero the input of the first trigger, with the first input of the second element And and is connected to the input

read the generator, and the output of the second trigger is connected to the second input of the second element AND, the second delay element, the third and fourth triggers, the OR element and the third element AND, the first, second and third

the inputs of which are connected respectively to the outputs of the second element And, the third and fourth trigger, the zero input of which is the input of the Stop Generator, and the single input of the fourth trigger is the input

The start of the generator and connected to the first input of the OR element, the second input of which is connected to the output of the third element AND is the generator output, and the output of the OR element is connected to the first input of the second delay element, and to the single input of the third trigger, and the zero input of which is connected to the output the second delay element, the second input of which is connected to the generator readout input.

Fibonacci R-Numbers Cf (c) for a given integer p O are given by the following recurrent relation O for € o

МРСе) - А приё

((In particular, when the formula describes a binary series with weights of 2, 2, ... 2. In normal form, for a given whole, p O in the binary image of any natural number in the binary p-number system, after each unit, at least p should be given , and in the sequence generated by a known device, this condition is not met.

The drawing shows a block diagram of the proposed device.

The circuit consists of a generator 1 of a Poisson pulse stream connected via delay element 2 to the input of trigger 3 and the first input of element 4 I. The output of which is connected to the unit PLM input of the trigger 5. The output of trigger 3 is connected to the second input of element 4 AND 3, the input of element 6 I, the zero input of the trigger 5, and also the read bus 7 is driven to the second input of the delay element 8. The output of the trigger 5 is connected to the second input element 6 And the output of which is connected with the first input of the element 9 I. On the single input of the trigger 10 and the second input of the element 11 OR, the output of which is connected to the first input of the delay element 8 and the zero input of the trigger 12, the output of which connected to the third input of the element 9 I, fed bus 13 Start Bus 14 stop is connected to the zero input of the trigger 10. Bus 15 is the output of the generator.

The generator works as follows.

After the impulse is applied from the pin 13, the trigger trigger 10 is set to one state and a single potential arises at the third input of element 9, which provides permission for the passage of pulses to the output bus 15. In addition, the trigger pulse is fed to the input of the OR element 11, which sets the trigger 12 and the D-flip-flops entering the delay element 8, to the zero state. The read signal from bus 7, arriving with a period T, sets in trigger one state 3, which opens element 4 I. In position O, trigger 3 is set from the output of delay element 2. If, for a random gating time, one or more pulses are output from the generator 1 output to the input of element 4A, a trigger G is set in trigger 5, which is read by element 6 AND by a readout signal. With the same signal, trigger 5 is set to O. In case element 4 does not work, the readout signal does not pass to the output, which corresponds to the appearance of O. Since O the output of the trigger 12 is set to O, then the output of the element 9 is AND, and accordingly that meets the 15 output, there is no O

R | in junior code code. Through r

Claims (3)

read-signal clock ticks; delay element 8 places trigger 12 into a single state. If the output of element 6 And there is O, then the state at the output of element 9 And, corresponding to the next code bit, will be zero. If at the output of element 6 AND there is 1, then through element 11 OR and trigger 12 the D-flip-flops entering delay element 8 are set to O. After p clock cycles, trigger 12 is transferred to one state and by signal 1 element 9 AND allows the passage of a pulse from the output of element 6I. An impulse from the stop bus 14 transfers the trigger 10 to zero state, which prohibits the passage of a random sequence through the element 9I. Thus, at output 15, the condition for following at least r zeros after the occurrence of k is provided; each unit in g neriruemoy output sequence. Due to the possibility of self-checking, Fibonacci p-number codes have become common in various information measurement and computing devices. The device makes it possible to simulate random fiboning streams, in particular, for digital magnetic recording, where the indicated codes allow for a given synchronization to increase the recording density by 1.5 times. Increasing the recording density is equivalent to reducing the working length of the tape. The proposed device can also be used as a source of Test Effects in the control of the specified apparatus, as well as for computer simulation. DETAILED DESCRIPTION OF THE INVENTION A random code generator comprising a generator of a Poisson pulse stream, the output of which is connected to the first input of the first element I and, through a first delay element, to the single input of the first three heros, the output of which is connected to the second input of the first element I, whose output is connected with a single input of the second trigger, the zero input of which is combined with the zero input of the first trigger with the first input of the second element I and connected to the read input of the generator, and the output of the second trigger connected to the second the second input of the second element And, differing in teM, that, in order to expand the functionality of the generator by simulating normal codes of p-Fibonacci numbers, it contains the second delay element, the third and fourth triggers, the OR element and the third And element, the first, second and third the inputs of which are connected respectively to the outputs of the second element And, the third and fourth trigger, the zero input of which is the input of the stop generator, and the single input of the fourth trigger is the input of the generator start and is connected to the first the OR element, the second input of which is connected to the output of the third element AND is the generator output, and the output of the OR element is connected to the first input of the second delay element and to the single input of the third trigger, the zero input of which is connected to the output of the second delay element connected to the readout input of the generator. Sources of information taken into account in the examination 1. Author's certificate of the USSR N 385295 ,. cl. G 06 F 7/52, 1971. 2. USSR author's certificate number 430367, cl. G (You F 1/02, 1972. 3. USSR author's certificate number 417782, cl. G About F 1/02, 1972 (prototype). eight