SE9902300D0 - Device for chip mounting in multilayer PCBs - Google Patents

Device for chip mounting in multilayer PCBs

Info

Publication number
SE9902300D0
SE9902300D0 SE9902300A SE9902300A SE9902300D0 SE 9902300 D0 SE9902300 D0 SE 9902300D0 SE 9902300 A SE9902300 A SE 9902300A SE 9902300 A SE9902300 A SE 9902300A SE 9902300 D0 SE9902300 D0 SE 9902300D0
Authority
SE
Sweden
Prior art keywords
substrate
microstrips
bonding
chip
chip mounting
Prior art date
Application number
SE9902300A
Other languages
Swedish (sv)
Other versions
SE514426C2 (en
SE9902300L (en
Inventor
Thomas Harju
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9902300A priority Critical patent/SE514426C2/en
Publication of SE9902300D0 publication Critical patent/SE9902300D0/en
Priority to IL14691300A priority patent/IL146913A/en
Priority to EP00944476A priority patent/EP1195079B1/en
Priority to AU58568/00A priority patent/AU5856800A/en
Priority to PCT/SE2000/001011 priority patent/WO2000079845A1/en
Priority to DE60029962T priority patent/DE60029962T2/en
Priority to JP2001504729A priority patent/JP2003502852A/en
Priority to US09/594,485 priority patent/US6333856B1/en
Publication of SE9902300L publication Critical patent/SE9902300L/en
Publication of SE514426C2 publication Critical patent/SE514426C2/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
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    • H05K2201/10727—Leadless chip carrier [LCC], e.g. chip-modules for cards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

The present invention relates to an arrangement concerned with multilayer printed circuit boards that enables cavities in said board to be utilized more effectively. A substrate (14) that includes a chip (16) which is connected to the microstrips (17) of the substrate (14) by means of bonding wires (18) is placed on a bonding shelf (13) with the chip (16) orientated towards the bottom of the cavity (6). The microstrips (17) on the substrate (14) therewith come into contact with the microstrips (12) on the bonding shelf (13). The earth plane (15) of the substrate (14) is connected to the upper earth plane (2) by means of bonding wires (19). The arrangement means that the cavity (16) is utilized effectively, at the same time as the substrate (14) protects the underlying chips (7, 16) against mechanical influences.
SE9902300A 1999-06-17 1999-06-17 Device for chip mounting in cavity in multilayer PCBs SE514426C2 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
SE9902300A SE514426C2 (en) 1999-06-17 1999-06-17 Device for chip mounting in cavity in multilayer PCBs
IL14691300A IL146913A (en) 1999-06-17 2000-06-13 Arrangement for mounting chips in multilayer printed circuit boards
EP00944476A EP1195079B1 (en) 1999-06-17 2000-06-13 An arrangement for mounting chips in multilayer printed circuit boards
AU58568/00A AU5856800A (en) 1999-06-17 2000-06-13 An arrangement for mounting chips in multilayer printed circuit boards
PCT/SE2000/001011 WO2000079845A1 (en) 1999-06-17 2000-06-13 An arrangement for mounting chips in multilayer printed circuit boards
DE60029962T DE60029962T2 (en) 1999-06-17 2000-06-13 ARRANGEMENT FOR ASSEMBLING CHIPS ON PCB
JP2001504729A JP2003502852A (en) 1999-06-17 2000-06-13 Configuration for mounting chips on multilayer printed circuit boards
US09/594,485 US6333856B1 (en) 1999-06-17 2000-06-16 Arrangement for mounting chips in multilayer printed circuit boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9902300A SE514426C2 (en) 1999-06-17 1999-06-17 Device for chip mounting in cavity in multilayer PCBs

Publications (3)

Publication Number Publication Date
SE9902300D0 true SE9902300D0 (en) 1999-06-17
SE9902300L SE9902300L (en) 2000-12-18
SE514426C2 SE514426C2 (en) 2001-02-19

Family

ID=20416129

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9902300A SE514426C2 (en) 1999-06-17 1999-06-17 Device for chip mounting in cavity in multilayer PCBs

Country Status (8)

Country Link
US (1) US6333856B1 (en)
EP (1) EP1195079B1 (en)
JP (1) JP2003502852A (en)
AU (1) AU5856800A (en)
DE (1) DE60029962T2 (en)
IL (1) IL146913A (en)
SE (1) SE514426C2 (en)
WO (1) WO2000079845A1 (en)

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Also Published As

Publication number Publication date
SE514426C2 (en) 2001-02-19
SE9902300L (en) 2000-12-18
EP1195079A1 (en) 2002-04-10
DE60029962D1 (en) 2006-09-21
EP1195079B1 (en) 2006-08-09
AU5856800A (en) 2001-01-09
WO2000079845A1 (en) 2000-12-28
US6333856B1 (en) 2001-12-25
IL146913A (en) 2005-11-20
DE60029962T2 (en) 2007-02-15
IL146913A0 (en) 2002-08-14
JP2003502852A (en) 2003-01-21

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