KR20190093478A - Converter and its control apparatus - Google Patents

Abstract

In the present invention, provided is a converting device which comprises: first to third converters (31 to 33) configured to receive voltage generated from a solar cell (100) and convert the voltage into electric power; first to third current sensors (51 to 53) configured to detect first to third output currents (io1 to io3) of the first to third converters (31 to 33); a shared voltage bus line (307) configured to share information about the first to third output currents (io1 to io3) from the first to third current sensors (51 to 53); a parallel operation current monitoring unit (303) configured to output a first parallel operation control voltage (Vc1) of a specific converter through a specific current sensor among the first to third current sensors (51 to 53); a parallel operation diode (305) disposed between the shared voltage bus line (307) and the parallel operation current monitoring unit (303); and a parallel operation resistor (304) and an N-type transistor (311) disposed in parallel with the parallel operation diode (305). According to the present invention, since the magnetic coupling (44) constituted by a single core is used, the number of cores can be minimized.

Description

Converter and its control apparatus

There is an increasing demand for pollution-free power generation globally or nationally, and interest in solar power is increasing as a way to replace nuclear and thermal power generation. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photovoltaic power converter for delivering power produced in a solar cell to a direct current (DC) load of low voltage-high current. The present invention relates to a three-phase interleaved converter and a control apparatus thereof in order to reduce and improve efficiency.

Recently, interest in renewable energy is increasing, and a solar panel is a device that performs a function of converting sunlight into electrical energy.

1 shows the principle of solar power generation. Solar panel refers to a semiconductor device that converts sunlight into electrical energy using a photoelectric effect. In the photoelectric effect, electrons and holes are formed in the semiconductor when the solar light is applied to the contact surface of the metal and the semiconductor or the p-n junction of the semiconductor. The electrons move to the front electrode, and the holes move to the back electrode. As a result, a voltage difference is generated between the front electrode and the rear electrode, and the electrons and the electrons are moved by an electric load. In general, since the flow of current is defined in the direction of movement of holes, a positive voltage is generated on the rear electrode and a negative voltage is generated on the front electrode.

Various inventions have been made in the related art for converting electric power from a solar cell or a direct current power source.

In related prior documents, Korean Patent Publication No. 10-1304777, Publication Date 2013. 09. 05. (hereinafter referred to as [Patent Document 1]) discloses a DC-DC converter having a wide input voltage control range. In [Patent Document 1], a stable output in a wide input voltage range by combining an interleaved flyback converter and an LLC resonant converter in order to transfer electrical energy generated from a solar cell having a wide input range to a load. A DC-DC converter for generating a voltage is disclosed.

As another prior document, Korean Unexamined Patent Publication No. 10-2018-0003122, Publication No. 2018.01.09. (Hereinafter referred to as [Patent Document 2]) has proposed an interleaved LLC resonant converter and its control method. [Patent Document 2] discloses a resonant converter and a control method thereof in which an LLC resonant converter composed of a full bridge circuit is operated in N parallel and supplies power to a load.

However, although the existing [Patent Documents 1] and [Patent Documents 2] proposed the interleaved converter method, there was a problem in that energy generated in the solar cell was not optimized for the low voltage-high current method.

[Patent Document 1] Republic of Korea Patent Publication No. 10-1304777, Publication Date 2013. 09. 05. [Patent Document 2] Republic of Korea Patent Publication No. 10-2018-0003122, Publication Date 2018.01.09. [Patent Document 3] Republic of Korea Patent Publication No. 10-1500206, Publication Date 2015. 03. 06.

The present invention proposes a converter and a control device thereof for transferring the power produced in a solar cell to a direct current (DC) load of a low voltage-high current. Three-phase interleaved method is applied to suit low-voltage-current output. In addition, it is composed of six switches for stable control of three-phase interleaved solar converter, and performs stable rectification supply by using magnetic coupling 44 composed of a single core, and newly proposed average current and maximum The present invention aims to provide a device capable of most stably supplying power generated from a solar cell to a direct current (DC) load of low voltage-high current using a variable current control method.

In the present invention, first, a three-phase interleaved circuit composed of six switches has been proposed for a three-phase interleaved solar converter and a control device thereof suitable for a low voltage-high current method. Three-phase interleaved circuits have the advantage that the three power supplies operate in alternating fashion to provide power and to minimize output current ripple. Second, magnetic coupling consisting of a single core (44). Since the number of inductors used in the circuit is reduced to a minimum, third, the average current and the maximum current variable control method are introduced, and the low voltage-high current method enables stable current control through the most optimal current control. It is a solution to the problem to provide a suitable three-phase interleaved solar converter and a control device thereof.

In the present invention, the three-phase interleaved photovoltaic converter suitable for the low voltage-to-current method proposed by the present invention. First, three-phase interleaved circuit supplies power by alternating three power supplies and maximizes output current ripple. Secondly, since the magnetic coupling 44 composed of a single core is used, the number of cores is minimized. Third, the average current and maximum current variable control methods are used. Stable current control is possible through the most optimal current control. Fourth, stable output is possible even at high current output of tens [A] to hundreds [A] through the introduction of precise current and voltage controllers. DC) When a large amount of current is required for the load 59, that is, under heavy load (the load where the output current is 50% or more of the rated current), the first to third converters 31 33, the current is controlled on an average, and the overall current can be balanced in the first to third converters 31 to 33, and a large current is not required for the direct current (DC) load 59. In other words, there is an increased effect of operating in the maximum current mode at the light load (the load where the output current is less than 50% of the rated current).

1 is the principle of photovoltaic power generation
2 is a conceptual diagram of a three-phase interleaved solar converter
3 is a three-phase interleaved solar converter circuit diagram
4 is a detailed circuit diagram of a three-phase interleaved solar converter.
5 is a magnetic coupling using a single core
6 is a first voltage controller form
7 is a second voltage controller form
8 is a third voltage controller form
9 is an average current control method of the three-phase interleaved solar converter
10 is the maximum current control method of the three-phase interleaved solar converter
11 is a variable control method of average current and maximum current of the proposed three-phase interleaved solar converter

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 shows a conceptual diagram of a three-phase interleaved solar converter in the present invention.

In the conceptual diagram of the three-phase interleaved solar converter (FIG. 3), solar cells 100 connected in parallel are positioned, and the solar cells 100 connected in parallel are first to fifth. All of the solar cells 11 to 15 are connected in parallel, and the first to fifth reverse voltage is prevented at the positive terminals of the first to fifth solar cells 11 to 15. Diodes 21 to 25 are arranged.

The outputs of the solar cells 100 connected in parallel are smoothed by the input capacitors 27 and are directly connected to each other through the first to third converters 31 to 33 controlled in an interleaved manner. DC) delivers power to the load 59. The main controller 70 may include the first to third converters 31 to 33 from the first to third current sensors 51 to 53 that detect the output currents of the first to third converters 31 to 33, respectively. It is characterized by controlling the switches (S1, S2, S3) of the first to third converters (31 to 33) by receiving the current information of the detection, the output voltage information from the output voltage detector (58). .

3 shows a circuit diagram of a three-phase interleaved solar converter.

In the three-phase interleaved solar converter circuit diagram (FIG. 3), solar cells 100 connected in parallel are positioned, and the solar cells 100 connected in parallel are first to fifth. All of the solar cells 11 to 15 are connected in parallel, and the first to fifth reverse voltage is prevented at the positive terminals of the first to fifth solar cells 11 to 15. Diodes 21 to 25 are arranged.

The outputs of the solar cells 100 connected in parallel are smoothed by the input capacitors 27 and are directly connected to each other through the first to third converters 31 to 33 controlled in an interleaved manner. DC) delivers power to the load 59. The main controller 70 may include the first to third converters 31 to 33 from the first to third current sensors 51 to 53 that detect the output currents of the first to third converters 31 to 33, respectively. The current information is detected and input to the current detection unit 72 of the main control unit 70. In addition, the main control unit 70 receives the output voltage information from the output voltage detection unit 58 and amplifies the first and second control gains (Z1, Z2) 60 and 61, and the voltage of the main control unit 70. It is input to the detection part 73.

The main control unit 70 is characterized in that the main switch driver 71 controls each switch of the three-phase interleaved power conversion circuit unit 300 through the three-phase interleaved solar converter controller (FIG. 3).

Above all, in the present invention, in order to minimize the number of inductors (cores) and to reduce output current ripple, the first to third inductors 41 to 43 have a magnetic coupling 44 on one core. do. Since the magnetic coupling 44 composed of a single core is used, there is an increased effect of minimizing the number of cores.

4 shows a detailed circuit diagram of a three-phase interleaved solar converter.

In the three-phase interleaved solar converter circuit diagram (FIG. 4), solar cells 100 connected in parallel are positioned, and the solar cells 100 connected in parallel are first to fifth. All of the solar cells 11 to 15 are connected in parallel, and the first to fifth reverse voltage is prevented at the positive terminals of the first to fifth solar cells 11 to 15. Diodes 21 to 25 are arranged.

The outputs of the solar cells 100 connected in parallel are smoothed by the input capacitors 27 and are directly connected to each other through the first to third converters 31 to 33 controlled in an interleaved manner. DC) delivers power to the load 59. The main controller 70 may include the first to third converters 31 to 33 from the first to third current sensors 51 to 53 that detect the output currents of the first to third converters 31 to 33, respectively. The current information is detected and input to the current detection unit 72 of the main control unit 70. In addition, the main control unit 70 receives the output voltage information from the output voltage detection unit 58 and amplifies the first and second control gains (Z1, Z2) 60 and 61, and the voltage of the main control unit 70. It is input to the detection part 73.

First to third outputs that are outputs of the first to third converters 31 to 33 from the first to third current sensors 51 to 53 in the three-phase interleaved solar converter detailed circuit diagram (FIG. 4). The detection information of the currents io1 to io3 is compared with the reference current value iref through the current control unit 220 through the current detection unit 72. In the current controller 220, the first current comparator 221 compares a first output current io1 with a reference current value irf, and the second current comparator 222 is a second output current io2. And the reference current value iref, and the third current comparator 223 compares the third output current io1 and the reference current value iref.

In addition, the voltage detected from the output voltage Vo through the first and second voltage detection resistors 54 and 55 may be amplified by the first and second control gains Z1 and Z2 60 and 61. It is input to the voltage detector 73 of 70. The voltage controller 210 outputs the control voltage Vc by amplifying the first and second control gains Z1 and Z2 60 and 61 compared with the reference voltage Vref1 for output control.

The gate signal generator 240 receives the control voltage Vc output from the voltage controller 210 and the outputs of the first to third current comparators 221 to 223. The first, third and fifth control comparators of the gate signal generator 240 are compared with the control voltage Vc output from the voltage controller 210 and the outputs of the first to third current comparators 221 to 223. do.

The second control comparator compares the output of the first current comparator 221 with the first converter reference current value IrefA, and the fourth control comparator is based on the output of the second current comparator 222 and the second converter. The sixth control comparator compares the output of the third current comparator 223 and the third converter reference current value IrefC.

In addition, the first control OR gate 247 outputs the output of the first control comparator 241 and the output of the second control comparator 242 in an OR condition, and the second control OR gate 248 is the third control comparator. The output of the second control comparator 244 and the output of the second control comparator 244 are output in an OR condition, and the third control OR gate 249 outputs the output of the fifth control comparator 245 and the sixth control comparator 246. It is a technical feature that the gate signal is generated by outputting an OR condition.

In order to control each switch of the first to third converters 31 to 33, the outputs of the first to third control OR gates 247 to 249 of the gate signal generator 240 are output from the RS flip-flop 260. In the first RS flip-flop 261, the output of the first OR gate 247 and the first oscillator pulse PH1 are input to output a gate signal from the first RS flip-flop 261, and the second RS flip-flop is provided. In operation 262, the output of the second OR gate 248 and the second oscillator pulse PH2 are input to output a gate signal from the second RS flip-flop 261, and the third RS flip-flop 263 is formed of a second signal. The output of the 3 OR gate 249 and the third oscillator pulse PH3 are input to output a gate signal from the third RS flip-flop 263. In addition, the gate signals are characterized by driving the respective switches of the first to third converters 31 to 33 through the gate driver 270.

In addition, the overvoltage and overcurrent protection unit 230 through the overvoltage and overcurrent protection comparator 231 when the output voltage or output current is greater than or equal to the reference voltage Vref2 for overvoltage and overcurrent control (31 to 33) Since it generates a FAULT signal to switch off all of the ()) there is an increased effect of protecting the three-phase interleaved solar converter suitable for the low voltage-high current scheme.

5 shows magnetic coupling using a single core.

In the magnetic coupling using a single core (FIG. 5), a winding is wound around each core leg, and the first to third inductors 41 to 43 form a magnetic coupling 44. do.

6 to 8 illustrate the first to third voltage controller types.

In the first voltage controller (FIG. 6), the first control gain (Z1) 60 is composed of the first control resistor (R1), and the second control gain (Z2) 61 is the eleventh control resistor (R11). And an eleventh control capacitor C11 is connected in series, and a twelfth control capacitor C12 is configured in parallel with the eleventh control resistor R11 and the eleventh control capacitor C11.

In the second voltage controller (FIG. 7), a first control gain (Z1) 60 is connected to a first control resistor (R1) and a first capacitor (C1) in parallel, and the first control resistor (R1) and A second control resistor (R2) in series with the first capacitor (C1), the second control gain (Z2) 61 is connected to the eleventh control resistor (R11) and the eleventh control capacitor (C11) in series. It is characterized in that the configuration.

In the third voltage controller (FIG. 8), the first control gain (Z1) 60 includes a second control resistor R2 and a first capacitor C1 in parallel with the first control resistor R1. The second control gain (Z2) 61 is connected to the eleventh control resistor (R11) and the eleventh control capacitor (C11) in series, in parallel with the eleventh control resistor (R11) and the eleventh control capacitor (C11). The twelfth control capacitor C12 is disposed and configured.

9 shows an average current control method of a three-phase interleaved solar converter.

First to third outputs of the first to third converters 31 to 33 from first to third current sensors 51 to 53 respectively detecting output currents of the first to third converters 31 to 33. The currents io1 to io3 are detected and shared to form a shared voltage bus line (Share Bus) 307.

The output of the three-phase interleaved photovoltaic converter 200 outputs the first parallel operation control voltage Vc1 from the current sensor 50 through the parallel operation current monitor 303 of the specific converter. A parallel operation resistor 304 is disposed between a voltage bus line (Share Bus) 307 and the parallel operation current monitor unit 303, and the voltages of the resistances of both ends of the parallel operation resistor 304 are parallel operation current comparison units. The error is detected by sensing 306. Since the parallel operation current comparing unit 306 detects and reduces the error between the shared bus voltage Vbus and the first parallel operation control voltage Vc1, the average current control method of the three-phase interleaved solar converter. It is called.

In addition, the parallel operation adder 301 outputs an error between the parallel operation current comparator 306 and the parallel operation reference voltage Vref3, and finally the three-phase interleaved solar light through the parallel operation voltage comparator 302. It characterized in that the converter 200 is controlled.

10 shows the maximum current control method of the three-phase interleaved solar converter.

First to third outputs of the first to third converters 31 to 33 from first to third current sensors 51 to 53 respectively detecting output currents of the first to third converters 31 to 33. The currents io1 to io3 are detected and shared to form a shared voltage bus line (Share Bus) 307.

The output of the three-phase interleaved photovoltaic converter 200 outputs the first parallel operation control voltage Vc1 from the current sensor 50 through the parallel operation current monitor 303 of the specific converter. The parallel operation diode 305 is arranged between the voltage bus line (Share Bus) 307 and the parallel operation current monitor unit 303, and the voltage of the parallel operation diode 305 is converted into the parallel operation current comparison unit 306. The sensing detects the error. The parallel operation current comparison unit 306 always detects and reduces the maximum error between the shared bus voltage Vbus and the first parallel operation control voltage Vc1 and is controlled based on the maximum current. It is called the maximum current control method of the solar converter.

In addition, the parallel operation adder 301 outputs an error between the parallel operation current comparator 306 and the parallel operation reference voltage Vref3, and finally the three-phase interleaved solar light through the parallel operation voltage comparator 302. It characterized in that the converter 200 is controlled.

Figure 11 shows the average current and maximum current variable control scheme of the proposed three-phase interleaved solar converter.

First to third outputs of the first to third converters 31 to 33 from first to third current sensors 51 to 53 respectively detecting output currents of the first to third converters 31 to 33. The currents io1 to io3 are detected and shared to form a shared voltage bus line (Share Bus) 307.

The output of the three-phase interleaved photovoltaic converter 200 outputs the first parallel operation control voltage Vc1 from the current sensor 50 through the parallel operation current monitor 303 of the specific converter. The parallel operation diode 305 is disposed between a voltage bus line (Share Bus) 307 and the parallel operation current monitor unit 303, and the parallel operation diode 305 and the parallel operation resistor 304 and the N-type transistor are arranged. The serial circuit of 311 is connected in parallel.

Above all, in the proposed three-phase interleaved solar converter, the average current and the maximum current variable control scheme (FIG. 11) detect the shared bus voltage Vbus by the first and second parallel operation feedback resistors 314 and 315. 312) is input to the reference voltage. The regulator 312 is characterized in that the device of the TL431 is used and operates at a reference voltage of 2.5 [V].

The anode of the regulator 312 is input to the controller power supply Vcc, and if the shared bus voltage Vbus is equal to or greater than the reference voltage, the regulator 312 conducts from the anode to the cathode. In addition, a voltage is applied to the regulator connection resistor 313 and the N-type transistor 311 is turned on, so that the parallel operation resistor 304 is turned on and operates in an average current mode.

Therefore, when the shared bus voltage (Vbus) is less than the reference voltage (Reference Voltage), the operation in the maximum current mode, if the shared bus voltage (Vbus) is more than the reference voltage (Reference Voltage), operating in the average current mode It features.

In other words, it operates in the maximum current mode at light loads and in the average current mode at heavy loads (heavy load: the load at which the output current is 50% or more of the rated current). In the case where a large amount of current is required in the direct current (DC) load 59, that is, the current is controlled in the first to third converters 31 to 33 at a heavy load, and the first is overall. In the third to third converters 31 to 33, the current can be balanced, and when a large amount of current is not required in the DC load 59, that is, a light load is rated. In the case of the load which is less than 50% of the current, it is a technical feature to operate in the maximum current mode.

The error is detected by sensing the voltage of the parallel operation diode 305 or the parallel operation resistor 304 by the parallel operation current comparison unit 306. The parallel operation current comparison unit 306 always detects and reduces the maximum error or the average error of the shared bus voltage Vbus and the first parallel operation control voltage Vc1. It is called the average current and maximum current variable control method of three-phase interleaved photovoltaic converter.

In addition, the parallel operation adder 301 outputs an error between the parallel operation current comparator 306 and the parallel operation reference voltage Vref3, and finally the three-phase interleaved solar light through the parallel operation voltage comparator 302. It characterized in that the converter 200 is controlled.

Accordingly, when a large amount of current is required in the direct current (DC) load 59, that is, the current is controlled in the first to third converters 31 to 33 at a heavy load on average, and the first is overall. The current can be balanced in the third to third converters 31 to 33, and when a large current is not required for the DC load 59, that is, a light that operates in the maximum current mode at light load. Effect occurs.

Therefore, in the present invention, a converter comprising: first to third converters 31 to 33 for converting electric power by receiving a voltage generated from a solar cell 100; First to third current sensors 51 to 53 for detecting first to third output currents io1 to io3 of the first to third converters 31 to 33; A shared voltage bus line (307) sharing the first to third output currents (io1 to io3) information from the first to third current sensors (51 to 53);

A parallel operation current monitor unit 303 for outputting a first parallel operation control voltage Vc1 of a specific converter through a specific current sensor among the first to third current sensors 51 to 53; A parallel driving diode 305 positioned between the shared bus line 307 and the parallel operating current monitor 303; A converter including a parallel operation resistor 304 and an N-type transistor 311 disposed in parallel with the parallel operation diode 305 is proposed.

In addition, the control device of the converter, comprising: first to third current sensors (51 to 53) for detecting first to third output currents (io1 to io3) of the first to third converters (31 to 33); A parallel driving diode 305 positioned between the shared bus line 307 and the parallel operating current monitor 303; The control device for a converter comprising a parallel operation resistor 304 and an N-type transistor 311 disposed in parallel with the parallel operation diode 305.

The present invention can be applied to a converter and its control device by various modifications having ordinary skill in the art, it should be recognized that the scope of technology that can be easily modified technically falls within the scope of the patent.

11: first solar cell
12: second solar cell (Cell)
13: third solar cell (Cell)
14: fourth solar cell (Cell)
15: fifth solar cell
21: first reverse voltage prevention diode
22: second reverse voltage protection diode
23: third reverse voltage protection diode
24: fourth reverse voltage protection diode
25: fifth reverse voltage prevention diode
27: input capacitor
31: first converter
31-1: Upper switch of the first converter
31-2: lower switch of the first converter
32: second converter
32-1: upper switch of the second converter
32-2: lower switch of the second converter
33: third converter
33-1: upper switch of the third converter
33-2: lower switch of the third converter
41: first inductor
42: second inductor
43: third inductor
44: magnetic coupling
50: current sensor
51: first current sensor
52: second current sensor
53: third current sensor
54: first voltage detection resistor
55: second voltage detection resistor
57: output capacitor
58: output voltage detector
59: DC load
60: first control gain (Z1)
61: second control gain (Z2)
70: main control unit
71: main switch drive unit
72: current detector
73: voltage detector
100: solar cell
200: three-phase interleaved solar converter
201: first control unit resistor
202: first control capacitor
203: second capacitor
204: second resistance
205: third capacitor
206: third resistance
207: fourth resistor
208: fifth resistance
209: fourth capacitor
210: voltage control unit
211: voltage comparator
220: current controller
221: first current comparator
222: second current comparator
223: third current comparator
225: current adder
230: overvoltage and overcurrent protection unit
231: Overvoltage and Overcurrent Protection Comparators
232: 3.3 [V] reference voltage generator
233: first overvoltage protection resistor
234: resistance of the second overvoltage protection unit
240: gate signal generator
241: first control comparator
242: second control comparator
243: third control comparator
244 fourth control comparator
245: fifth control comparator
246: sixth control comparator
247: first control OR gate
248: second control OR gate
249: third control OR gate
260 RS flip flop
261: first RS flip-flop
262: second RS flip-flop
263: third RS flip-flop
270 gate driver
271: gate driver of the first converter
271-1: Upper gate buffer of the first converter
271-2: Lower gate Not gate of the first converter
272: gate driver of the second converter
272-1: Upper gate buffer of the second converter
272-2: Lower gate Not gate of the second converter
273: gate driver of the third converter
273-1: Upper gate buffer of the third converter
273-2: Lower gate Not gate of the third converter
280: oscillation unit
282: Oscillator Resistance
300: three-phase interleaved power conversion circuit
301: parallel operation adder
302: parallel operation voltage comparison unit
303: parallel operation current monitor
304: parallel operation resistance
305: parallel operation diode
306: parallel operation current comparison unit
307: shared bus line
311: N-type transistor
312: Regulator
313: regulator connection resistance
314: first parallel operation feedback resistor
315: second parallel operation feedback resistor
A: contacts of the upper and lower switches of the first converter
B: contacts of the upper and lower switches of the second converter
C: contacts of the upper and lower switches of the third converter
C1: first control capacitor
C11: eleventh control capacitor
C12: 12th control capacitor
FAULT: switch off
io1: first output current
io2: second output current
io3: third output current
Iref: reference current value
OSC: Oscillator
PH1: first oscillator pulse
PH2: second oscillator pulse
PH3: third oscillator pulse
R1: first control resistor
R2: second control resistor
R11: eleventh control resistor
S1: main switch (upper and lower switch) of the first converter
S2: main switch (upper and lower switch) of the second converter
S3: Main switch (upper and lower switch) of the third converter
T: (+) terminal of DC load
Vc: control voltage
Vcc: control unit power
Vc1: first parallel operation control voltage
Vc2: second parallel operation control voltage
Vref1; Reference voltage for output control
Vref2: reference voltage for overvoltage and overcurrent control
Vref3: Parallel operation reference voltage
IrefA: first converter reference current value
IrefB: Second converter reference current value
IrefC: third converter reference current value
Z1: First gain
Z2: Second control gain

Claims (3)

In the converter,
First to third converters 31 to 33 for converting electric power by receiving a voltage generated from the solar cell 100;
First to third current sensors 51 to 53 for detecting first to third output currents io1 to io3 of the first to third converters 31 to 33;
A shared voltage bus line (307) sharing the first to third output currents (io1 to io3) information from the first to third current sensors (51 to 53);
A parallel operation current monitor unit 303 for outputting a first parallel operation control voltage Vc1 of a specific converter through a specific current sensor among the first to third current sensors 51 to 53;
A parallel driving diode 305 positioned between the shared bus line 307 and the parallel operating current monitor 303;
A converter comprising a parallel operation resistor 304 and an N-type transistor 311 disposed in parallel with the parallel operation diode 305. The method of claim 1,
The first to third converters 31 to 33 operate in an average current mode under heavy load, and operate in a maximum current mode under light load. In the control device of the converter,
First to third current sensors 51 to 53 for detecting first to third output currents io1 to io3 of the first to third converters 31 to 33;
A shared voltage bus line (307) sharing the first to third output currents (io1 to io3) information from the first to third current sensors (51 to 53);
A parallel operation current monitor unit 303 for outputting a first parallel operation control voltage Vc1 of a specific converter through a specific current sensor among the first to third current sensors 51 to 53;
A parallel driving diode 305 positioned between the shared bus line 307 and the parallel operating current monitor 303;
Control device of the converter comprising a parallel operation resistor 304 and the N-type transistor 311 disposed in parallel with the parallel operation diode 305

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