KR20180009691A - Inverter with overcurrent detection - Google Patents

Abstract

The present invention relates to an inverter comprising: a power output terminal including a plurality of half-bridge circuits having semiconductor switches; a first measurement unit installed to measure the entire input voltage and entire input current intensity of the inverter to calculate entire input power of the inverter based on the entire input voltage and entire input current intensity; a second measurement unit installed to measure an individual bridge current within the half-bridge circuits; and a control unit installed to detect the malfunction of the overcurrent of the inverter when the entire input power exceeds a threshold value which is determined based on the bridge current.

Description

[0001] INVERTER WITH OVERCURRENT DETECTION [0002]

The present invention relates to an inverter for an electric compressor used in, for example, an air conditioner of a vehicle.

1 shows a motor-driven compressor according to the prior art. The motor-driven compressor includes a power output stage, an inverter-control unit, and a motor. The power output stage includes a bridge circuit (a so-called B6-bridge) of a power semiconductor (for example, an insulated gate bipolar mode transistor (IGBT) or a power-metal oxide silicon field effect transistor) and an intermediate circuit capacitor C. The inverter-control unit receives the speed setting value from the vehicle-control unit, and outputs a corresponding switch signal (switch signal (HV +, HV-) In order to precisely control the power output stage, the inverter-control unit receives various measurement signals (current and voltage values) from the power output stage.

Further, the inverter-control unit transmits the power consumption of the power output stage to the vehicle-control unit based on the measurement signals.

In addition, the inverter-control unit also has the purpose of protecting the inverter from an overcurrent caused by a short circuit or an overload. To this end, current and voltage sensors are located at various locations within the inverter.

For this reason, the inverter-control unit measures the total input voltage and the total input current intensity higher than, for example, the intermediate-circuit capacitor (C), and from this, calculates the total input power of the inverter.

In addition, the inverter-control unit can measure the individual phase currents output from the power output stage to the motor through Hall sensors. However, the above-mentioned hall sensors can not be used for a vehicle in the case of a high voltage (450 V or more). Also, when using hall sensors, it can be mentioned that the dynamic of the current measurement is fairly limited, and that the overcurrent can not be detected quickly enough. In addition, the use of Hall sensors does not allow half bridge short detection (e.g., from HV + to HV- via power semiconductors 1 and 2) between the power output stage and the motor.

Individual phase currents can also be measured indirectly (see, for example, US 2002/117992 A1, US 2004/125622 A1, US 6049474 A, US 2003/173946 A1, US 5969958 A, US 2010/128505 A1 ). However, these methods have the disadvantage that the amount of current change to provide stable motor control is too small and the amplitude of the current is too small when the motor speed is low.

An object of the present invention is to reliably detect an overcurrent (in particular, a bridge short circuit) in an inverter.

The above problem is solved by an inverter for an electric compressor as set forth in claim 1.

Wherein the inverter includes a power output stage and a first measurement unit, wherein the power output stage comprises a plurality of half-bridge circuits having semiconductor switches, the first measurement unit comprising: And calculates the total input power of the inverter based on the total input voltage and the total input current intensity. The inverter also includes a second measurement unit, which is installed to measure the individual bridge currents in the half bridge circuits. In addition, the inverter includes a control unit, which is provided to detect an overcurrent error of the inverter if the total input power exceeds a threshold, wherein the threshold is determined based on the bridge current do.

Therefore, the threshold is not determined from the beginning, but is adjusted to the measured bridge current. As a result, an overcurrent error can be detected quickly.

According to one preferred embodiment, the control unit is arranged to control the power output stage by PWM-control and to determine the threshold value based on a plurality of phase currents measured at a predetermined PWM-clock number.

Accordingly, the plurality of phase currents are observed for a predetermined time.

According to a preferred embodiment, the threshold is calculated based on the effective value of the moving average of the plurality of phase currents.

According to one preferred embodiment, the threshold is also calculated based on the total input voltage.

According to one preferred embodiment, the threshold (Pin_limit) is calculated by the following equation:

At this time

t represents the current PWM-clock,

N is a half bridge number,

k is the conversion factor of the phase current converted into the bridge current,

n is the preset number of PWM-clocks,

Iphx is the bridge current in the half bridge (phx)

c is the allowed current offset, and

Vin is the total input voltage.

According to a preferred embodiment, the second measuring unit is arranged to measure the phase current by means of shunt resistance at the low-voltage side of the half-bridge circuits.

According to a preferred embodiment, the control unit is provided to output an overcurrent error signal to open all the semiconductor switches in the power output stage when an overcurrent error is detected.

According to a preferred embodiment, the control unit is arranged to detect an overcurrent fault when the inverter is in a controlled state.

The invention also relates to a method for controlling an inverter for an electric compressor, wherein the inverter comprises a power output stage, the power output stage comprising a plurality of half bridge circuits with semiconductor switches. The method includes measuring the total input voltage and the total input current intensity of the inverter and calculating the total input power of the inverter based on the total input voltage and the total input current intensity. The method also includes measuring an individual bridge current in the half bridge circuits and detecting an over current fault of the inverter if the total input power exceeds a threshold, It is decided on the basis.

In addition, the invention also relates to a computer program product for storing machine-readable code for prompting a computer to execute the inverter control method.

Fig. 1 shows an example of the basic structure of an inverter for an electric compressor according to the prior art.
2 shows an inverter according to an embodiment of the present invention.
3 shows an inverter according to an embodiment of the present invention in which a shunt resistor is used.
4 shows the simulation results of the present invention compared with the prior art.
FIG. 5 schematically shows an overcurrent error specification according to the present invention.
Figure 6 shows a method according to an embodiment of the present invention.

In the following, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. Wherein the same or corresponding elements in different drawings are denoted by the same or similar reference numerals, respectively.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention, which will be described in detail below, will be described in detail with reference to an inverter for a motor-driven compressor used in a refrigerant compressor of a vehicle. It should be noted, however, that the following description merely provides examples and should not be construed as limiting the invention.

2 shows an inverter according to an embodiment of the present invention.

The inverter includes a power output stage 10, which includes a plurality of half-bridge circuits with semiconductor switches 1, 2, 3, 4, 5, Each of the two semiconductor switches forms one half bridge (e.g., semiconductor switches 1 and 2). The semiconductor switches may be formed from, for example, IGBTs and power MOSFETs. Each of the individual half bridges outputs a phase current for the electric motor, which is part of the motor-driven compressor.

Figure 2 shows an exemplary so-called B6-bridge, in which the B6-bridge outputs a three-phase alternating current to the motor. However, the present invention is not limited to three phases. Any number of phases or half-bridges can be used.

The power output stage 10 may also include an intermediate circuit capacitor C. [

The power output terminal 10 is supplied with a voltage by high voltage batteries (HV + and HV-).

The inverter also includes a first measurement unit 20 which measures the total input voltage Vin and the total input current intensity Iin of the inverter and the total input voltage And calculates the total input power Pin of the inverter based on the intensity (Pin = Vin x Iin).

Fig. 2 shows an embodiment of a first measuring unit 20 for measuring a higher total input voltage (Vin) than the intermediate circuit capacitor (C). However, the total input voltage (Vin) can also be measured at other points in the inverter.

In the above embodiment, the total input current intensity Iin is measured at the low voltage side HV-. Compared to measurements on the high voltage side (HV +), the advantage of this low voltage side measurement is that separate current measurements are not required on the low voltage side.

In addition, the inverter includes a second measuring unit 30, which is installed to measure the individual bridge currents in the half-bridge circuits. The bridge current is preferably measured synchronously. The bridge current in the half bridge formed by the semiconductor switches 1 and 2 is hereinafter referred to as Iph1. The bridge current in the half bridge formed by the semiconductor switches 3 and 4 is hereinafter referred to as Iph2. The bridge current in the half bridge formed by semiconductor switches 5 and 6 is named Iph3 in the following.

In a preferred embodiment, the second measuring unit 30 is arranged to measure the bridge current by a shunt resistor on the low-voltage side of the half-bridge circuits. Fig. 3 shows an embodiment in which the bridge current Iph1 is measured by the shunt resistor 31. Fig. The voltage drop lower than the shunt resistor 31 is amplified by the amplifier 32 and output to the control unit 40. [ In the same way, the bridge currents Iph2 and Iph3 in the other half bridges can be measured.

The bridge current measurement at the low voltage side has the advantage that no separate current measurement is required.

Fig. 2 shows a case where the bridge current in all the half bridges is measured. However, the present invention is not limited to this case, and the bridge current can only be measured in the part of the half bridges.

The inverter also includes a control unit 40 which is provided to sense an overcurrent error of the inverter if the total input power Pin exceeds a threshold Pin_limit, Currents Iph1, Iph2, and Iph3.

Therefore, the threshold value is not fixed but is adjusted to the measured bridge current. As a result, it is possible to quickly detect the overcurrent.

The control unit 40 receives measurement signals from the first measurement unit 20 and the second measurement unit 30. In addition, the control unit 40 controls the power output stage 10 to switch the semiconductor switches 1, 2, 3, 4, 5, 6 in such a manner that the power output stage 10 outputs an alternating current to the motor Signals. In addition, the control unit 40 communicates with a vehicle-control unit (compare Fig. 1) not shown in the figure.

According to a preferred embodiment, the control unit 40 controls the power output stage 10 by PWM-control, and is set up to determine a threshold value based on a plurality of bridge currents measured at a predetermined PWM- .

Therefore, a number of bridge currents measured in the past are taken into account when calculating the threshold value. As a result, it is possible to quickly detect the overcurrent by detecting a sudden difference in the total input power (Pin).

According to a preferred embodiment, the threshold is calculated based on the effective value of the moving average of the multiple bridge currents. An example of moving average is

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Where iphx (i) is the bridge current in the half bridge (phx) of the PWM-clock (i), t represents the current PWM-clock, and n is the number of the preset PWM-clock. The number of PWM-clocks may be, for example, n = 250.

The valid value may be used to detect an excessively large difference between the total input power (Pin) and the total input power measured in the past. As a result, the occurrence of the overcurrent can be detected quickly.

According to one preferred embodiment, the threshold value is also calculated based on the total input voltage Vin.

In particular, the effective value of the bridge current can be multiplied by the total input voltage Vin. This is preferable because the amount of variation of the battery voltage can be detected as a result (for example, during recuperation braking on downhill running). As a result, an erroneous overcurrent measurement can be prevented.

According to one preferred embodiment, the threshold (Pin_limit) is calculated by the following equation:

At this time

t represents the current PWM-clock,

N is a half bridge number,

k is the transform coefficient of the bridge current that is phase-transformed,

n is the preset number of PWM-clocks,

Iphx is the bridge current in the half bridge (phx)

c is the allowed current offset, and

Vin is the total input voltage.

이다.In the example of FIG. 2, N is 3. The number of PWM-clocks may be, for example, n = 250. An example of a transform coefficient is k =

to be.

The allowed current offset (c) means a value to which the moving average of the phase current can be changed without overcurrent detection. The allowable current offset c also considers the power consumption of additional components (e.g., μC), particularly on the circuit board on which the measurement units 20, 30 and the control unit 40 are located. The allowed current offset (c) may be temperature dependent. The allowed offset (c) is fixed.

Further, the effective value of the bridge current is multiplied by the total input voltage Vin. It is not necessary to calculate the average through this total input power because the total input voltage is slowly changed compared to the current. For example, a voltage of a magnitude of 100 ms and a current intensity of a mu s or a small magnitude are changed. This enlightenment can simplify the threshold calculation because the average output over the entire input voltage can be prevented.

The control unit 40 outputs an overcurrent error signal to open all the semiconductor switches 1, 2, 3, 4, 5, 6 when an overcurrent error is detected. As a result, the bridge short circuit is prevented.

Fig. 4 shows simulation results obtained using the above-described formula according to the present invention for calculating the pin-limit. The left graph of FIG. 4 shows the simulation without using the Pin-limit calculation according to the present invention. The right graph of FIG. 4 shows the simulation using the Pin-limit calculation according to the present invention.

The upper part of the two graphs represents the temperature (占 폚) of the semiconductor switches. The lower part of the two graphs represents three phase currents (A). The X-axis represents time (unit: second).

Figure 4 shows a case where a sudden load increase of the motor occurs by a factor of 2.4 immediately after 0.45 seconds. The graph on the left shows that the temperature of the semiconductor switches rises to a temperature exceeding 240 캜 within a few milliseconds because no threshold exceeding 40 A is detected in the negative region. The above-mentioned threshold value is detected only when the bridge current exceeds the threshold value of 40 A in the positive region. This causes failure of the semiconductor switches, which can typically be heated to a maximum of 175 占 폚.

On the other hand, the present invention shown in the right graph detects the overcurrent very quickly (already at 0.452 seconds). In particular, the overcurrent is already detected before the bridge circuit exceeds the threshold of 40A in the positive region. Therefore, temperature rise of the semiconductor switches and consequently failure of the semiconductor switches can be prevented.

Therefore, threshold monitoring of the negative bridge current can be prevented by the present invention. Such monitoring requires additional components (e.g., comparators with shunt resistors and negative reference voltages) and space for the substrate circuitry. Therefore, the present invention can prevent the use of additional components for detecting an overcurrent on the inverter substrate circuit.

5 schematically shows an overcurrent error condition performed by the control unit 40 according to an embodiment of the present invention. In this case, the measured total input power Pin, the measured total input current intensity Iin, and the measured bridge current Iph1, Iph2, Iph3 are used. The total input current intensity Iin measured by the first measurement unit 20 is compared with the total input current intensity threshold value max_Iin by the comparison circuit. The comparison circuit outputs a logical function 1 when the value of the "+" input section is larger than the value of the "-" input section.

In addition, the maximum bridge current is compared to the bridge current threshold (max_Iph) by another comparator circuit.

The total input current intensity threshold (max_Iin) and the bridge current threshold (max_Iph) are preset values and are determined through simulations / experiments in the actual combination of the inverter and the motor.

The total input power (Pin) is compared with a threshold value calculated according to the present invention by an additional comparison circuit. This comparison result is delayed by a predetermined number of PWM-clocks (for example, 1 PWM-clock).

The depicted connections of the comparison circuits are merely exemplary and may be interchanged. The tasks of the three comparator circuits are combined by a logic circuit so that if one of the thresholds is exceeded, the logic circuit outputs an error signal. The logic circuit may be a NOR (NOR) element (or an XOR (exclusive-OR) element).

The result of the combination is output to a start-up blind circuit. This start-up circuit is installed so that no overcurrent error is delivered by the output of the NOR device (10,000 first PWM-clocks) during the inverter start-up. As a result, a faulty overcurrent regulation during the start-up process can be prevented. Therefore, in this embodiment, the control unit 40 is provided so as to detect an overcurrent error when the inverter is in the control state.

The hold element outputs the detected overcurrent error until a reset signal is received. The reset signal is output by the microcontroller included in the control unit 40.

Figure 6 shows a method according to an embodiment of the present invention. The above embodiment relates to a method for controlling an inverter for an electric compressor, wherein the inverter includes a power output stage and the power output stage includes a plurality of half bridge circuits having semiconductor switches. The method includes a step (S1) for measuring the total input voltage and the total input current intensity of the inverter and a step (S2) for calculating the total input power of the inverter based on the total input voltage and the total input current intensity . The method also includes measuring (S3) the individual bridge current in the half-bridge circuits and detecting (S4) an overcurrent fault of the inverter if the total input power exceeds a threshold, Is determined based on the current.

The above-described measurement units and control units may include a bus, a processing unit, a storage device, a ROM, and a communications interface. The bus may enable communication between parts. The processing unit may comprise a processor, a microprocessor, or processing logic, which may interpret and execute instructions. The storage device may comprise RAM or other types of dynamic storage devices, which may store information and software instructions for execution via the processing unit.

The measurement units and the control units may perform the above-described computation and processing operations. The processing unit and the control units execute such computational tasks by a processing unit performing software instructions, wherein the software instructions are contained within a computer readable medium. A computer readable medium may be defined as a physical or logical storage device. The logical storage device may be a storage area within an individual physical storage device or may be divided through a plurality of physical storage devices.

The instructions contained in the storage device may prompt the processing unit if the operations or processing operations described above are performed on the processor. Alternatively, hard-wired circuitry may be used by software instructions or in combination with software instructions to perform the above-described process and / or processing operations. Accordingly, the above-described implementation is not limited to any particular combination of hardware and software.

If the concepts of the measurement unit and the control unit are used, there is no limitation as to how these units are divided and combined. That is, the units may be partitioned within various software and hardware components or other components to implement the described functionality. A number of different elements may be combined to perform the described functions.

The elements of the measurement units and control units may be implemented in hardware, software, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), firmware, or the like.

Claims (10)

An inverter for an electric compressor,
A power output stage (10) comprising a plurality of half-bridge circuits with semiconductor switches;
A first measurement unit (20) configured to measure a total input voltage and a total input current intensity of the inverter, and to calculate a total input power of the inverter based on the total input voltage and the total input current intensity;
A second measurement unit (30) arranged to measure an individual bridge current in the half bridge circuits; And
And a control unit (40) installed to detect an overcurrent error of the inverter if the total input power exceeds a threshold value,
Wherein the threshold is determined based on the bridge current. The method according to claim 1,
Wherein the control unit (40) is arranged to control the power output stage (10) by PWM control and to determine the threshold value based on a number of bridge currents measured at a predetermined PWM- . 3. The method of claim 2,
Wherein the threshold is calculated based on a valid value of a moving average of a plurality of bridge currents. The method of claim 3,
Wherein the threshold is also calculated based on the total input voltage. 5. The method of claim 4,
If the threshold value (Pin_limit)

Lt; / RTI >
At this time
t represents the current PWM-clock,
N is a half bridge number,
k is a conversion factor of the bridge current that is converted into a phase current,
n is the preset number of PWM-clocks,
Iphx is the bridge current in the half bridge (phx)
c is the allowed current offset, and
Vin is the total input voltage, inverter. 6. The method of claim 5,
Wherein the second measuring unit (30) is arranged to measure the phase current by shunt resistance at the low voltage side of the half bridge circuits. The method according to claim 6,
Wherein the control unit (40) is arranged to output an overcurrent error signal to open all semiconductor switches in the power output stage when an overcurrent error is detected. 8. The method of claim 7,
Wherein the control unit (40) is arranged to detect an overcurrent fault when the inverter is in a controlled state. A method for controlling an inverter for an electric compressor, the inverter comprising a power output stage, the power output stage comprising a plurality of half bridge circuits having semiconductor switches,
Measuring a total input voltage and a total input current intensity of the inverter (S1);
Calculating (S2) the total input power of the inverter based on the total input voltage and the total input current intensity;
Measuring (S3) individual bridge currents in the half bridge circuits;
And detecting (S4) an overcurrent fault of the inverter if the total input power exceeds a threshold, the threshold being determined based on the bridge current. 10. A computer program product for storing machine-readable code for prompting a computer to execute the inverter control method according to claim 9.

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