KR20020090686A - Forming method for photoresist pattern of semiconductor device - Google Patents
Forming method for photoresist pattern of semiconductor device Download PDFInfo
- Publication number
- KR20020090686A KR20020090686A KR1020010029663A KR20010029663A KR20020090686A KR 20020090686 A KR20020090686 A KR 20020090686A KR 1020010029663 A KR1020010029663 A KR 1020010029663A KR 20010029663 A KR20010029663 A KR 20010029663A KR 20020090686 A KR20020090686 A KR 20020090686A
- Authority
- KR
- South Korea
- Prior art keywords
- forming
- photoresist pattern
- photoresist
- semiconductor device
- pattern
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
- G03F7/168—Finishing the coated layer, e.g. drying, baking, soaking
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
Description
본 발명은 반도체 소자의 감광막패턴 형성방법에 관한 것으로, 보다 상세하게 UV-베이크공정의 단점을 극복하기 위하여 감광막패턴 형성 후 가교제(crosslink agent)를 함유하는 수용성 고분자 용액을 도포하고 베이크공정을 실시하여 가교제를 확산(diffusion)시킴으로써 상기 감광막패턴을 경화시켜 후속 공정으로 다른 감광막의 더블 코팅(double coating)을 가능하게 하는 반도체소자의 감광막패턴 형성방법에 관한 것이다.The present invention relates to a method for forming a photoresist pattern of a semiconductor device, and in order to overcome the disadvantages of the UV-baking process in detail, after forming the photoresist pattern, by applying a water-soluble polymer solution containing a crosslink agent and performing a baking process The present invention relates to a method of forming a photosensitive film pattern of a semiconductor device which hardens the photosensitive film pattern by diffusing a crosslinking agent to enable double coating of another photosensitive film in a subsequent process.
최근 이미지 센서(image sensor) 등 특정 반도체소자에서 특성 향상을 위해 딥 N- 임플란테이션(deep N- implantation) 등을 높은 에너지를 사용하여 실시하는 경우가 있다. 이러한 경우 게이트전극 아래 쪽은 채널링(channeling) 방지를 위해 ?? N- 임플란테이션이 적용되면 안 된다.Recently, in order to improve characteristics in certain semiconductor devices such as an image sensor, deep N-implantation or the like may be performed using high energy. In this case, the bottom of the gate electrode is used to prevent channeling. N-implantation should not be applied.
그러나, 기존의 감광막패턴 형성 기술로는 임플란테이션의 베리어(barrier)로 작용하는 감광막패턴 형성 공정 시 감광막의 두께, 중첩 조절(overlay control) 능력 등의 이유로 해서 게이트 전극 상에 새로운 감광막패턴을 형성할 수 없었다.However, in the conventional photoresist pattern formation technology, a new photoresist pattern is formed on the gate electrode due to the thickness of the photoresist layer and the ability to control the overlay during the photoresist pattern formation process acting as a barrier for implantation. I could not.
따라서, 게이트전극 식각공정 이 후 게이트전극 상에 남아있는 감광막패턴의 잔막을 UV-베이크(ultra violet-bake)를 통해 경화시킨 후 감광막의 더블 코팅을 통해 딥 N- 임플란테이션 베리어인 감광막패턴을 형성한다. 그 후, 게이트전극 식각공정 시 남아 있던 감광막패턴과 게이트전극을 구성하는 다결정실리콘층 및 게이트전극이 없는 영역에서 감광막이 더블 코팅되어 형성된 감광막패턴이 딥 N- 임플란테이션 베리어로 작용하여 원하는 위치에만 고 에너지를 이용한 임플란테이션이 가능하게 된다.Therefore, after the gate electrode etching process, the remaining film of the photoresist pattern remaining on the gate electrode is cured by UV-baking, and then the photoresist pattern, which is a deep N-implantation barrier, is formed through double coating of the photoresist. Form. Thereafter, the photoresist pattern remaining during the gate electrode etching process, the polysilicon layer constituting the gate electrode, and the photoresist pattern formed by double coating of the photoresist in the region without the gate electrode act as a deep N-implantation barrier to serve only at a desired position. High energy implantation is possible.
상기한 바와 같이 종래기술에 따른 반도체소자의 감광막패턴 형성방법은, 감광막을 더블 코팅하기 전에 실시되는 UV-베이크 공정은 추가적인 장비가 필요하고, UV의 조도(intensity)변화에 의해 더블 코팅 시 감광막 간의 혼합(intermixing) 현상이 발생하여 공정의 안정성을 저해하는 문제점이 있다.As described above, in the method of forming a photoresist pattern of a semiconductor device according to the prior art, the UV-baking process performed before the double coating of the photoresist film requires additional equipment, and between the photoresist layers during the double coating due to the change in the intensity of UV. There is a problem in that intermixing occurs to inhibit the stability of the process.
본 발명은 상기한 문제점을 해결하기 위한 것으로, 감광막의 더블 코팅공정 시 제1감광막패턴을 형성하고 전체표면 상부에 가교제(crosslink agent)를 함유하는 수용성 고분자용액을 도포한 후 베이크공정을 실시하여 상기 제1감광막패턴으로 가교제가 확산되도록 하여 상기 제1감광막패턴이 후속 공정으로 형성되는 감광막에 대하여 저항성을 갖도록 하여 감광막의 더블 코팅을 가능하게 하는 반도체 소자의 감광막패턴 형성방법을 제공하는데 그 목적이 있다.The present invention is to solve the above problems, forming a first photoresist film pattern during the double coating process of the photoresist film and applying a water-soluble polymer solution containing a crosslinking agent (crosslink agent) on the entire surface and then performing a baking process It is an object of the present invention to provide a method of forming a photosensitive film pattern of a semiconductor device, which allows a double coating of the photosensitive film by diffusing a crosslinking agent into the first photoresist film pattern so that the first photoresist pattern has resistance to the photosensitive film formed by a subsequent process. .
도 1 내지 도 6 은 본 발명에 따른 반도체소자의 감광막패턴 형성방법을 도시한 단면도.1 to 6 are cross-sectional views showing a method for forming a photosensitive film pattern of a semiconductor device according to the present invention.
< 도면의 주요부분에 대한 부호의 설명 ><Description of Symbols for Major Parts of Drawings>
11 : 반도체기판 12 : 피식각층11 semiconductor substrate 12 etching target layer
13 : 제1감광막패턴 14 : 고분자용액13: first photosensitive film pattern 14: polymer solution
15 : 가교제 16 : 경화된 제1감광막패턴15 crosslinking agent 16 cured first photosensitive film pattern
17 : 제2감광막 18 : 제2감광막패턴17 second photosensitive film 18 second photosensitive film pattern
이상의 목적을 달성하기 위하여 본 발명에 따른 반도체소자의 감광막패턴 형성방법은,In order to achieve the above object, the photosensitive film pattern forming method of a semiconductor device according to the present invention,
반도체 기판 상부에 피식각층을 형성하는 공정과,Forming an etched layer on the semiconductor substrate;
상기 피식각층 상부에 제1감광막패턴을 형성하는 공정과,Forming a first photoresist pattern on the etched layer;
전체표면 상부에 가교제가 함유된 수용성 고분자용액을 도포하는 공정과,Applying a water-soluble polymer solution containing a crosslinking agent on the entire surface;
상기 수용성 고분자용액 내의 가교제를 상기 제1감광막패턴으로 확산시키는 베이크공정과,A baking step of diffusing the crosslinking agent in the water-soluble polymer solution into the first photoresist film pattern;
상기 수용성 고분자용액을 제거하는 공정과,Removing the water-soluble polymer solution;
전체표면 상부에 패턴으로 예정되는 부분을 보호하는 제2감광막패턴을 형성하되, 상기 제2감광막패턴은 상기 제1감광막패턴을 보호하도록 형성되는 공정을 공정을 포함하는 것을 특징으로 한다.A second photoresist pattern is formed on the entire surface, and the second photoresist pattern is formed. The second photoresist pattern is formed to protect the first photoresist pattern.
이하, 첨부된 도면을 참고로 하여 본 발명에 대하여 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail with respect to the present invention.
도 1 내지 도 6 은 본 발명에 따른 반도체소자의 감광막패턴 형성방법을 도시한 단면도이다.1 to 6 are cross-sectional views showing a method of forming a photosensitive film pattern of a semiconductor device according to the present invention.
먼저, 반도체기판(11) 상부에 피식각층(12)을 형성한다. 상기 피식각층(12)은 절연막 또는 도전층 등의 박막이 사용될 수 있다.First, an etching target layer 12 is formed on the semiconductor substrate 11. The etched layer 12 may be a thin film such as an insulating film or a conductive layer.
다음, 상기 피식각층(12) 상부에 제1감광막(도시안됨)을 도포한다.Next, a first photosensitive film (not shown) is coated on the etched layer 12.
그 다음, 노광마스크를 이용하여 상기 제1감광막을 노광시킨 후 현상하여 원하는 모양의 제1감광막패턴(13)을 형성한다. (도 1 참조)Next, the first photoresist film is exposed and developed using an exposure mask to form a first photoresist pattern 13 having a desired shape. (See Figure 1)
그 다음, 전체표면 상부에 가교제(15)가 함유되어 있는 고분자 용액(14)을 도포한다. 이때, 상기 고분자용액(14)은 사진식각공정에서 일반적으로 사용되는 탑 ARC(top anti reflecting coating)막과 비슷한 수용성(water soluble) 고분자용액이고, 용매는 물이다. 상기 가교제(15)는 다중 작용기를 갖는 에테르(multi-functional ether) 또는 다중 작용기를 갖는 할로겐화 알킬 화합물(multi-functional alkyl halo compound)가 사용된다. 이때, 상기 다중 작용기를 갖는 에테르는 메틸 에테르(methyl ether) 또는 에틸 에테르(ethyl ether)가 사용되고, 다중 작용기를 갖는 할로겐화 알킬 화합물은 염화 알킬 화합물(alkyl chloro compound), 브롬화 알킬 화합물(alkyl bromo compound) 또는 요드화 알킬 화합물(alkyl iodo compound)이 사용된다. (도 2 참조)Next, a polymer solution 14 containing a crosslinking agent 15 is applied over the entire surface. In this case, the polymer solution 14 is a water soluble polymer solution similar to the top anti reflecting coating (ARC) film commonly used in the photolithography process, and the solvent is water. As the crosslinking agent 15, a multi-functional ether or a multi-functional alkyl halo compound is used. In this case, the ether having a multifunctional group is methyl ether or ethyl ether, and the halogenated alkyl compound having a multifunctional group is an alkyl chloro compound, an alkyl bromo compound. Or alkyl iodo compounds are used. (See Figure 2)
다음, 베이크공정을 실시하여 상기 고분자용액(14) 내의 가교제(15)가 상기 제1감광막패턴(13)으로 확산되도록 한다. 상기 제1감광막패턴(13)으로 가교제(15)가 확산되어 형성된 경화된 제1감광막패턴(16)은 상기 감광막패턴(13) 내의노블락(Novolac) 또는 스티렌 폴리머(stylene polymer)의 수산기(-OH)들 간의 가교(crosslink)가 이루어져 후속 공정으로 형성되는 제2감광막에 대해 저항력을 갖는다. (도 3 참조)Next, a baking process is performed to allow the crosslinking agent 15 in the polymer solution 14 to diffuse into the first photoresist layer pattern 13. The cured first photoresist pattern 16 formed by diffusion of the crosslinking agent 15 into the first photoresist pattern 13 may be a hydroxyl group (-OH) of a novolac or styrene polymer in the photoresist pattern 13. Crosslinking between the layers) is resistant to the second photosensitive film formed in a subsequent process. (See Figure 3)
그 다음, 상기 고분자용액(14)을 탈이온수(deionized water ; DI water)에 의한 현상공정으로 제거하여 경화된 제1감광막패턴(16)을 노출시킨다. (도 4 참조)Next, the polymer solution 14 is removed by a developing process using deionized water (DI water) to expose the cured first photoresist pattern 16. (See Figure 4)
다음, 전체표면 상부에 제2감광막(17)을 도포한다. (도 5 참조)Next, a second photosensitive film 17 is applied over the entire surface. (See Figure 5)
그 다음, 패턴으로 예정되는 부분을 보호하는 노광마스크를 이용하여 상기 제2감광막(17)을 노광하고 현상하여 제2감광막패턴(18)을 형성한다. 이때, 상기 제2감광막패턴(18)은 상기 제1감광막패턴(16)을 보호하도록 형성된다.Next, the second photoresist film 17 is exposed and developed using an exposure mask that protects a portion intended to be a pattern to form a second photoresist film pattern 18. In this case, the second photoresist pattern 18 is formed to protect the first photoresist pattern 16.
상기 제2감광막패턴(18) 형성 후에도 상기 제2감광막패턴(18)은 상기 경화된 제1감광막패턴(16)과 혼합되지 않는다. (도 6 참조)Even after the second photoresist pattern 18 is formed, the second photoresist pattern 18 is not mixed with the cured first photoresist pattern 16. (See Figure 6)
상기한 바와 같이 본 발명에 따르면, 반도체기판 상의 피식각층 상부에 제1감광막패턴을 형성하고, 전체표면 상부에 가교제(crosslink agent)가 함유된 수용성 고분자용액을 도포하고 베이크공정(bake process)을 실시하여 상기 수용성 고분자용액 내의 가교제를 상기 제1감광막패턴으로 확산시켜 상기 제1감광막패턴을 경화시킴으로써 후속 공정으로 형성되는 제2감광막패턴에 대한 저항성을 증가시켜 상기 제1감광막패턴이 상기 제2감광막패턴에 혼합되는 것을 방지하여 감광막의 더블 코팅 공정을 가능하게 하고 그에 따른 공정 수율 및 공정 안정성을 향상시키는 이점이 있다.As described above, according to the present invention, a first photoresist film pattern is formed on an etched layer on a semiconductor substrate, a water-soluble polymer solution containing a crosslink agent is coated on the entire surface, and a bake process is performed. By diffusing a crosslinking agent in the water-soluble polymer solution into the first photoresist pattern, thereby curing the first photoresist pattern, thereby increasing resistance to a second photoresist pattern formed in a subsequent process, thereby increasing the resistance to the second photoresist pattern. There is an advantage in that it is possible to prevent the mixing in the double coating process of the photosensitive film and thereby improve process yield and process stability.
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010029663A KR20020090686A (en) | 2001-05-29 | 2001-05-29 | Forming method for photoresist pattern of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010029663A KR20020090686A (en) | 2001-05-29 | 2001-05-29 | Forming method for photoresist pattern of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20020090686A true KR20020090686A (en) | 2002-12-05 |
Family
ID=27706874
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020010029663A KR20020090686A (en) | 2001-05-29 | 2001-05-29 | Forming method for photoresist pattern of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR20020090686A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030038370A (en) * | 2001-11-02 | 2003-05-16 | 미쓰비시덴키 가부시키가이샤 | Resist pattern hardening method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06151349A (en) * | 1992-10-30 | 1994-05-31 | Nec Corp | Manufacture of semiconductor device |
KR980011721A (en) * | 1996-07-05 | 1998-04-30 | 기따오까 다까시 | Manufacturing Method of Semiconductor Device |
KR20000001567A (en) * | 1998-06-12 | 2000-01-15 | 윤종용 | Method of forming a pattern which is capable of minimizing a size affect according to a resolution limit of photo masking process and a structure thereof |
KR20000009374A (en) * | 1998-07-23 | 2000-02-15 | 윤종용 | Fabrication method of semiconductor devices for reducing a space between pattekun |
-
2001
- 2001-05-29 KR KR1020010029663A patent/KR20020090686A/en not_active Application Discontinuation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06151349A (en) * | 1992-10-30 | 1994-05-31 | Nec Corp | Manufacture of semiconductor device |
KR980011721A (en) * | 1996-07-05 | 1998-04-30 | 기따오까 다까시 | Manufacturing Method of Semiconductor Device |
KR20000001567A (en) * | 1998-06-12 | 2000-01-15 | 윤종용 | Method of forming a pattern which is capable of minimizing a size affect according to a resolution limit of photo masking process and a structure thereof |
KR20000009374A (en) * | 1998-07-23 | 2000-02-15 | 윤종용 | Fabrication method of semiconductor devices for reducing a space between pattekun |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030038370A (en) * | 2001-11-02 | 2003-05-16 | 미쓰비시덴키 가부시키가이샤 | Resist pattern hardening method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100475080B1 (en) | Methods for forming resist pattern and fabricating semiconductor device using Si-containing water-soluble polymer | |
KR100633994B1 (en) | Well photoresist pattern of semiconductor device and method for forming the same | |
US7846623B2 (en) | Resist pattern and reflow technology | |
TWI737856B (en) | Method for lithography patterning | |
JP2008310334A (en) | Method of forming protection layer on photoresist pattern and method of forming fine pattern using the same | |
JP3242568B2 (en) | Pattern formation method | |
KR20040056112A (en) | Method of forming a dual damascene pattern in a semiconductor device | |
KR20030054175A (en) | A method for manufacturing semiconductor device using dual damascene process | |
KR20020090686A (en) | Forming method for photoresist pattern of semiconductor device | |
KR20040005472A (en) | Method of forming dual damascene pattern | |
KR100370135B1 (en) | Method for Forming Resist Double Coating | |
KR20040039594A (en) | Method of forming a photoresist pattern in a semiconductor device | |
KR20020074002A (en) | Method for manufacturing semiconductor device | |
KR20020001195A (en) | Method for forming photoresist patern in semiconductor device | |
KR20040001462A (en) | Method for forming resist pattern of semiconductor device | |
KR0179339B1 (en) | Method of forming photoresist pattern | |
KR20020043961A (en) | Manufacturing method of fine pattern for a semiconductor device | |
Smith et al. | Incorporation of direct current superposition as a means for high quality contact and slotted contact structures utilizing litho-freeze-litho-etch | |
KR20030000567A (en) | Method for manufacturing photoresist pattern of semiconductor device | |
KR100277860B1 (en) | Etching Method of Semiconductor Device | |
KR20060054681A (en) | Method of forming photoresist pattern and layer pattern | |
KR20050059787A (en) | Method for forming isolation layer using relacs technique | |
KR100281113B1 (en) | Patterning method of semiconductor device | |
KR20030049581A (en) | A method for forming mask pattern | |
KR20030042496A (en) | Method for forming a minute pattern of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |