KR20020027775A - Metal induced crystallization method of P-doped amorphous silicon - Google Patents
Metal induced crystallization method of P-doped amorphous silicon Download PDFInfo
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- 238000002425 crystallisation Methods 0.000 title claims abstract description 43
- 239000002184 metal Substances 0.000 title claims abstract description 40
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 40
- 229910021417 amorphous silicon Inorganic materials 0.000 title claims description 32
- 238000000034 method Methods 0.000 claims abstract description 31
- 230000008025 crystallization Effects 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 230000005684 electric field Effects 0.000 claims abstract description 10
- 239000011574 phosphorus Substances 0.000 claims description 16
- 229910052698 phosphorus Inorganic materials 0.000 claims description 16
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 4
- 238000010884 ion-beam technique Methods 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 239000012528 membrane Substances 0.000 claims 27
- 238000000576 coating method Methods 0.000 claims 5
- 239000011248 coating agent Substances 0.000 claims 4
- 229910017052 cobalt Inorganic materials 0.000 claims 2
- 239000010941 cobalt Substances 0.000 claims 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims 1
- 229910052801 chlorine Inorganic materials 0.000 claims 1
- 239000000460 chlorine Substances 0.000 claims 1
- 229910052731 fluorine Inorganic materials 0.000 claims 1
- 239000011737 fluorine Substances 0.000 claims 1
- 238000001465 metallisation Methods 0.000 claims 1
- 239000010409 thin film Substances 0.000 abstract description 38
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 27
- -1 phosphorous ions Chemical class 0.000 abstract description 6
- 230000001939 inductive effect Effects 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 abstract description 2
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 abstract 1
- 239000010408 film Substances 0.000 description 8
- 230000006911 nucleation Effects 0.000 description 5
- 238000010899 nucleation Methods 0.000 description 5
- 239000007790 solid phase Substances 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 229910021334 nickel silicide Inorganic materials 0.000 description 3
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 3
- 238000003917 TEM image Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000001965 increasing effect Effects 0.000 description 2
- 238000011534 incubation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000001000 micrograph Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28568—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
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Abstract
Description
다결정 실리콘은 플라즈마 화학 기상 증착에 의한 직접 다결정 실리콘을 얻는 방법과 비정질 실리콘을 증착한 후에 열처리를 하여 다결정 실리콘을 얻는 방법으로 크게 나눌 수 있다. 직접 증착인 경우 비교적 낮은 온도에서 다결정 실리콘 박막을 얻을 수 있다는 장점이 있으나, 박막의 특성이 좋지 못하다는 단점이 있다. 따라서 현재 널리 이용되는 방법은 기판 위에 비정질 실리콘 박막을 형성한 후 열처리를 통해 결정화시켜 양질의 다결정 실리콘 박막을 얻는 방법이 널리 사용되고 있다. 비정질 실리콘 박막의 결정화법은 레이저를 이용한 방법(Excimer Laser Annealing : ELA)과 열처리에 의한 고상결정화 방법(Solid Phase Crystallization : SPC)이 있다. 레이저를 이용한 결정화 방법은 레이저 빔 조사에 의해 비정질 실리콘 박막을 재결정화 시키는 방법으로 우수한 특성의 다결정 실리콘 박막을 제작할 수 있으나, 대면적 시료의 경우에 시료의 균일도에 어려움이 있고, 결정화 장비가 고가이므로 대량 생산에 많은 문제가 있다. 한편, 비정질 실리콘 박막을 600oC이상의 고온에서 장시간 ( ~20시간) 열처리하여 다결정 실리콘 박막을 제조하는 고상결정화 방법은 비교적 간단한 결정화 방법이나 높은 결정화 온도와 긴 열처리 시간이 필수적이다. 또한 결정화된 그레인(grain) 내부에 많은 결함(defect)이 있어 소자 제작에 어려움이 있다.Polycrystalline silicon can be broadly classified into a method of obtaining direct polycrystalline silicon by plasma chemical vapor deposition and a method of obtaining polycrystalline silicon by heat treatment after deposition of amorphous silicon. In the case of direct deposition, there is an advantage in that the polycrystalline silicon thin film can be obtained at a relatively low temperature, but there is a disadvantage in that the characteristics of the thin film are not good. Therefore, a widely used method is a method of obtaining an amorphous silicon thin film on a substrate and then crystallizing through heat treatment to obtain a high quality polycrystalline silicon thin film. Crystallization of the amorphous silicon thin film includes a laser method (Excimer Laser Annealing (ELA)) and a solid phase crystallization method (Solid Phase Crystallization: SPC). The crystallization method using a laser is a method of recrystallizing an amorphous silicon thin film by laser beam irradiation, but a polycrystalline silicon thin film having excellent characteristics can be manufactured. However, in the case of a large area sample, the uniformity of the sample is difficult and the crystallization equipment is expensive. There are many problems with mass production. On the other hand, the solid phase crystallization method for producing a polycrystalline silicon thin film by heat-treating the amorphous silicon thin film for a long time (~ 20 hours) at a high temperature of 600 ° C or more requires a relatively simple crystallization method, high crystallization temperature and long heat treatment time. In addition, there are many defects in the crystallized grain, which makes it difficult to manufacture the device.
이 밖에 게르마늄(Ge) 등의 불순물을 넣어 결정화를 유도하는 방법, 마이크로파(microwave)를 이용하여 박막을 결정화 시키는 방법 등이 제안되고 있으나 아직까지는 우수한 소자특성이 나오지 않고 있다.In addition, a method of inducing crystallization by adding an impurity such as germanium (Ge), a method of crystallizing a thin film using microwave (microwave), and the like have been proposed, but excellent device characteristics have not yet come out.
비정질 실리콘 박막에 금속 불순물을 첨가하는 경우, 박막의 결정화 온도는 현저히 낮아지고 결정화 시간도 줄어든다. 이는 격리된 비정질 박막에 비하여 낮은 온도에서 결정화가 일어나는데, 이는 실리콘이 금속과 접합하여 있는 경우 상대적으로 낮은 온도에서 결정화 반응이 일어나기 때문이다. 니켈 실리사이드를 이용한 비정질 실리콘의 결정화의 경우, 니켈 실리사이드의 이동에 의해서 <111> 방향의 막대모양 결정상이 성장하여( S. Y. Yoon et al., J. Appl. Phys. 82, 5865 (1997)), 이러한 막대모양의 결정성장에 의해서 박막이 결정화된다(C. Hayzelden et al., Appl. Phys. Lett. 60, 225 (1992)). 이러한 금속 유도 결정화 방법은 금속이 포함된 비정질 실리콘 박막에 전기장을 인가할 경우, 기존의 금속 유도 결정화 방법에서 요구되는 결정화 시간이 극적으로 짧아지고, 결정화 온도도 낮아진다(J. Jang et al., Nature, Vol. 395, pp. 481-483 (1998)). 일반적으로 금속 유도 결정화 방법은 금속의 양에 영향을 받는데, 금속의 양이 증가함에 따라 결정화 온도는 낮아지는 경향이 있다.When metal impurities are added to the amorphous silicon thin film, the crystallization temperature of the thin film is significantly lowered and the crystallization time is also reduced. This is because the crystallization occurs at a lower temperature than the isolated amorphous thin film because the crystallization reaction occurs at a relatively low temperature when silicon is bonded to the metal. In the case of crystallization of amorphous silicon using nickel silicide, rod-shaped crystal phases in the <111> direction grow due to the movement of nickel silicide (SY Yoon et al., J. Appl. Phys. 82, 5865 (1997)). The thin film is crystallized by rod-shaped crystal growth (C. Hayzelden et al., Appl. Phys. Lett. 60, 225 (1992)). When the electric field is applied to the amorphous silicon thin film containing the metal, the crystallization time required by the metal induced crystallization method is dramatically shortened and the crystallization temperature is also lowered (J. Jang et al., Nature). , Vol. 395, pp. 481-483 (1998). In general, metal induced crystallization methods are affected by the amount of metal, and the crystallization temperature tends to decrease as the amount of metal increases.
비정질 실리콘의 결정화에 작용하는 3가지 중요한 요소는 인큐베이션 시간(incubation time), 핵 생성율 (nucleation rate), 그레인 성장 속도 (graingrowth rate) 이다. 인큐베이션 시간이란 결정화 핵이 나타날 때까지 필요한 시간을 말하며, 핵 생성율과 그레인 성장 속도란 결정화 핵이 생성되고 성장하는 비율이 말하고 있다(M. Moniwa et al., Jpn. J. Appl. Phys. 32, 312 (1993)). 그러므로 결함이 없고, 그레인(grain)의 크기를 증가 시키기 위해서는 핵생성율은 줄어들고 그레인 성장 속도는 증가시키면 된다. 비정질 실리콘에 인을 도핑한 경우, 도핑을 하지 않은 경우와 비교해 보면 인규베이션 시간은 상대적으로 감소하고, 핵 생성율 또한 감소하여 결정화된 다결정 실리콘의 결정성을 향상시킨다.Three important factors that contribute to the crystallization of amorphous silicon are the incubation time, nucleation rate, and graingrowth rate. Incubation time refers to the time required for the crystallization nucleus to appear, while nucleation rate and grain growth rate refer to the rate at which crystallization nuclei are produced and grown (M. Moniwa et al., Jpn. J. Appl. Phys. 32, 312 (1993)). Therefore, in order to be free from defects and to increase grain size, the nucleation rate is reduced and the grain growth rate is increased. When doped with amorphous silicon, phosphorus doping is relatively reduced compared to the case of no doping, and the nucleation rate is also reduced to improve the crystallinity of the crystallized polycrystalline silicon.
전계를 이용한 금속 유도 결정화 방법을 이용하면 핵 생성율을 줄이고 그레인 성장속도를 증가시킴으로써 비정질 실리콘의 결정화 온도를 낮출 수 있다. 그러나 결정화된 다결정 실리콘의 그레인 크기에는 한계가 있다. 본 발명에서는 인이 도핑된 비정질 막을 금속유도 결정화시킬 경우에 그레인이 매우 큰 다결정 실리콘 막을 제작할 수 있다.The metal induced crystallization method using an electric field can lower the crystallization temperature of amorphous silicon by reducing the nucleation rate and increasing the grain growth rate. However, the grain size of the crystallized polycrystalline silicon is limited. In the present invention, a polycrystalline silicon film having a very large grain can be fabricated when the phosphorus-doped amorphous film is crystallized by metal induction.
도 1 는1
(a)절연기판(1) 위에 형성된 인이 도핑된 비정질 막(2) 상에 매우 얇은 금속(3)이 입혀진 형태(a) A very thin metal 3 is coated on a phosphorus-doped amorphous film 2 formed on the insulating substrate 1
(b)절연기판(1) 위에 형성된 인이 도핑된 비정질 막(2) 상에 금속을 포함한 비정질(4)이 증착된(b) an amorphous (4) containing metal is deposited on the phosphorus-doped amorphous film (2) formed on the insulating substrate (1).
형태.shape.
도 2 는 본 발명의 실시 예에 의해 절연기판(1) 위에 제작된 다결정 실리콘 박막(5).2 is a polycrystalline silicon thin film 5 fabricated on an insulating substrate 1 according to an embodiment of the present invention.
도 3는 본 발명의 실시 예에 사용된 인이 도핑된 비정질 실리콘 박막(2)의 전기전도도 특성.3 is an electrical conductivity of the phosphorus-doped amorphous silicon thin film (2) used in the embodiment of the present invention.
도 4는 본 발명의 실시 예에 의해 결정화된 도핑된 다결정 실리콘 박막(5)의 투과전자현미경 사진 : (a) 도핑이 안된 시료, (b) 인이 도핑된 시료4 is a transmission electron microscope image of a doped polycrystalline silicon thin film 5 crystallized according to an embodiment of the present invention: (a) an undoped sample, (b) a phosphorus doped sample
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
1 : 절연기판 2 : 인이 도핑된 비정질 막1 Insulation substrate 2 Amorphous film doped with phosphorus
3 : 매우 얇은 금속 층 4 : 금속이 포함된 비정질 막3: very thin metal layer 4: amorphous film containing metal
5 : 인이 도핑된 다결정 실리콘 박막5: polycrystalline silicon thin film doped with phosphorus
상기와 같은 목적을 달성하기 위한 본 발명에 따른 다결정 실리콘 박막을 얻기 위한 방법의 특징은 인 이온 도핑하여 금속 유도 결정화 방법으로 비정질 막을 결정화 하는데 있다.A feature of the method for obtaining a polycrystalline silicon thin film according to the present invention for achieving the above object is to crystallize an amorphous film by a metal induced crystallization method by phosphorus ion doping.
유리 등의 절연기판(1) 위에 인 이온을 포함된 비정질 실리콘 박막(2)을 증착한후 얇은 금속층(3)을 증착하고, 전기장을 인가한 상태에서 열처리하여 비정질 실리콘 박막을 금속 유도 결정화 한다.After depositing an amorphous silicon thin film 2 containing phosphorus ions on an insulating substrate 1 such as glass, a thin metal layer 3 is deposited and heat-treated under an electric field to metal-crystallize the amorphous silicon thin film.
도 1은 본 발명의 실시 예에 의해서 결정화되기 전 상태의 비정질 실리콘이 증착된 상태를 나태낸다. 도 1(a)는 10x10cm2크기의 인 이온1x1011~1013cm-2이 포함된 비정질 실리콘 박막(2) 상에 니켈 금속(3)을 평균적으로 5x1012~ 1014cm-2입힌 형태을 나타낸다. 이때 사용되는 금속은 플라즈마, 이온 빔, 금속 용액 등으로 증착한다. 도 1(b)는 절연기판(1) 상에 인 이온1x1011~1013cm-2이 포함된 비정질 실리콘 박막(2) 상에 금속을 평균적으로 5x1012~ 1014cm-2포함된 비정질 실리콘(4)을 증착한 형태이다.1 illustrates a state in which amorphous silicon is deposited before crystallization by an embodiment of the present invention. Figure 1 (a) is two 10x10cm size of ion 1x10 11 ~ 10 13 cm -2 on average 5x10 represents coated 12 ~ 10 14 cm -2 hyeongtaeeul the nickel on an amorphous silicon thin film 2 of metal (3) comprises of . The metal used at this time is deposited by plasma, ion beam, metal solution and the like. FIG. 1 (b) shows an amorphous silicon containing 5 × 10 12 to 10 14 cm −2 of metal on an amorphous silicon thin film 2 containing phosphorus ions 1 × 10 11 to 10 13 cm −2 on the insulating substrate 1. (4) is deposited form.
도 2는 본 발명의 실시 예에 의해서 절연기판(1) 위에 제작된 다결정 실리콘 박막(5)이다. 인 이온을 1.57x1013원자/cm2포함된 비정질 막(2) 상에 니켈 금속(3)을 평균적으로 1.9x1014cm-2증착하고 500oC에서 50V/cm의 전기장을 인가한 상태에서 30분 열처리하여 비정질 실리콘 박막(2)을 결정화한 다결정 실리콘 박막(5)을 나타낸다.2 is a polycrystalline silicon thin film 5 fabricated on an insulating substrate 1 according to an embodiment of the present invention. An average of 1.9x10 14 cm -2 of nickel metal (3) was deposited on an amorphous film 2 containing 1.57x10 13 atoms / cm 2 of phosphorus ions and 30 with an electric field of 50 V / cm applied at 500 ° C. The polycrystalline silicon thin film 5 in which the amorphous silicon thin film 2 is crystallized by minute heat treatment is shown.
도 3은 본 발명의 실시 예에 의해 P 이온 도핑된 비정질 실리콘 박막(2)의 도즈량에 따른 전기전도도 특성을 나타낸다. 전기전도도 활성화 에너지(electrical conductivity activation energy : Ea)는 비정질 실리콘(2)인 경우 0.856eV를 나타내고 있다. 도핑한 도즈량이 6.27x1013원자/cm2일 때는 0.657eV를, 8.12x1013원자/cm2일 때는 0.458eV, 8.53x1013원자/cm2도핑한 경우 0.407eV을 나타내고 있다. 도핑한 이온 도즈량이 증가할수록 비정질 실리콘(2)의 페르미 에너지 준위가 상승하므로 도핑된 비정질 실리콘(2)의 전기전도도 활성화 에너지는 감소한다.3 shows the conductivity characteristics according to the dose of the P ion-doped amorphous silicon thin film 2 according to the embodiment of the present invention. Electrical conductivity activation energy (E a ) is 0.856 eV in the case of amorphous silicon (2). The doped dose was 0.657 eV at 6.27 × 10 13 atoms / cm 2 , 0.458 eV at 8.12 × 10 13 atoms / cm 2 , and 0.407 eV at 8.53 × 10 13 atoms / cm 2 . As the doped ion dose increases, the Fermi energy level of the amorphous silicon 2 increases, so that the electrical conductivity activation energy of the doped amorphous silicon 2 decreases.
도 4는 본 발명의 실시 예에 의한 인 도핑 유무((a) 도핑 안된 시료, (b) 도핑된 시료)에 따른 다결정 실리콘 박막(5)의 투과전자현미경 사진이다. 이온 도핑된 비정질 실리콘(2)에 니켈 금속(3)을 평균적으로 3.09x1013cm-2증착하고 N2분위기에서 520oC, 3시간 동안 어닐링하였다. 도 4(a)는 도핑을 하지 않은 비정질 실리콘(2)의 결정화된 다결정 실리콘(5)의 투과전자현미경 사진으로 전형적인 금속 유도 결정화를 나타내고 있다. 비정질 실리콘(2)에 니켈 실리사이드 결정화 핵이 생성되고, 핵으로부터 막대모양의 결정상이 뻗어나와 박막 전체에 걸쳐 결정화 된다. 그러나, 도 4(b)는 7.95x1013도즈/cm2인 도핑한 비정질 실리콘(2)을 결정화 시킨 다결정 실리콘(5)으로 대략 ~18mm정도의 그레인으로 결정화 되었다. 본 발명에서 궁극적으로 추구하는 다결정 실리콘 박막(5)의 결정성 향상을 위해서는 결정화 핵의 밀도를 감소시켜야 한다. 하나의 결정화 핵으로부터 성장한 그레인이 인접한 그레인과 만나게 되면 그레인 경계면이 형성되고, 형성된 그레인 경계면은 다결정 실리콘(5)의 질(quality)을 저하시킨다. 그러므로 비정질 실리콘 박막(2)에 인(P) 이온 도핑함으로써 결정화 초기에 형성되는 결정화 핵의 밀도를 감소시켜 결정화된다결정 실리콘(5)의 결정성을 향상시킨다.4 is a transmission electron micrograph of the polycrystalline silicon thin film 5 according to the present invention with or without phosphorus doping ((a) undoped sample, (b) doped sample). An average of 3.09x10 13 cm -2 was deposited onto the ion-doped amorphous silicon 2 on an average of 3.09x10 13 cm -2 and annealed at 520 ° C for 3 hours in an N 2 atmosphere. 4 (a) shows a typical metal induced crystallization by transmission electron micrograph of the crystallized polycrystalline silicon (5) of the undoped amorphous silicon (2). Nickel silicide crystallization nuclei are formed in the amorphous silicon 2, and rod-shaped crystal phases extend from the nucleus to crystallize over the entire thin film. However, FIG. 4 (b) shows polycrystalline silicon 5 crystallized from 7.95 × 10 13 doses / cm 2 of polysilicon 5 to crystallize grains of approximately ˜18 mm. In order to improve the crystallinity of the polycrystalline silicon thin film 5 ultimately pursued by the present invention, the density of the crystallization nucleus should be reduced. When grains grown from one crystallization nucleus meet adjacent grains, grain boundaries are formed, and the grain boundaries formed deteriorate the quality of the polycrystalline silicon 5. Therefore, by doping the amorphous silicon thin film 2 with phosphorus (P) ions, the density of the crystallization nuclei formed in the early stage of crystallization is reduced to crystallize. The crystallinity of the crystalline silicon 5 is improved.
본 발명에 의한 결정화 방법은 인 이온과 전계를 인가한 금속 유도 결정화을 이용하여 결정화된 다결정 실리콘의 결정성을 향상시키고, 박막내의 잔류 금속의 양을 최소화 시킨다. 따라서 현재 사용되어 지고 있는 레이저 다결정 실리콘 박막을 대신하여 박막 트랜지스터 액정 디스플레이(TFT-LCD), 태양전지, 이미지 센서 등에 필요한 다결정 실리콘 박막으로 대체 될 수 있다. 나아가서 저온에서 제작할 수 있다는 이점으로 인해 고온 고상 결정화 방법에 의한 다결정 실리콘 박막의 대체도 가능하다.The crystallization method according to the present invention improves the crystallinity of the crystallized polycrystalline silicon using metal induced crystallization with phosphorus ions and an electric field, and minimizes the amount of residual metal in the thin film. Therefore, it can be replaced with the polycrystalline silicon thin film required for thin film transistor liquid crystal display (TFT-LCD), solar cell, image sensor, etc. instead of the laser polycrystalline silicon thin film currently used. Furthermore, due to the advantage that it can be manufactured at low temperatures, it is also possible to replace the polycrystalline silicon thin film by the high temperature solid phase crystallization method.
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Cited By (8)
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KR100425156B1 (en) * | 2001-05-25 | 2004-03-30 | 엘지.필립스 엘시디 주식회사 | Process for crystallizing amorphous silicon and its application - fabricating method of TFT-LCD |
KR100442289B1 (en) * | 2001-06-01 | 2004-07-30 | 엘지.필립스 엘시디 주식회사 | Process for crystallizing amorphous silicon and fabricating method of liquid crystal display device |
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KR100425156B1 (en) * | 2001-05-25 | 2004-03-30 | 엘지.필립스 엘시디 주식회사 | Process for crystallizing amorphous silicon and its application - fabricating method of TFT-LCD |
KR100442289B1 (en) * | 2001-06-01 | 2004-07-30 | 엘지.필립스 엘시디 주식회사 | Process for crystallizing amorphous silicon and fabricating method of liquid crystal display device |
WO2009057945A1 (en) * | 2007-10-29 | 2009-05-07 | Tg Solar Corporation | Method for manufacturing solar cell |
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KR100965778B1 (en) * | 2008-01-16 | 2010-06-24 | 서울대학교산학협력단 | Polycrystalline Silicon Solar Cell Having High Efficiency |
KR20200036955A (en) * | 2017-09-03 | 2020-04-07 | 어플라이드 머티어리얼스, 인코포레이티드 | Conformal halogen doping in 3D structures using conformal dopant film deposition |
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