KR102574250B1 - Method, program and apparatus for encoding and decoding dna data using low density parity check code - Google Patents

Abstract

A method, program, and apparatus for encoding and decoding DNA data using a low density parity check code are provided. The method includes the steps of converting specific data into a first binary vector having a predetermined first length, dividing the first binary vector into a second binary vector having a predetermined second length, and dividing the first binary vector by a predetermined first number. , aligning the first number of second binary vectors in the vertical direction, performing low density parity check (LDPC) encoding in the horizontal direction using a pre-set parity of a third length, the first number and the assigning an address value of a predetermined fourth length to each of a second number of vertically aligned second binary vectors corresponding to the sum of the third lengths, the sum of the second length and the fourth length replacing each of the vertically aligned second binary vectors having a corresponding fifth length with one DNA per 2 bits, and replacing each of the second binary vectors having a half length of the fifth length with the DNA and performing puncturing on each nucleotide sequence.
This invention is a “research conducted with the support of Samsung Electronics Future Technology Development Center”.

Description

DNA data encoding and decoding method, program and device using low density parity check code

The present invention relates to a method, program, and device for encoding and decoding DNA data using a low density parity check code.

Digital data is growing exponentially in real time. It is estimated that 175 zettabytes of data will be created in 2025. In order to process and store such increasing data, a need for a new storage device has arisen.

New storage devices require high storage densities, long storage times and low energy costs. However, existing storage devices such as magnetic tapes, hard disk drives and SDDs are not suitable for new storage devices. Accordingly, DNA is emerging as a medium for a new storage device. We call this the DNA storage unit. This is a device that stores data after replacing it with four bases A, C, G, and T.

The DNA storage device is currently one of the fields in which research is being very actively conducted. There are three different types of errors in these DNA storage devices: substitution errors, insertion errors, and deletion errors.

A substitution error is literally an error in which one of the three other bases is replaced and transmitted instead of the base that should have been originally transmitted. An insertion error is a transmission error in which an additional base is generated between bases that should be originally transmitted, and a deletion error is a transmission error in which a base originally intended to be transmitted is missing.

At this time, the length of the substitution error remains the same and an error occurs in only one base, but when an insertion/deletion error occurs, the length of the DNA changes and the position of the transmitted base is shifted one by one. Therefore, compared to substitution errors, insertion/deletion errors act as very fatal errors in storing and reading data in DNA storage devices. In order to protect the DNA storage device from these errors and to perfectly store and read data, an error correction code must be applied to the DNA storage device.

In addition, the error rate of DNA storage devices is greatly affected by the biochemical structure of DNA. In the process of synthesizing, storing and reading DNA, there are two biggest limitations. It is known that a lot of errors occur when the ratio of G and C in DNA is far from 50%, and a lot of errors occur when the same base sequence is repeated several times in succession. Therefore, satisfying these two biochemical characteristics can help reduce errors in DNA storage devices.

Registered Patent Publication No. 10-1529360, 2015.06.10.

An object to be solved by the present invention is to provide a method, program, and apparatus for encoding and decoding DNA data using a low density parity check code.

The problems to be solved by the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

A DNA data encoding and decoding method using a low density parity check code performed by an apparatus according to an aspect of the present invention for solving the above problems includes the steps of converting specific data into a first binary vector having a predetermined first length. , Dividing the first binary vector into second binary vectors having a predetermined second length by a predetermined first number, arranging the second binary vectors of the first number in the vertical direction, and Performing LDPC (low density parity check) encoding in the horizontal direction using parity of length 3, second binary numbers aligned in the vertical direction of the second number corresponding to the sum of the first number and the third length Assigning an address value of a preset fourth length to each vector, each of the second binary vectors aligned in the vertical direction having a fifth length corresponding to the sum of the second length and the fourth length by 2 bits ( replacing with one DNA per bit) and performing puncturing on each of the second number of nucleotide sequences that are substituted with the DNA and are half the length of the fifth length.

In the present invention, the method may further include randomizing the long binary number vector through an XOR operation using a random number before dividing the first binary number vector by the first number of the second binary number vectors. there is.

In the present invention, the address value designation step includes calculating the number of address values necessary for encoding, encoding each of the calculated address values by applying a Reed-Solomon (RS) code, and encoding the encoded address. A step of assigning each value to each of the second binary vectors aligned in the vertical direction in order may be included.

In the present invention, in the step of calculating the number of address values, the number corresponding to the number of cases in which a plurality of bits at a specific position are different bases among the total number of cases based on the number of bits of the address value is calculated as the address value. can be calculated as the number of

In the present invention, the address value may include even parity.

In the present invention, in the substitution step, the 2 bits are replaced with one of Adenine (A), Guanine (G), Cytosine (C), and Thymine (T) according to the number of 0s and 1s. It can be.

In the present invention, in the puncturing step, the ratio of guanine (G, Guanine) and cytosine (C, Cytosine) among the base sequences of the second number is the same as that of a base sequence in which the difference from the reference ratio is greater than a preset value. Perforation may be performed on a nucleotide sequence in which a base is repeated a predetermined number of times or more.

In the present invention, the method includes the steps of extracting N base sequences from among the encoded second number of base sequences and performing first LDPC decoding and second LDPC decoding (where N is a natural number) and the decrypted result based on the sequence, further comprising integrating the second binary vectors of the first number into the first binary vectors of the first length according to the order of the designated address values, wherein the N base sequences are different from each other or at least two is the same, and when the N base sequences are different from each other, N is less than or equal to the second number, and when at least two of the N base sequences are identical, N may be greater than the second number. .

In the present invention, the first LDPC decoding and the second LDPC decoding steps include performing RS decoding and even parity decoding on the address values of each of the extracted N base sequences, and the same address according to the decrypted result. Grouping nucleotide sequences having values, removing address values from the grouped nucleotide sequences and replacing them with binary vectors, log likelihood ratios for each of the substituted binary vectors according to the presence or absence of nucleotide sequences in the address values. Calculating (LLR, Log-Likelihood Ratio), arranging the calculated log-likelihood ratios in the vertical direction according to the order of the address values, and arranging the log-likelihood ratios arranged in the vertical direction in the horizontal direction to obtain a first LDPC The method may include performing decoding, performing second LDPC decoding based on the first LDPC decoding result, and determining whether the final decoding succeeds based on the second LDPC decoding result. .

In the present invention, the first LDPC decoding step may include calculating the number of changed bits before and after performing the first LDPC decoding for each base sequence corresponding to each address value, and a base sequence in which the number of changed bits is equal to or greater than a predetermined number and initializing the log-likelihood ratio to 0 for , wherein the performing of the second LDPC decoding determines that second LDPC decoding is performed only on the horizontal LPDC codewords for which the first LDPC decoding fails, The step of determining whether the final decoding is successful is whether the final decoding is successful or not through a parity check matrix for all the first LDPC-decoded base sequences and all the first LDPC-decoded and second LDPC-decoded base sequences can judge

In the present invention, when it is determined that the final decoding has failed, the process of additionally extracting N base sequences from among the encoded second number of base sequences and performing first LDPC decoding and second LDPC decoding is repeated. can

In the present invention, the log-likelihood ratio (LLR, Log-Likelihood Ratio) can be calculated using the following equation.

Here, K ₀ is the number of 0s at the same position within the same cluster, K ₁ is the number of 1s at the same position within the same cluster, is the preset parameter value

DNA data encoding and decoding apparatus using a low density parity check code according to another aspect of the present invention for solving the above problems stores a communication unit and at least one process for encoding and decoding DNA data using the low density parity check code. and a processor that operates according to the memory and the process, wherein the processor converts specific data into a first binary number vector having a predetermined first length based on the process, and converts the first binary number vector into a base Divided into second binary vectors of a set second length, divided by a set first number, aligning the first number of second binary vectors in the vertical direction, and horizontally using parity of a set third length LDPC (low density parity check) encoding is performed, and an address value of a fourth length preset in each of the second binary number vectors vertically aligned with the second number corresponding to the sum of the first number and the third length , and each of the second binary vectors aligned in the vertical direction having a fifth length corresponding to the sum of the second length and the fourth length is substituted with one DNA per 2 bits, and the DNA substituted with to perform puncturing on each of the second number of nucleotide sequences having a half length of the fifth length.

In the present invention, the processor may randomize the long binary vector through an XOR operation using a random number before dividing the first binary vector by the first number of the second binary vector.

In the present invention, when designating the address value, the processor calculates the number of address values necessary for encoding, applies a Reed-Solomon (RS) code to each of the calculated address values, and encodes them. Each address value may be sequentially assigned to each of the second binary vectors aligned in the vertical direction.

In the present invention, when calculating the number of address values, the processor calculates the number corresponding to the number of cases where a plurality of bits at a specific position are different bases among the total number of cases based on the number of bits of the address value. It can be calculated by the number of address values.

In the present invention, the address value may include even parity.

In the present invention, the processor, during the substitution, adenine (A, Adenine), guanine (G, Guanine), cytosine (C, Cytosine) and thymine (T, Thymine) can be substituted with one of them.

In the present invention, the processor, when performing the perforation, among the base sequences of the second number, the ratio of guanine (G, Guanine) and cytosine (C, Cytosine) is a base whose difference from the reference ratio is greater than a predetermined value. Perforation may be performed on a nucleotide sequence in which the same base as the sequence is repeated a predetermined number of times or more.

In the present invention, the processor performs first LDPC decoding and second LDPC decoding by extracting N base sequences from among the encoded second number of base sequences (where N is a natural number), and based on the decoded result So, the second binary vector of the first number is integrated into the first binary vector of the first length according to the order of the designated address values, the N base sequences are different from each other or at least two are the same, and the N When the number of nucleotide sequences are different from each other, N may be less than or equal to the second number, and when at least two of the N number of nucleotide sequences are identical, N may be greater than the second number.

In the present invention, the processor, when performing the first LDPC decoding and the second LDPC decoding, performs RS decoding and even parity decoding on the address value of each of the extracted N base sequences, and according to the decrypted result Base sequences having the same address value are grouped, address values are removed from the grouped base sequences, and then replaced with binary vectors, and the log likelihood ratio for each of the replaced binary vectors is determined according to whether base sequences exist in the address values. Calculate (LLR, Log-Likelihood Ratio), sort the calculated log-likelihood ratios in the vertical direction according to the order of the address values, and perform first LDPC decoding on the log-likelihood ratios sorted in the vertical direction in the horizontal direction and, based on the result of the first LDPC decoding, second LDPC decoding may be performed, and based on the result of the second LDPC decoding, whether the final decoding is successful or not may be determined.

In the present invention, when performing the first LDPC decoding, the processor calculates the number of changed bits before and after the first LDPC decoding is performed for each base sequence corresponding to each address value, and the number of changed bits is greater than or equal to a preset number. The log-likelihood ratio for the base sequence is initialized to 0, and when the second LDPC decoding is performed, it is determined that the second LDPC decoding is performed only on the horizontal LPDC codeword for which the first LDPC decoding fails, and the final decoding When determining the success of the first LDPC decryption, success of final decoding can be determined through a parity check matrix for all base sequences decoded by the first LDPC and all base sequences decoded by the first LDPC and decoded second LDPC. .

In the present invention, when it is determined that the final decoding has failed, the processor additionally extracts N base sequences from among the encoded second number of base sequences to perform first LDPC decoding and second LDPC decoding The process can be repeated.

In the present invention, the log-likelihood ratio (LLR, Log-Likelihood Ratio) can be calculated using the following equation.

Here, K ₀ is the number of 0s at the same position within the same cluster, K ₁ is the number of 1s at the same position within the same cluster, is the preset parameter value

In addition to this, another method for implementing the present invention, another system, and a computer readable recording medium recording a computer program for executing the method may be further provided.

According to the present invention, the ratio of G and C and the number of consecutive bases of the finally generated base sequences are checked, except for base sequences having biochemical characteristics that cause three types of errors in the DNA storage device. Thus, base sequences that do not satisfy the standard conditions can be excluded. Accordingly, it is possible to reduce the possibility of errors occurring during data decoding and to restore data with higher accuracy.

The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description below.

1 is a schematic block diagram of a DNA data encoding and decoding apparatus using a low density parity check code according to the present invention.
2 is a flowchart of a DNA data encoding method using a low density parity check code according to the present invention.
3 is a diagram for explaining DNA data encoding according to the present invention.
4 is a diagram for explaining an address value according to the present invention.
5 is a diagram for explaining the substitution of 2 bits with a base according to the present invention.
6 is a flowchart of a DNA data decoding method using a low density parity check code according to the present invention.
7 is a flowchart of a specific method of step S210 of FIG. 6 .

Advantages and features of the present invention, and methods of achieving them, will become clear with reference to the detailed description of the following embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms, only these embodiments are intended to complete the disclosure of the present invention, and are common in the art to which the present invention belongs. It is provided to fully inform the person skilled in the art of the scope of the invention, and the invention is only defined by the scope of the claims.

Terminology used herein is for describing the embodiments and is not intended to limit the present invention. In this specification, singular forms also include plural forms unless specifically stated otherwise in a phrase. As used herein, "comprises" and/or "comprising" does not exclude the presence or addition of one or more other elements other than the recited elements. Like reference numerals throughout the specification refer to like elements, and “and/or” includes each and every combination of one or more of the recited elements. Although "first", "second", etc. are used to describe various components, these components are not limited by these terms, of course. These terms are only used to distinguish one component from another. Accordingly, it goes without saying that the first element mentioned below may also be the second element within the technical spirit of the present invention.

Unless otherwise defined, all terms (including technical and scientific terms) used in this specification may be used with meanings commonly understood by those skilled in the art to which the present invention belongs. In addition, terms defined in commonly used dictionaries are not interpreted ideally or excessively unless explicitly specifically defined.

The spatially relative terms "below", "beneath", "lower", "above", "upper", etc. It can be used to easily describe a component's correlation with other components. Spatially relative terms should be understood as including different orientations of elements in use or operation in addition to the orientations shown in the drawings. For example, if you flip a component that is shown in a drawing, a component described as "below" or "beneath" another component will be placed "above" the other component. can Thus, the exemplary term “below” may include directions of both below and above. Components may also be oriented in other orientations, and thus spatially relative terms may be interpreted according to orientation.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Prior to the description, the meaning of the terms used in this specification will be briefly described. However, it should be noted that the description of terms is intended to help the understanding of the present specification, and is not used in the sense of limiting the technical spirit of the present invention unless explicitly described as limiting the present invention.

In this specification, 'device' includes all various devices capable of providing results to users by performing calculation processing. For example, the devices may be in the form of computers and mobile terminals. The computer may be in the form of a server receiving a request from a client and processing information. Also, a computer may correspond to a sequencing device that performs sequencing. The mobile terminal includes a mobile phone, a smart phone, a personal digital assistants (PDA), a portable multimedia player (PMP), a navigation device, a notebook PC, a slate PC, a tablet PC, and an ultrabook. ), a wearable device (eg, a watch type terminal (smartwatch), a glass type terminal (smart glass), a head mounted display (HMD)), and the like may be included.

In the present specification, 'oligo' or 'oligo read' refers to a polymer synthesized from a plurality of nucleotide units including a specific base (adenine, guanine, cytosine or thymine).

In the present specification, 'sequence' refers to a base sequence read by sequentially reading (sequencing) a specific oligo lead. In the present specification, 'sequence' and 'oligo lead' may be used interchangeably. For example, 'stitched sequence' may specifically mean 'sequence of stitched oligo leads'.

1 is a schematic block diagram of a DNA data encoding and decoding apparatus using a low density parity check code according to the present invention.

2 is a flowchart of a DNA data encoding method using a low density parity check code according to the present invention.

3 is a diagram for explaining DNA data encoding according to the present invention.

4 is a diagram for explaining an address value according to the present invention.

5 is a diagram for explaining the substitution of 2 bits with a base according to the present invention.

6 is a flowchart of a DNA data decoding method using a low density parity check code according to the present invention.

7 is a flowchart of a specific method of step S210 of FIG. 6 .

Hereinafter, referring to FIG. 1, a DNA data encoding and decoding apparatus 10 using a low density parity check code according to the present invention will be described.

When a specific data file is input from an external device (not shown), the device 10 according to the present invention can express it as one long binary number vector, encode it by replacing it with four bases, and store it.

When restoration of specific encoded data is requested from an external device (not shown), the device 10 according to the present invention decodes the data stored in the nucleotide sequence into a binary number vector, decodes it again in the form of input data, and provides it. there is.

In this case, in encoding and decoding data, the apparatus 10 may increase the accuracy of restored data by using a low density parity check (LDPC).

The device 10 according to the present invention may be a DNA storage device that stores data by replacing it with DNA.

The device 10 may include all of various devices capable of providing results to users by performing calculation processing.

Here, the device 10 may be in the form of a computer. More specifically, the computer may include all of various devices capable of providing results to users by performing calculation processing.

For example, a computer includes not only a desktop PC and a notebook (Note Book) but also a smart phone, a tablet PC, a cellular phone, a PCS phone (Personal Communication Service phone), synchronous/asynchronous A mobile terminal of IMT-2000 (International Mobile Telecommunication-2000), a Palm Personal Computer (Palm PC), and a Personal Digital Assistant (PDA) may also be applicable. In addition, when a Head Mounted Display (HMD) device includes a computing function, the HMD device may become a computer.

In addition, the computer may correspond to a server that receives a request from a client and performs information processing.

Also, the device 10 may include a communication unit 12 , a memory 14 and a processor 16 . Here, the device 10 may include fewer or more components than those shown in FIG. 1 .

The communication unit 12 is one that enables wireless communication between the device 10 and an external device (not shown), between the device 10 and an external server (not shown), or between the device 10 and a communication network (not shown). It may contain more than one module.

Here, a communication network (not shown) may transmit and receive various information between the device 10, an external device (not shown), and an external server (not shown). Various types of communication networks may be used as the communication network, for example, wireless communication methods such as WLAN (Wireless LAN), Wi-Fi, Wibro, Wimax, and HSDPA (High Speed Downlink Packet Access) Alternatively, a wired communication method such as Ethernet, xDSL (ADSL, VDSL), HFC (Hybrid Fiber Coax), FTTC (Fiber to The Curb), FTTH (Fiber To The Home) may be used.

On the other hand, the communication network (not shown) is not limited to the communication methods presented above, and may include all other types of communication methods that are widely known or will be developed in the future in addition to the above-described communication methods.

Communication unit 12 may include one or more modules that connect device 10 to one or more networks.

Memory 14 may store data supporting various functions of device 10 . The memory 14 may store a plurality of application programs (application programs or applications) running in the device 10 , data for operation of the device 10 , and commands. At least some of these applications may exist for basic functions of the device 10 . Meanwhile, the application program may be stored in the memory 14, installed on the device 10, and driven by the processor 16 to perform an operation (or function) of the device 10.

The processor 16 may control general operations of the device 10 in addition to operations related to the application program. The processor 16 may provide or process appropriate information or functions to a user by processing signals, data, information, etc. input or output through the components described above or by driving an application program stored in the memory 14.

In addition, the processor 16 may control at least some of the components discussed in conjunction with FIG. 1 in order to drive an application program stored in the memory 14 . Furthermore, the processor 16 may combine and operate at least two or more of the components included in the device 10 to drive the application program.

Hereinafter, with reference to FIGS. 2 to 5, a method of encoding DNA data using a low density parity check code by the processor 16 will be described. Here, the operation of the processor 16 may be performed by the device 10 .

Referring to FIG. 2 , the processor 16 may convert specific data into a first binary vector having a preset first length (S110).

Next, the processor 16 divides the first binary vector into a second binary vector having a preset second length, and divides the first binary vector by a preset first number (S120).

Next, the processor 16 may vertically align the first number of second binary vectors (S130).

Next, the processor 16 may perform low density parity check (LDPC) encoding in the horizontal direction using a parity having a preset third length (S140).

Next, the processor 16 may designate an address value of a preset fourth length to each of second binary number vectors aligned in the vertical direction of a second number corresponding to the sum of the first number and the third length. (S150).

Next, the processor 16 replaces each of the vertically aligned second binary vectors having a fifth length corresponding to the sum of the second length and the fourth length with one DNA per 2 bits. It can (S160).

Next, the processor 16 may perform puncturing on each of the base sequences of the second number, each of which is half the length of the fifth length by being substituted with the DNA (S170).

In step S110, specific data may be a data file requested to be encoded.

As described above, the processor 16 expresses the specific data file as one long binary number vector of the first length, and then divides it into several short length binary number vectors again in step S120.

However, at this time, in the last stage of encoding, 2 bits of data are replaced with one base, and the data has the two biochemical characteristics mentioned above (the ratio of G and C in DNA is not far from 50%, and the same base sequence is not repeated several times in succession). Accordingly, in the present invention, before step S120, a random number may be generated to randomize data through an XOR operation. More specifically, the present invention may further include randomizing the long binary number vector through an XOR operation using a random number before dividing the first binary number vector by the first number of the second binary number vectors.

After randomization, the processor 16 may divide the long binary vector of the first length by the first number (K _LDPC ) of short binary vector vectors of the second length (n _payload ) in step S120. That is, the first length may correspond to a value obtained by multiplying the second length (n _payload ) and the first number (K _LDPC ). For example, the second length (n _payload ) may be set to 272 bits, and the first number (K _LDPC ) may be set to 16,572.

In step S130, 16,572 binary vectors each having a length of 272 bits may be vertically aligned as shown in the blue block shown in FIG. 3 . The reason why several binary vectors having the same length are vertically aligned is that the cost of synthesizing DNA is very expensive if the length is too long.

Thereafter, the processor 16 protects errors during encoding and decoding by using low density parity check (LDPC), which is currently the most widely used among error correction codes and has good performance, for the data aligned in the vertical direction. can do.

In this case, encoding of the LDPC code may be performed in a horizontal direction. Like the green block shown in FIG. 3 , a parity having a length of a third length (M _LDPC ), eg, 1,860 bits, is formed, and each code may be expressed in a horizontal direction.

Accordingly, as shown in FIG. 3, the second number corresponding to the value obtained by adding the number of blue blocks corresponding to the first number and the number of green blocks corresponding to the third length (N _LDPC = K _LDPC + M _LDPC ), a binary vector of . In this case, the length of the second number (N _LDPC = K _LDPC +M _LDPC ) binary number vector may be the second length (n _payload ), for example, 272 bits.

At this time, as described above, in the DNA storage device, insertion/deletion errors are more fatal than substitution errors. Even if one insertion/deletion error occurs, data to be restored as a whole may be damaged because the position of the data is shifted one by one. Therefore, as in the present invention, even if an insertion/deletion error occurs in vertically aligned data by making the data arrangement direction and the encoding direction vertical, it is regarded as one bit error from the point of view of the horizontal direction code, so insertion/deletion error Encoding can be performed in a very powerful way.

After applying the error correction code to the data through encoding of the LDPC code in this way, the order of data and parity in each vertical direction must be known so that decoding can proceed later, the addresses are assigned in the order of each data. In order to designate each address of a total of N _LDPC vertical data, at least The address value of is required. for example, address is required. If the numbers from 0 to 18,432 are converted into binary numbers, they can be expressed as shown in FIG.

At this time, finally, 2 bits are substituted with bases of A, C, G, and T, respectively. In this case, the length of consecutive bases may appear long. However, in the process of synthesizing, storing, and reading DNA as described above, if several nucleotide sequences are continuously repeated, many errors may occur. Therefore, if the binary number is substituted with a base by specifying the address value as described above, since the same base may be repeated several times, replacing a number from 0 to N _LDPC with a binary number and writing it as an address value may cause a lot of errors. .

Therefore, in the present invention, in step S150, the processor 16 calculates the number of address values necessary for encoding, applies RS (Reed-Solomon) codes to each of the calculated address values, and encodes them. Each address value may be sequentially assigned to each of the second binary vectors aligned in the vertical direction.

At this time, in calculating the number of address values, the processor 16 calculates the number corresponding to the number of cases in which a plurality of bits at a specific position are different bases among the total number of cases based on the number of bits of the address value. It can be calculated by the number of address values.

A case in which N _LDPC is 18,432 and k _index is 15 will be described as an example. For convenience, when 15 bits are 8 nt (x ₁ , x ₂ , x ₃ , x ₄ , x ₅ , x ₆ , x ₇ , x ₈ ), in order not to exceed 3 consecutive bases, x ₃ , x ₄ , and x ₆ , x ₇ must be different bases. There are a total of 9/16 of these cases. If this is converted into binary numbers, 2 ¹⁵ x9/16 = 18,432 address values among a total of 2 ¹⁵ possible address value candidates can be calculated. Using the 18,432 address values calculated in this way, address values in which the number of consecutive bases exists only up to 3 can be obtained. Through this, it is possible to reduce the possibility of errors by limiting the number of consecutive bases.

In addition, since the order is changed when an error occurs in the address value, an error correction code can be applied to the address value as well. Specifically, it may be coded by applying a Reed-Solomon (RS) code. At this time, the shortened RS code in GF (2 ^m ) By applying, the total length n _index bits = symbol, address value length k _index bit = symbol, minimum hamming distance d _min , symbol error correction; +1 Even symbol errors can be found.

For example, if m = 4, n _index = 32, k _index = 16, since the address value actually needed is 15 bits, the remaining 1 bit among 16 bits is given an even parity to avoid 1 bit error. can help you find it. Therefore, the encoded address value is 32 bits in total. The address values created in this way are sequentially appended to the randomized data, and vectors having a length of 4th length + 2nd length (n _index +n _payload ) bits are generated as many as the second number (N _LDPC ).

And when substituted with one base per 2 bits, the final length N _LDPC nucleotide sequences of nt are generated. For example, when n _index is 32 and n _payload is 272, N _LDPC sequences of 152 nt may be generated.

In step S160, the 2 bits may be substituted with one of adenine (A), guanine (G), cytosine (C), and thymine (T) according to the number of 0's and 1's. Referring to FIG. 5, if 2 bits are 00, they can be substituted with A, if 01, they can be substituted with C, if 10, they can be substituted with G, and if 11, they can be substituted with T.

In step S170, the processor 16 determines that, among the base sequences of the second number, the ratio of guanine (G) and cytosine (C) is identical to the base sequence in which the difference from the reference ratio is greater than a preset value. Perforation may be performed on a nucleotide sequence in which is repeated a predetermined number of times or more.

Specifically, when the difference in the ratio of G and C among the N _LDPC nucleotide sequences finally generated on the basis of 50 percent is greater than a preset value, for example, 30 (i.e., the ratio of G and C is 80 percent or more, 20% or less), perforation may be performed on the corresponding nucleotide sequence. In addition, when a specific base is repeated a predetermined number of times, for example, 4 or more times among the finally generated N _LDPC base sequences, perforation may be performed on the corresponding base sequence.

By checking the ratio of G and C of the finally generated base sequences and the number of consecutive bases, it is possible to find and remove specific base sequences that deviate greatly from a preset standard. Since these nucleotide sequences increase the error rate in data restoration, it is necessary to remove them. In addition, since the present invention uses the LDPC code for encoding, it is possible to exclude base sequences having biochemical properties that cause errors by not synthesizing specific oligo sequences through base sequence puncturing.

Hereinafter, with reference to FIGS. 6 and 7, a method for the processor 16 to decode DNA data using a low density parity check code will be described. Here, the operation of the processor 16 may be performed by the device 10 .

Referring to FIG. 6 , the processor 16 may perform first LDPC decoding and second LDPC decoding by extracting N base sequences from among the encoded second number of base sequences (S210). Here, N may be a natural number.

The N base sequences may be different from each other or at least two may be the same. For example, assuming that 4 base sequences are extracted, the 4 base sequences may be different, such as AT, AC, TG, and CG, or two bases out of four, such as AT, AC, CG, and CG. Arrays may overlap.

In this case, when the N base sequences are different from each other, the N number may be less than or equal to the second number.

When at least two of the N nucleotide sequences are the same, N may be smaller or larger than the second number, or may be equal to the second number. That is, when N base sequences are extracted from among the second number of base sequences, and at this time, when a specific base sequence is extracted overlapping, the number of N base sequences extracted according to the number of overlapping base sequences is less than the second number of base sequences. There may be many, or both may be the same.

Referring to FIG. 7 , in step S210, the processor 16 may perform RS decoding and even parity decoding on the address values of each of the extracted N base sequences (S211).

Next, the processor 16 may group base sequences having the same address value according to the decryption result (S212).

In the decoding process, the stored DNA sequences must be completely restored to the original data without errors.

To do so, first, coded DNA base sequences stored in the device 10 may be randomly extracted and read. At this time, the length of the read nucleotide sequences Only nucleotide sequences of nt are left. First, the address values of the randomly extracted DNA nucleotide sequences of the same length are searched. Front n _index bit of base sequence = RS code decoding can be performed by checking nt. At this time, if decoding fails, a specific nucleotide sequence is discarded, and it can be checked whether the nucleotide sequence corresponds to N _LDPC address values. With the method described in the encoding process, it is possible to accurately find address values of N _LDPC branches even in the decoding process. Therefore, if it does not correspond to N _LDPC address values, the corresponding data is discarded because it is not encoded data. If it corresponds to the address values of N _LDPC branches, even parity is finally checked, and if it is not satisfied, the corresponding data is discarded. Then, the remaining DNA sequences are gathered together with the same address value, and the data of the empty address value is left.

Next, the processor 16 may remove the address value from the grouped nucleotide sequence and replace it with a binary vector (S213).

Next, the processor 16 may calculate a log-likelihood ratio (LLR) for each of the permuted binary vectors according to whether a nucleotide sequence exists in the address value (S214).

Next, the processor 16 may vertically arrange the calculated log-likelihood ratios according to the order of the address values (S215).

Next, the processor 16 may perform first LDPC decoding on the log likelihood ratios aligned in the vertical direction in the horizontal direction (S216).

Next, the processor 16 may perform second LDPC decoding based on the result of the first LDPC decoding (S217).

Next, the processor 16 may determine whether the final decoding is successful based on the result of the second LDPC decoding (S218).

According to embodiments of the present invention, hard-decision decoding and soft-decision decoding of codes of LDPC codes may be used.

In the case of using the hard decision decoding method, base sequences having the same address value are collected through the decrypted address value, address values are removed from the base sequences gathered from the first address value, and then the table shown in FIG. 5 is used. can be converted into binary numbers. At this time, if there is no nucleotide sequence gathered in the address value, it is left as an empty space, and if there is even one nucleotide sequence in the address value, a representative value is designated with a higher value among 0 or 1 for each position, and one for all address values. It is possible to select only the nucleotide sequence.

In the case of using the soft decision decoding method, a log-likelihood ratio (LLR) can be calculated for each bit of a base sequence for all address values.

In step S214, the log-likelihood ratio (LLR) may be calculated using Equation 1 below.

Here, K ₀ is the number of 0s at the same position within the same cluster, K ₁ is the number of 1s at the same position within the same cluster, may be a preset parameter value.

As described above, base sequences having the same address value are grouped through the decoded address value, address values are removed from the base sequences gathered from the first address value, and then replaced with binary numbers using the table shown in FIG. 5 can do. At this time, if there is no nucleotide sequence gathered in the address value, all log likelihood ratios may be designated as 0. If there is even one nucleotide sequence in the address value, the number of 0's and 1's at each position are counted for the substituted binary vectors, and they are called k ₀ and k ₁ , respectively. At this time, since only base sequences of the same length were used in the previous step, the lengths of the binary vectors are all the same. k ₀ , k ₁ and experimental values = 0.04 is used to calculate [Equation 1]. As a result, the log-likelihood ratio can be obtained for each position of the nucleotide sequence of all address values. The log-likelihood ratios are arranged in the vertical direction in the order of address values, and the horizontal direction becomes the LDPC code. Accordingly, if an LDPC code n _payload having a length of N _LDPC is finally derived and n _payload codes are completely decoded without errors, it can be said that the entire decoding is successful.

According to an embodiment of the present invention, soft decision decoding may be performed on all n _payload codes of length N _LDPC .

In step S216, the processor 16 calculates the number of changed bits before and after performing the first LDPC decoding for each base sequence corresponding to each address value, and calculates the log likelihood for the base sequence in which the number of changed bits is equal to or greater than a preset number. You can initialize the ratio to 0.

In step S217, the processor 16 may perform second LDPC decoding only on the horizontal LPDC codewords for which the first LDPC decoding fails.

In step S218, the processor 16 determines whether final decoding is successful through parity check matrices for all the first LDPC-decoded base sequences and all the first LDPC-decoded and second LDPC-decoded base sequences. can

More specifically, after performing all soft decision decoding on n _payload codes, it is possible to determine how many bits have been corrected by comparing before and after decoding for each of the N _LDPC positions. In other words, there are n _payload bits in each of the N _LDPC locations and address values, and the number of changed bits after decoding among the n _payload bits is calculated. The reason for calculating the number of changed bits in this way is that if the number of changed bits is large, the base sequence can be considered an array with many errors, and if there are many errors, it is a binary vector that adversely affects other positions in the soft decision decoding process as a whole. because it is highly probable. Therefore, if a value of δ is set for each position and more than δ bits of up to n _payload bits are changed, there is a high possibility of adversely affecting decoding, so the log likelihood of the binary vector consisting of the vertical of the position You can initialize the ratio to 0. After initializing all of the vertical binary vectors in which more bits than a predetermined value of δ have been changed, only codes that have failed to be decoded in the first soft decision decoding (first LDPC decoding) are decoded again (second LDPC decoding). At this time, success or failure of final decoding is checked through the parity check matrix of the LDPC code. Codes that succeeded in the first decoding use the successful values as they are.

Also, according to an embodiment of the present invention, the processor 16 may obtain an editing distance of base sequences before and after decoding for the same address value in the first LDPC decoding. Here, the editing distance is a value indicating similarity between two nucleotide sequences, and may indicate the number of substitution, insertion, and deletion errors. Therefore, if the Hamming distance is greater than the editing distance, it can be inferred that an insertion/deletion error existed in the existing base sequence, and the insertion/deletion error can be determined using the editing distance and the location thereof can be found. .

Next, the processor 16 may combine the second binary vectors of the first number into a first binary vector of the first length according to the order of the designated address values, based on the decoded result (S220). ).

As described above, when the first LDPC decoding and the first LDPC decoding are both completed, if even one code does not pass the parity check matrix, it may be determined that decoding has failed.

On the other hand, when both the first LDPC decoding and the first LDPC decoding are completed and all codes pass through the parity check matrix, the second binary vectors in the vertical direction are integrated into one long vector (first binary vector) can do. Since one long vector is the result of XORing the original data with a random number, the original data can be restored by XORing the decoding result with the same random number array again. At this time, if the restored data matches the existing data, it may be determined that the data storage and restoration using the device 10 is successful.

Meanwhile, in step S218, when it is determined that the final decoding has failed, the processor 16 additionally extracts N base sequences from among the encoded second number of base sequences to perform first LDPC decoding and second LDPC decoding The process of performing can be repeated.

Although FIGS. 2, 6, and 7 describe steps S110 to S218 as being sequentially executed, this is merely an example of the technical idea of the present embodiment, and the common knowledge in the art to which this embodiment belongs Those who have various modifications and variations by changing and executing the order described in FIGS. 2, 6 and 7 or executing one or more steps of steps S110 to S218 in parallel to the extent that does not deviate from the essential characteristics of the present embodiment. 2, 6 and 7 are not limited to a time-series order.

The method according to an embodiment of the present invention described above may be implemented as a program (or application) to be executed in combination with a computer, which is hardware, and stored in a medium. Here, the computer may be the device 10 described above.

The aforementioned program is C, C++, JAVA, machine language, etc. It may include a code coded in a computer language of. These codes may include functional codes related to functions defining necessary functions for executing the methods, and include control codes related to execution procedures necessary for the processor of the computer to execute the functions according to a predetermined procedure. can do. In addition, these codes may further include memory reference related codes for which location (address address) of the computer's internal or external memory should be referenced for additional information or media required for the computer's processor to execute the functions. there is. In addition, when the processor of the computer needs to communicate with any other remote computer or server in order to execute the functions, the code uses the computer's communication module to determine how to communicate with any other remote computer or server. It may further include communication-related codes for whether to communicate, what kind of information or media to transmit/receive during communication, and the like.

Steps of a method or algorithm described in connection with an embodiment of the present invention may be implemented directly in hardware, implemented in a software module executed by hardware, or implemented by a combination thereof. A software module may include random access memory (RAM), read only memory (ROM), erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, hard disk, removable disk, CD-ROM, or It may reside in any form of computer readable recording medium well known in the art to which the present invention pertains.

Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art to which the present invention pertains can be implemented in other specific forms without changing the technical spirit or essential features of the present invention. you will be able to understand Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

10: device
12: Communication department
14: memory
16: processor

Claims (25)

In the DNA data encoding and decoding method using the low density parity check code performed by the device,
Converting specific data into a first binary vector having a first predetermined length (bit);
Dividing the first binary vector into a second binary vector of a preset number of bits and a preset second length (bit);
aligning the first number of second binary vectors in a vertical direction;
performing LDPC encoding on the second binary vector in a horizontal direction using parity of a preset third length (bit);
assigning an address value of a preset fourth length (bit) to each of a second binary vector of a second number corresponding to the sum of the first number and the third length;
Each of the vertically aligned second binary vectors of a fifth length (bit) corresponding to the sum of the second length and the fourth length is adenine (A, Guanine) and guanine (G) per 2 bits , Substituting one of cytosine (C, Cytosine) and thymine (T, Thymine); and
A method comprising: performing puncturing on a nucleotide sequence formed to a half length (nt) of the fifth length through the substitution. According to claim 1,
Before dividing the first binary vector into the first number of the second binary vector,
Randomizing the first binary number vector through an XOR operation using random numbers; further comprising a method. According to claim 1,
In the step of specifying the address value,
Calculating the number of address values required for encoding;
Encoding by applying a Reed-Solomon (RS) code to each of the calculated address values; and
and assigning each of the encoded address values to each of the second binary number vectors arranged in the vertical direction of the second number in order. According to claim 3,
In the step of calculating the number of address values,
Among the total number of cases based on the number of bits of the address value, the number corresponding to the number of cases in which two consecutive bases at a specific position in the base sequence are different from each other is calculated as the number of address values. According to claim 3,
Wherein the address value comprises even parity. According to claim 1,
The substitution step is
According to the number of 0s and 1s included in the 2 bits, the 2 bits are converted into one of the adenine (A), the guanine (G), the cytosine (C), and the thymine (T). How to substitute. According to claim 6,
The drilling step,
Among the base sequences of the second number, the same base sequence as the base sequence in which the ratio of the guanine (G, Guanine) and the cytosine (C, Cytosine) ratio is greater than a predetermined value from the reference ratio is repeated more than a predetermined number of times A method of performing perforation on a nucleotide sequence. According to claim 1,
extracting N base sequences from among the second number of base sequences and performing first LDPC decoding and second LDPC decoding (where N is a natural number); and
Based on the decoded result, integrating the second binary vectors of the first number into a first binary vector of the first length according to the order of the designated address values; Further comprising,
The N base sequences are different from each other or at least two are the same,
When the N base sequences are different from each other, the N is less than or equal to the second number,
When at least two of the N nucleotide sequences are identical, the N is greater than the second number. According to claim 8,
The first LDPC decoding and second LDPC decoding steps are performed,
performing RS decoding and even parity decoding on the address value of each of the extracted N base sequences;
grouping base sequences having the same address value according to the decryption result;
removing address values from the grouped nucleotide sequences and replacing them with binary vectors;
Calculating a log-likelihood ratio (LLR) for each of the substituted binary vectors according to whether a nucleotide sequence exists in the address value;
arranging the calculated log-likelihood ratios in a vertical direction according to the order of the address values;
performing first LDPC decoding on the log-likelihood ratios aligned in the vertical direction in a horizontal direction;
performing second LDPC decoding based on the result of the first LDPC decoding; and
Based on the result of the second LDPC decryption, finally determining whether decoding is successful or not; According to claim 9,
In the first LDPC decoding step,
calculating the number of changed bits before and after first LDPC decoding is performed for each base sequence corresponding to each address value; and
Including; initializing the log likelihood ratio to 0 for a nucleotide sequence in which the number of changed bits is greater than or equal to a predetermined number,
In the second LDPC decoding step,
Performing second LDPC decoding in a horizontal direction on the log-likelihood ratio for which the first LDPC decoding failed;
The step of determining whether the final decryption is successful,
The method of determining whether decoding is finally successful through a parity check matrix for all the first LDPC-decoded base sequences and all the first LDPC-decoded and second LDPC-decoded base sequences. According to claim 10,
When it is finally determined that the decryption has failed,
The method of repeating the process of performing first LDPC decoding and second LDPC decoding by additionally extracting N base sequences from among the second number of base sequences. According to claim 9,
The log-likelihood ratio (LLR, Log-Likelihood Ratio) is calculated using the equation below.

Here, K ₀ is the number of 0s at the same position of base sequences having the same address value, K ₁ is the number of 1s at the same position of base sequences having the same address value, is the preset parameter value A program stored in a computer readable recording medium in order to execute the method of any one of claims 1 to 12 in combination with computer hardware. In the apparatus for encoding and decoding DNA data using a low density parity check code,
communications department;
a memory storing at least one process for encoding and decoding DNA data using the low density parity check code; and
A processor operating according to the process; includes,
The processor, based on the process,
Converting specific data into a first binary vector of a preset first length (bit);
Dividing the first binary vector into a second binary vector of a preset first number and a preset second length (bit);
arranging the first number of second binary vectors in a vertical direction;
LDPC encoding is performed on the second binary vector in a horizontal direction using parity of a preset third length (bit);
Assigning an address value of a preset fourth length (bit) to each of the second binary number vectors aligned in the vertical direction of the second number corresponding to the sum of the first number and the third length,
Each of the vertically aligned second binary vectors of a fifth length (bit) corresponding to the sum of the second length and the fourth length is adenine (A, Guanine) and guanine (G) per 2 bits , substituted with one of cytosine (C, Cytosine) and thymine (T, Thymine),
An apparatus for performing puncturing on a nucleotide sequence formed as a half length (nt) of the fifth length through the substitution. According to claim 14,
the processor,
Before dividing the first binary vector into the first number of the second binary vector,
Randomizing the first binary number vector through an XOR operation using random numbers. According to claim 14,
the processor,
When specifying the above address value,
Calculate the number of address values required for encoding,
Each of the calculated address values is coded by applying a Reed-Solomon (RS) code;
Apparatus for assigning each of the encoded address values to each of the second binary vector vectors vertically aligned with the second number. According to claim 16,
the processor,
When calculating the number of address values,
Of the total number of cases based on the number of bits of the address value, the number corresponding to the number of cases in which two consecutive bases at a specific position in the base sequence are different from each other is calculated as the number of address values. According to claim 16,
Wherein the address value comprises even parity. According to claim 14,
the processor,
Upon said substitution,
According to the number of 0s and 1s included in the 2 bits, the 2 bits are converted into one of the adenine (A), the guanine (G), the cytosine (C), and the thymine (T). substituting device. According to claim 19,
the processor,
When performing the perforation,
Among the base sequences of the second number, the same base sequence as the base sequence in which the ratio of the guanine (G, Guanine) and the cytosine (C, Cytosine) ratio is greater than a predetermined value from the reference ratio is repeated more than a predetermined number of times A device for performing perforation on a nucleotide sequence. According to claim 14,
the processor,
Extracting N base sequences from the second number of base sequences to perform first LDPC decoding and second LDPC decoding (where N is a natural number),
Based on the decrypted result, integrating the second binary vector of the first number into a first binary vector of the first length according to the order of the designated address values;
The N base sequences are different from each other or at least two are the same,
When the N base sequences are different from each other, the N is less than or equal to the second number,
When at least two of the N base sequences are the same, the N is greater than the second number. According to claim 21,
the processor,
When performing the first LDPC decoding and the second LDPC decoding,
RS decoding and even parity decoding are performed on the address values of each of the extracted N base sequences;
Grouping base sequences having the same address value according to the decryption result,
After removing the address value from the grouped nucleotide sequence, replacing it with a binary vector,
Calculating a log-likelihood ratio (LLR, Log-Likelihood Ratio) for each of the substituted binary vectors according to the presence or absence of a nucleotide sequence in the address value,
sorting the calculated log-likelihood ratios in a vertical direction according to the order of the address values;
Performing first LDPC decoding on the log-likelihood ratios aligned in the vertical direction in the horizontal direction;
Performing second LDPC decoding based on the result of the first LDPC decoding;
Based on the result of the second LDPC decryption, it is determined whether decoding is finally successful. 23. The method of claim 22,
the processor,
When performing the first LDPC decoding,
For each base sequence corresponding to each address value, the number of changed bits before and after performing the first LDPC decoding is calculated,
Initializing the log-likelihood ratio to 0 for a nucleotide sequence in which the number of changed bits is equal to or greater than a preset number;
When performing the second LDPC decoding,
Determining the log likelihood ratio for which the first LDPC decoding failed to perform second LDPC decoding in a horizontal direction;
When determining the success of the final decryption,
An apparatus for determining whether decoding is finally successful through a parity check matrix for all the first LDPC-decoded base sequences and all the first LDPC-decoded and second LDPC-decoded base sequences. According to claim 23,
the processor,
When it is finally determined that the decryption has failed,
An apparatus for repeating the process of performing first LDPC decoding and second LDPC decoding by additionally extracting N base sequences from among the second number of base sequences. 23. The method of claim 22,
The log-likelihood ratio (LLR, Log-Likelihood Ratio) is calculated using the equation below.

Here, K ₀ is the number of 0s at the same position of base sequences having the same address value, K ₁ is the number of 1s at the same position of base sequences having the same address value, is the preset parameter value