KR101358219B1 - Method of fabricating liquid crystal display device - Google Patents

Abstract

In the manufacturing method of the liquid crystal display device of the present invention, when the pixel electrode contact hole is formed, a defect pattern formed in the data line is separated from the data line by using a half-tone mask, without adding a mask process or a laser repair process. A method for automatically repairing a data line, the method comprising: providing a first substrate; Forming a gate electrode and a gate line on the first substrate; Forming a first insulating film on the first substrate on which the gate electrode and the gate line are formed; Forming an active pattern and a source / drain electrode on the first substrate on which the first insulating film is formed, and forming a data line crossing the gate line to define a pixel region; Forming a second insulating film on the first substrate on which the active pattern, the source / drain electrode, and the data line are formed; Selectively removing a portion of the second insulating layer to form a contact hole exposing a portion of the drain electrode, and selectively removing a portion of the defective pattern formed on a side of the second insulating layer and the data line Separating a pattern from the data line to form a separation hole for electrically insulating; Forming a pixel electrode electrically connected to the drain electrode through the contact hole; And bonding the first substrate and the second substrate to each other.

Half-tone mask, contact hole, data line, repair, number of masks

Description

Manufacturing method of liquid crystal display device {METHOD OF FABRICATING LIQUID CRYSTAL DISPLAY DEVICE}

1 is an exploded perspective view schematically showing a general liquid crystal display device.

2A to 2E are sectional views sequentially showing a manufacturing process of an array substrate in the liquid crystal display device shown in Fig.

3 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

4A to 4D are cross-sectional views sequentially showing manufacturing processes taken along lines IIIa-IIIa 'and IIIb-IIIb' of the array substrate shown in FIG.

5A to 5F are cross-sectional views illustrating the second mask process shown in FIG. 4B in detail.

6A to 6F are cross-sectional views illustrating the third mask process illustrated in FIG. 4C in detail.

DESCRIPTION OF REFERENCE NUMERALS

110: array substrate 116: gate line

117: data line 117 ': bad pattern

118: pixel electrode 121: gate electrode

122: source electrode 123: drain electrode

124: active pattern 140: contact hole

H: Separation Hole

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device capable of automatically performing a repair process of a data line while reducing the number of masks to simplify the manufacturing process and improve the yield. It is about.

Recently, interest in information display has increased, and a demand for using portable information media has increased, and a light-weight flat panel display (FPD) that replaces a cathode ray tube (CRT) And research and commercialization are being carried out. Particularly, among such flat panel display devices, a liquid crystal display (LCD) is an apparatus for displaying an image using the optical anisotropy of a liquid crystal, and is excellent in resolution, color display and picture quality and is actively applied to a notebook or a desktop monitor have.

The liquid crystal display comprises a color filter substrate, an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

The active matrix (AM) method, which is a driving method mainly used in the liquid crystal display device, uses an amorphous silicon thin film transistor (a-Si TFT) as a switching device to drive the liquid crystal in the pixel portion. to be.

Since the manufacturing process of the liquid crystal display device basically requires a plurality of mask processes (that is, a photolithography process) to fabricate an array substrate including thin film transistors, a method of reducing the number of masks in terms of productivity is required ought.

Hereinafter, the structure of a typical liquid crystal display device will be described in detail with reference to FIG.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

As shown in the figure, the liquid crystal display comprises a color filter substrate 5, an array substrate 10, and a liquid crystal layer (not shown) formed between the color filter substrate 5 and the array substrate 10 30).

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 implementing colors of red (R), green (G) and blue (B) A black matrix 6 for separating the sub-color filters 7 from each other and shielding light transmitted through the liquid crystal layer 30 and a transparent common electrode for applying a voltage to the liquid crystal layer 30 8).

In addition, the array substrate 10 may be arranged in a vertical direction to form a plurality of gate lines 16 and data lines 17 defining a plurality of pixel regions P, and the gate lines 16 and data lines 17. And a pixel electrode 18 formed on the pixel region P.

The color filter substrate 5 and the array substrate 10 constituted as described above are adhered to each other by a sealant (not shown) formed on the periphery of the image display area to constitute a liquid crystal display panel, 5 and the array substrate 10 are bonded together through a cemented key (not shown) formed on the color filter substrate 5 or the array substrate 10.

2A to 2E are cross-sectional views sequentially showing the steps of manufacturing an array substrate in the liquid crystal display device shown in Fig.

2A, a gate electrode 21 made of a conductive metal material is formed on the array substrate 10 by using a photolithography process (first mask process).

Next, as shown in FIG. 2B, a first insulating film 15a, an amorphous silicon thin film and an n + amorphous silicon thin film are sequentially deposited on the entire surface of the array substrate 10 on which the gate electrode 21 is formed The amorphous silicon thin film and the n + amorphous silicon thin film are selectively patterned using a photolithography process (second mask process) to form an active pattern 24 made of the amorphous silicon thin film on the gate electrode 21.

At this time, an n + amorphous silicon thin film pattern 25 patterned in the same manner as the active pattern 24 is formed on the active pattern 24.

Thereafter, as illustrated in FIG. 2C, a conductive metal material is deposited on the entire surface of the array substrate 10 and then selectively patterned using a photolithography process (third mask process) to form an upper portion of the active pattern 24. The source electrode 22 and the drain electrode 23 are formed. At this time, the n + amorphous silicon thin film pattern formed on the active pattern 24 is removed by the third mask process, and the ohmic-and-amorphous silicon thin film pattern is formed between the active pattern 24 and the source / drain electrodes 22, Thereby forming an ohmic contact layer 25 '.

2d, a second insulating layer 15b is deposited on the entire surface of the array substrate 10 on which the source electrode 22 and the drain electrode 23 are formed, and then a photolithography process A part of the second insulating film 15b is removed through the contact hole 40 to expose a part of the drain electrode 23.

Finally, as shown in FIG. 2E, a transparent conductive metal material is deposited on the entire surface of the array substrate 10, and then selectively patterned using a photolithography process (fifth mask process) The pixel electrode 18 electrically connected to the drain electrode 23 is formed.

As described above, the fabrication of the array substrate including the thin film transistor requires five photolithography processes in total for patterning the gate electrode, the active pattern, the source / drain electrode, the contact hole, and the pixel electrode.

The photolithography process is a series of processes for transferring a pattern drawn on a mask onto a substrate on which a thin film is deposited to form a desired pattern. The photolithography process includes a plurality of processes such as a photoresist application, an exposure, and a development process. There is a drawback that it drops.

In particular, the mask designed to form the pattern is very expensive, so that the manufacturing cost of the liquid crystal display device increases proportionally as the number of masks applied to the process increases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a method of manufacturing a liquid crystal display device, which is to produce an array substrate by four mask processes.

Another object of the present invention is to provide a liquid crystal display and a method of manufacturing the same, which can automatically repair a defective pattern formed on a data line.

Other objects and features of the present invention will be described in the following description of the invention and claims.

In order to achieve the above object, the manufacturing method of the liquid crystal display device of the present invention comprises the steps of providing a first substrate; Forming a gate electrode and a gate line on the first substrate; Forming a first insulating film on the first substrate on which the gate electrode and the gate line are formed; Forming an active pattern and a source / drain electrode on the first substrate on which the first insulating film is formed, and forming a data line crossing the gate line to define a pixel region; Forming a second insulating film on the first substrate on which the active pattern, the source / drain electrode, and the data line are formed; Selectively removing a portion of the second insulating layer to form a contact hole exposing a portion of the drain electrode, and selectively removing a portion of the defective pattern formed on a side of the second insulating layer and the data line Separating a pattern from the data line to form a separation hole for electrically insulating; Forming a pixel electrode electrically connected to the drain electrode through the contact hole; And bonding the first substrate and the second substrate to each other.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the manufacturing method of the liquid crystal display device according to the present invention.

FIG. 3 is a plan view schematically illustrating a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention, and for convenience of description, illustrates one pixel including a thin film transistor of a pixel unit.

In an actual liquid crystal display device, N number of gate lines and M number of data lines intersect to form MxN pixels, but one pixel is shown in the figure for simplicity.

As shown in the figure, a gate line 116 and a data line 117 are formed in the array substrate 110 according to the exemplary embodiment of the present invention, which are arranged horizontally and horizontally on the array substrate 110 to define a pixel region. A thin film transistor, which is a switching element, is formed in the intersection region of the gate line 116 and the data line 117. A common electrode of the color filter substrate (not shown) is connected to the thin film transistor And a pixel electrode 118 for driving a liquid crystal (not shown) is formed.

The thin film transistor includes a gate electrode 121 connected to the gate line 116, a source electrode 122 connected to the data line 117, and a drain electrode 123 connected to the pixel electrode 118. The thin film transistor includes an active pattern (not shown) which forms a conductive channel between the source electrode 122 and the drain electrode 123 by a gate voltage supplied to the gate electrode 121 .

A portion of the source electrode 122 extends in one direction to form a portion of the data line 117, and a portion of the drain electrode 123 extends toward the pixel region to form a contact hole formed in a second insulating layer (not shown). It is electrically connected to the pixel electrode 118 through 140.

In this case, a part of the front gate line 116 ′ overlaps with a portion of the pixel electrode 118 therebetween with a first insulating film (not shown) and the second insulating film interposed therebetween, so that a storage capacitor Cst is provided. Will form. The storage capacitor Cst keeps the voltage applied to the liquid crystal capacitor constant until the next signal comes in. That is, the pixel electrode 118 of the array substrate 110 forms a liquid crystal capacitor together with the common electrode of the color filter substrate. In general, the voltage applied to the liquid crystal capacitor is not maintained until the next signal is input and is leaked. Disappear. Therefore, in order to maintain the applied voltage, the storage capacitor Cst needs to be connected to the liquid crystal capacitor.

The storage capacitor Cst has effects such as stabilization of gray scale display and reduction of flicker and afterimage in addition to signal retention.

Here, the liquid crystal display according to the exemplary embodiment of the present invention uses a half-tone mask or a diffraction mask (hereinafter, referred to as a half-tone mask to include a diffraction mask) in an active pattern in one mask process. By forming a source / drain electrode and a data line, an array substrate can be manufactured by a total of four mask processes, which will be described in detail with the following manufacturing method of the liquid crystal display.

4A through 4D are cross-sectional views sequentially illustrating a manufacturing process along lines IIIa-IIIa 'and IIIb-IIIb' of the array substrate illustrated in FIG. 3, wherein a process of manufacturing an array substrate including a data line unit is performed. It is shown sequentially.

As shown in FIG. 4A, the gate electrode 121 and the gate line 116 ′ are formed in the pixel portion of the array substrate 110 made of a transparent insulating material such as glass.

In this case, reference numeral 116 'denotes a gate line of the front end of the corresponding pixel, and the gate line of the corresponding pixel and the front gate line 116' are formed in the same manner.

In this case, the gate electrode 121 and the gate line 116 ′ are formed by depositing a first conductive layer on the entire surface of the array substrate 110 and then selectively patterning the same through a photolithography process (first mask process).

The first conductive layer may include aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), chromium (Cr), molybdenum (Mo), or the like. The same low resistance opaque conductive material can be used. In addition, the first conductive film may be formed in a multilayer structure in which two or more low-resistance conductive materials are stacked.

Next, as shown in FIG. 4B, the first insulating film 115a, the amorphous silicon thin film, the n + amorphous silicon thin film, and the first insulating film are formed on the entire surface of the array substrate 110 on which the gate electrode 121 and the gate line 116 ′ are formed. After the second conductive film is formed, the active pattern 124 made of the amorphous silicon thin film is formed on the pixel portion of the array substrate 110 by selectively removing the same by a photolithography process (second mask process). Source / drain electrodes 122 and 123 formed of a conductive film and electrically connected to the source / drain regions of the active pattern 124 are formed.

In addition, a data line 117 formed of the second conductive layer is formed on the data line of the array substrate 110 through the second mask process.

In this case, an ohmic contact layer 125 formed of the n + amorphous silicon thin film and patterned in the same form as the source / drain electrodes 122 and 123 is formed on the active pattern 124.

In addition, the first amorphous silicon thin film pattern 120 ′ and the second n + amorphous film formed of the amorphous silicon thin film and the n + amorphous silicon thin film and patterned in the same shape as the data line 117 are respectively disposed below the data line 117. The silicon thin film pattern 130 ″ is formed.

For reference, reference numeral 117 'represents a defect pattern formed on one side of the data line 117 in the process of forming the data line 117, and each of the amorphous silicon thin film and the lower portion of the defect pattern 117' is formed. A second amorphous silicon thin film pattern 120 "and a third n + amorphous silicon thin film pattern 130 '" formed of an n + amorphous silicon thin film and patterned in the same shape as the defective pattern 117' are formed.

The defective pattern 117 ′ must be separated from the data line 117 during the manufacturing process of the array substrate 110 as the parasitic capacitor overlaps with the pixel electrode formed thereon.

The active pattern 124, the source / drain electrodes 122 and 123, and the data line 117 according to the exemplary embodiment of the present invention may be processed in a single mask process (second mask process) using a half-tone mask. The second mask process will be described in detail with reference to the accompanying drawings.

5A through 5F are cross-sectional views illustrating the second mask process illustrated in FIG. 4B in detail.

As shown in FIG. 5A, the first insulating layer 115a, the amorphous silicon thin film 120, and the n + amorphous silicon thin film 130 are formed on the entire surface of the array substrate 110 on which the gate electrode 121 and the gate line 116 ′ are formed. ) And the second conductive film 150 are formed.

In this case, the second conductive layer 150 may be made of a low resistance opaque conductive material such as aluminum, aluminum alloy, tungsten, copper, chromium, molybdenum, etc. to form a source electrode, a drain electrode, and a data line.

And, as shown in Figure 5b, after forming the first photosensitive film 170 made of a photosensitive material such as photoresist on the array substrate 110, the first half-tone mask according to an embodiment of the present invention Light is selectively irradiated to the first photoresist layer 170 through 180.

In this case, the first half-tone mask 180 blocks the first transmission region I transmitting all of the irradiated light and the second transmission region II transmitting only a part of the light and blocking part of the light and all the irradiated light. The blocking region III is provided, and only the light passing through the first half-tone mask 180 is irradiated to the first photosensitive layer 170.

Subsequently, after developing the first photoresist layer 170 exposed through the first half-tone mask 180, the blocking region III and the second transmission region II may be formed as illustrated in FIG. 5C. The first photoresist pattern 170a to the fourth photoresist pattern 170d having a predetermined thickness remain in a region where all of the light is blocked or partially blocked, and the first transmission region I through which all the light is transmitted The photoresist film is completely removed to expose the surface of the second conductive film 150.

At this time, the first to third photoresist patterns 170a to 170c formed in the blocking region III are formed thicker than the fourth photoresist pattern 170d formed through the second transmissive region II. In addition, the first photoresist film is completely removed in a region where all light is transmitted through the first transmission region I. This is because a positive photoresist is used, and the present invention is not limited thereto. It is okay.

Next, as illustrated in FIG. 5D, the amorphous silicon thin film, the n + amorphous silicon thin film, and the second formed on the lower portion of the first photosensitive film pattern 170a to the fourth photosensitive film pattern 170d formed as described above are used as a mask. When the conductive film is selectively removed, an active pattern 124 made of the amorphous silicon thin film is formed on the pixel portion of the array substrate 110, and the second conductive layer is formed on the data line portion of the array substrate 110. The formed data line 117 is formed.

In this case, the n + amorphous silicon thin film pattern 130 ′ and the second conductive layer are formed on the active pattern 124, respectively, and are patterned in the same form as the active pattern 124. The conductive film pattern 150 ′ is formed.

In addition, the first amorphous silicon thin film pattern 120 ′ and the second n + amorphous film formed of the amorphous silicon thin film and the n + amorphous silicon thin film and patterned in the same shape as the data line 117 are respectively disposed below the data line 117. The silicon thin film pattern 130 ″ is formed.

Subsequently, when the ashing process of removing a portion of the first photoresist pattern 170a to the fourth photoresist pattern 170d is performed, as illustrated in FIG. 5E, the fourth photoresist layer of the second transmission region II is shown. The pattern will be completely removed.

In this case, the first photoresist pattern to the third photoresist pattern correspond to the blocking region III by the fifth photoresist pattern 170a 'through the seventh photoresist pattern 170c', in which the thickness of the fourth photoresist pattern is removed. Only the source electrode region, the drain electrode region, and the upper portion of the data line 117 remain.

Thereafter, as shown in FIG. 5F, the array is removed by removing a portion of the n + amorphous silicon thin film and the second conductive film using the remaining fifth photoresist pattern 170a ′ through seventh photoresist pattern 170c ′ as a mask. An active pattern 124 made of the amorphous silicon thin film is formed in the pixel portion of the substrate 110.

In this case, an ohmic contact layer formed of the n + amorphous silicon thin film on the active pattern 124 and ohmic-contacting the source / drain regions of the active pattern 124 and the source / drain electrodes 122 and 123 ( 125) is formed.

As described above, according to the exemplary embodiment of the present invention, the active pattern 124, the source / drain electrodes 122 and 123, and the data line 117 may be formed through a single mask process by using a half-tone mask.

As shown in FIG. 4B, in the process of forming the data line 117, a defective pattern 117 ′ may be formed on one side of the data line 117, in which case the defective pattern 117 ′. Should be separated from the data line 117.

For this purpose, a laser repair process for separating the defective pattern from a data line using a laser is generally used, but the laser repair process requires expensive laser repair equipment and is produced because an inspector must perform the laser repair directly. There is a disadvantage that loss occurs.

Accordingly, in the embodiment of the present invention, a mask process or a laser repair process is added by separating the defective pattern from a data line using a half-tone mask in forming a contact hole for electrical connection between the pixel electrode and the drain electrode. The repair of the data line can be automatically performed without the above description. Hereinafter, the third mask process will be described in detail with reference to the accompanying drawings.

6A to 6F are cross-sectional views illustrating the third mask process illustrated in FIG. 4C in detail.

As illustrated in FIG. 6A, a second insulating layer 115b is deposited on the entire surface of the array substrate 110 on which the active pattern 124 is formed.

6B, a second half-tone mask according to an exemplary embodiment of the present invention is formed after forming the second photoresist layer 270 made of a photoresist such as photoresist on the entire surface of the array substrate 110. Light is selectively irradiated to the second photoresist layer 270 through 280.

In this case, the second half-tone mask 280 blocks the first transmission region I that transmits all of the irradiated light and the second transmission region II that transmits only a part of the light and blocks some of the light. The blocking region III is provided, and only the light passing through the second half-tone mask 280 is irradiated to the second photosensitive film 270.

Subsequently, after the second photoresist layer 270 exposed through the second half-tone mask 280 is developed, as shown in FIG. 6C, the blocking region III and the second transmission region II may be formed. The first photoresist pattern 270a and the second photoresist pattern 270b having a predetermined thickness remain in an area where all of the light is blocked or partially blocked by the light, and the second transmission region I transmits all of the light. The photoresist film is completely removed to expose the surface of the second insulating film 115b.

In this case, the first photoresist layer pattern 270a formed in the blocking region III is thicker than the second photoresist layer pattern 270b formed through the second transmission region II. In addition, the second photoresist film is completely removed in a region where all light is transmitted through the first transmission region I. This is because a positive photoresist is used, and the present invention is not limited thereto. It is okay.

Next, as shown in FIG. 6D, the second amorphous silicon thin film pattern 120 ″ formed below the first photoresist pattern 270a and the second photoresist pattern 270b formed as a mask are used as a mask. When the third n + amorphous silicon thin film pattern 130 ′ ″, the defective pattern 117 ′, and the partial region of the second insulating layer 115b are selectively removed, the data line portion of the array substrate 110 may be removed. A separation hole H is formed to electrically insulate the line 117 from the defective pattern 117 ′.

Subsequently, when an ashing process of removing a portion of the first photoresist pattern 270a and the second photoresist pattern 270b is performed, as illustrated in FIG. 6E, the second photoresist layer of the second transmission region II is formed. The pattern will be completely removed.

In this case, the first photoresist pattern is a third photoresist pattern 270a ′ removed by the thickness of the second photoresist pattern and remains only in a predetermined region corresponding to the blocking region III.

Thereafter, as shown in FIG. 6F, a portion of the second insulating film 115b is removed by using the remaining third photoresist pattern 270a ′ as a mask, thereby removing the drain electrode from the pixel portion of the array substrate 110. The contact hole 140 exposing a part of the 123 is formed.

In this case, a portion of the first insulating layer 115a under the separation hole H may be removed.

As shown in FIG. 4D, a third conductive film is formed on the entire surface of the array substrate 110 and then selectively patterned using a photolithography process (fourth mask process) through the contact hole 140. The pixel electrode 118 electrically connected to the drain electrode 123 is formed.

In this case, the pixel electrode 118 is formed to overlap a part of the defective pattern 117 ', but the defective pattern 117' is electrically insulated from the data line 117 so that the aforementioned problem does not occur. .

The array substrate of the above-described embodiment of the present invention configured as described above is adhered to and opposed to the color filter substrate by a sealant formed on the outer periphery of the image display area. At this time, light is emitted from the color filter substrate to the thin film transistor, A black matrix for preventing leakage and a color filter for realizing red, green and blue colors are formed.

At this time, the color filter substrate and the array substrate are bonded together through a covalent key formed on the color filter substrate or the array substrate.

As described above, the amorphous silicon thin film transistor using the amorphous silicon thin film as the active pattern is described as an example of the present invention. However, the present invention is not limited to this, Is also applied to a polycrystalline silicon thin film transistor.

In addition, the present invention can be applied not only to a liquid crystal display device but also to other display devices manufactured using thin film transistors, for example, organic electroluminescent display devices in which organic light emitting diodes (OLEDs) have.

While a great many are described in the foregoing description, it should be construed as an example of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

As described above, the manufacturing method of the liquid crystal display device according to the present invention provides an effect of reducing the number of masks used for manufacturing the thin film transistor and reducing the manufacturing process and cost.

In addition, the manufacturing method of the liquid crystal display according to the present invention can automatically proceed with the repair of the data line, thereby improving the image quality and at the same time provides the effect of improving the yield through the removal of defects.

Claims (9)

Providing a first substrate; Forming a gate electrode and a gate line on the first substrate; Forming a first insulating film on the first substrate on which the gate electrode and the gate line are formed; Forming an active pattern and a source / drain electrode on the first substrate on which the first insulating film is formed, and forming a data line crossing the gate line to define a pixel region; Forming a second insulating film on the first substrate on which the active pattern, the source / drain electrode, and the data line are formed; Selectively removing a portion of the second insulating layer to form a contact hole exposing a portion of the drain electrode, and selectively removing a portion of the defective pattern formed on a side of the second insulating layer and the data line Separating a pattern from the data line to form a separation hole for electrically insulating; Forming a pixel electrode electrically connected to the drain electrode through the contact hole; And And attaching the first substrate and the second substrate to each other. The method of claim 1, wherein the defect pattern is formed on a side surface of the data line in the process of forming the data line. The method of claim 1, wherein an ohmic contact layer made of an n + amorphous silicon thin film is formed on the active pattern made of an amorphous silicon thin film, and a second portion of the n + amorphous silicon thin film and an amorphous silicon thin film is formed below the data line. The n + amorphous silicon thin film pattern and the first amorphous silicon thin film pattern are formed. The method of claim 3, wherein a third n + amorphous silicon thin film pattern and a second amorphous silicon thin film pattern formed of the n + amorphous silicon thin film and the amorphous silicon thin film are formed under the defective pattern, respectively. . The method of claim 4, wherein the forming of the contact hole and the separation hole is performed. Forming a first photoresist pattern having a first thickness in a first region of the pixel portion by applying a half-tone mask and forming a second photoresist pattern having a second thickness in a second region of the pixel portion; The partial pattern of the second insulating film, the second amorphous silicon thin film pattern, the third n + amorphous silicon thin film pattern, and the defective pattern may be selectively removed by using the first photoresist pattern and the second photoresist pattern as masks. Forming a separation hole that is electrically isolated from the line; Removing the second photoresist pattern and simultaneously removing a portion of the thickness of the first photoresist pattern to form a third photoresist pattern having a third thickness; And And removing a portion of the second insulating layer selectively using the third photoresist pattern as a mask to form a contact hole exposing a portion of the drain electrode. 6. The method of claim 5, wherein a portion of the first insulating layer under the separation hole is removed when forming a contact hole exposing a portion of the drain electrode. The method of manufacturing a liquid crystal display device according to claim 5, wherein when the positive type photosensitive film is used, the first thickness is thicker than the second thickness. 6. The method of claim 5, wherein the second region of the pixel portion is an area where the contact hole is formed. The method of claim 5, wherein the first region of the pixel portion is a region excluding the region where the contact hole and the separation hole are formed in the pixel region.

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