KR101263533B1 - Display Device - Google Patents

Abstract

The present invention relates to a display device capable of effectively preventing blurring so that moving images can be displayed clearly.

The display device may include a hold type display panel; A data driver for driving a data line of the display panel; Frame conversion, which converts video data of a first frame frequency to be supplied to the data driver into video data of a second frame frequency higher than the first frame frequency, and allows video data of a second frame frequency to be corrected high and low according to a frame. A part is provided.

Motion blur, frame frequency, gradation, data driver

Description

Display Device

In order to better understand the drawings used in the detailed description of the invention, a brief description of each drawing is provided.

1A and 1B are diagrams illustrating a pixel data conversion state in a conventional impulse method.

2 is a diagram schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

3A and 3B are diagrams illustrating correction characteristics of pixel data in an exemplary embodiment of the present invention.

4A to 4C are diagrams showing examples of images displayed by the liquid crystal display according to the embodiment of the present invention.

5A and 5B are diagrams illustrating polar patterns of signals applied to the liquid crystal panel of FIG. 2.

DESCRIPTION OF THE REFERENCE NUMERALS to the main parts of the drawings "

10 liquid crystal panel 12 gate driver

14: data driver 16: timing control unit

18 frame conversion unit 20 polarity control unit

22: Contour Compensator 24: Over Driver

30, 32: first and second frame memories 34: high gradation compensator

36: low gradation compensator 38: mixer

SW1 to SW3: first to third control switches

The present invention relates to a liquid crystal display device, an electroluminescent-type display device, or a pixel driven by a switching element using amorphous silicon, polycrystalline silicon, or the like for each pixel. The present invention relates to a display device including a light emitting element such as a light emitting diode (LED), and more particularly to a display device for performing gradation processing of a video signal.

A display device for holding light emitted from each of a plurality of pixels on a basis of a predetermined amount (for example, a period of length corresponding to one frame period) on the basis of image data input for each frame period. Liquid crystal display devices are becoming popular. In an active matrix liquid crystal display device, a switching electrode (eg, a thin film transistor) that supplies a pixel electrode and a video signal to each of a plurality of pixels arranged in a two-dimensional or matrix shape. ) Is installed. The video signal is supplied to the pixel electrode through the switching element, for example, from one of a plurality of data lines (called video signal lines) extending in the vertical direction of the screen. The switching elements are arranged at predetermined intervals (for example, 1) from one of a plurality of gate lines (called scan signal lines) extending across the plurality of data lines (for example, in the horizontal direction of the screen). Each frame period) receives a scan signal and supplies a video signal to one of the plurality of data lines to the pixel electrode. Therefore, the switching element maintains the pixel electrode at a potential based on the " video signal supplied thereto according to the previous scan signal " until the next scanning signal is received, and maintains the pixel provided with this pixel electrode at the desired brightness. do.

This operation is in contrast to the impulse emission operation of a cathode-ray tube, which is represented by a braun tube that emits a phosphor installed at each pixel at the moment of receiving an image signal. With respect to this impulse light emission, the image display operation of the liquid crystal display device of the same active matrix system described above is often referred to as hold-type emission. In addition, image display such as an active matrix liquid crystal display device is also employed in a display device of an electroluminescence type (referred to as EL type) or a light emitting diode array type, and the operation is performed by controlling the voltage control of the pixel electrode described above. The description will be made by substituting the carrier injection amount control to the luminescence element or the light emitting diode.

A display device using such hold light emission displays an image by holding the brightness of each pixel within a predetermined period, and thus displays the image displayed according to, for example, another image in the successive pair of the frame periods. When replacing with, the pixel does not respond sufficiently. This phenomenon corresponds to a pixel set to a predetermined brightness in a certain frame period (e.g., the first frame period) even in the next frame period (e.g., the second frame period) following this frame period. It is explained from maintaining the brightness according to the previous frame period (the first frame period) until it is set to one brightness. In addition, this phenomenon is characterized in that a part of the video signal (or a corresponding amount of charge) sent to the pixel in any of the above-described frame periods (first frame period) is changed in the following frame period (second frame period). It is also explained from the so-called hysteresis of the video signal in each pixel, which interferes with the video signal (or the amount of electric charge accordingly) to be sent to the pixel. When a moving image is displayed by a display device (for example, a liquid crystal display) using hold type light emission, so-called blurring in which the outline of an object becomes unclear as compared to a cathode ray tube which emits pixels impulsely. Blurring Phenomenon is caused.

In order to solve this blurring phenomenon, a method of driving an image of 60 frames as shown in FIG. 1A to an image of 120 subframes (that is, each frame of two subframes) as shown in FIG. 1B is used. As shown in FIG. 1, the method of driving two subframes allows black data to be recorded in one subframe for pixel data of a 60 frame image having an intermediate gray level (for example, 176 grayscales out of 258 grayscales). Meanwhile, the data of the gradation value is recorded in another subframe. For pixel data of a 60 frame image of more than a half gray scale, a white gray scale value is written in one subframe, and the other gray scale value portion is recorded in another subframe. In these two subframe driving methods, since the pixel data is recorded on the liquid crystal panel in a manner that two gray levels of the pixel data are divided into subframes, the blurring phenomenon can be prevented without lowering the luminance.

However, the blurring effect is remarkably inferior in the case of an image having many pixel data of more than halftone. For this reason, it was difficult to display a moving picture clearly. In addition, the lower gray level and the upper gray level are displayed alternately to generate flicker. For this reason, the noise is generated in the still image and the three-dimensional effect is reduced.

Accordingly, an object of the present invention is to provide a display device capable of effectively preventing a blurring phenomenon and displaying a moving image clearly.

According to one or more exemplary embodiments, a display device includes: a hold type display panel; A data driver for driving a data line of the display panel; Frame conversion, which converts video data of a first frame frequency to be supplied to the data driver into video data of a second frame frequency higher than the first frame frequency, and allows video data of a second frame frequency to be corrected high and low according to a frame. A part is provided.

Other objects, other advantages and other features of the present invention will become apparent from the detailed description of the preferred embodiments with reference to the accompanying drawings, in addition to the objects of the present invention as described above.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention. Referring to FIG. 2, the liquid crystal display device includes a gate driver 12 connected to a plurality of gate lines GL1 to GLn on the liquid crystal panel 10 and a plurality of data lines DL1 to DLm on the liquid crystal panel 10. The data driver 14 connected is provided. The plurality of gate lines GL1 to GLn and the plurality of data lines DL1 to DLm are formed on the liquid crystal panel 10 so as to intersect with each other to divide a plurality of pixel regions. Each pixel area of the plurality of pixel regions switches a pixel driving signal to be supplied to a corresponding liquid crystal cell (not shown) from a corresponding data line DL in response to a scan signal on a corresponding gate line GL (not shown). Not formed). The liquid crystal cell adjusts the amount of light passing through the pixel region according to the voltage level of the pixel driving signal to enable an image to be displayed. As a result, a pixel including one thin film transistor and one liquid crystal cell is formed in each pixel area.

The gate driver 12 enables the plurality of gate lines GL1 to GLn sequentially by a predetermined period. To this end, the gate driver 12 generates a plurality of scan signals having exclusively a gate enable pulse shifted sequentially in the period of the horizontal synchronization signal. The gate enable pulses included in each of the plurality of scan signals have the same width.

Whenever one of the plurality of gate lines GL1 to GLn is enabled, the data driver 14 corresponds to the number of data lines DL1 to DLm corresponding to one pixel line (ie, one gate line). Pixel driving signals corresponding to the number of pixels arranged in the. Each pixel driving signal corresponding to one line is supplied to a corresponding pixel (ie, a liquid crystal cell) on the liquid crystal panel 10 via a corresponding data line DL. In this case, each of the pixels arranged on the gate line GL passes an amount of light corresponding to the voltage level of the pixel driving signal. In order to generate one line of pixel driving signals, the data driver 14 sequentially inputs one line of pixel data for each period of the enable pulse included in the scan signal, and sequentially sequentially inputs one pixel of the pixel. Simultaneously convert data to analog form. The data driver 14 generates a pixel driving signal of a voltage (or current) corresponding to the gray value of the pixel data whenever the plurality of gate lines GL1 to GLn are sequentially and exclusively enabled, on the data line DL. Supply. The data driver 14 causes one line of pixel driving signals to be applied to opposite data lines (for example, odd and even data lines) with opposite polarities to each other.

The liquid crystal display of FIG. 2 inputs a synchronization signal SYNC from an external video data source (eg, an image signal demodulator included in a graphic module or a television receiving module of a computer system) through a control transmission line CTL. And a frame converter 18 for inputting video data from an external video data source via a data transmission line DTL. The input video data input through the data transmission line DTL includes pixel data sequentially arranged in units of frames. The frame frequency of the input video data corresponds to the number of images displayed on the liquid crystal panel 10 in one second and is usually set in the range of 30 to 120 Hz. In an embodiment of the present invention, it is assumed that the frame frequency of the input video data is 60 Hz.

The frame converter 18 converts video data of a frame frequency of 60 Hz from the data transmission line DTL into video data of a sub frame frequency of 120 Hz. To this end, the frame converter 18 includes first and second frame memories 30 and 32 connected between the first and second control switches SW1 and SW2. The first control switch SW1 causes the video data from the data transmission line DTL to be alternately supplied to the first and second frame memories 30 and 32 on a frame basis.

For example, the first control switch SW1 transmits video data of the odd frame from the data transmission line DTL to the first frame memory 30 in the odd frame period, while data is transmitted in the even frame period. The video data of the even-th frame from the transmission line DTL is transferred toward the second frame memory 32. The second control switch SW2 is switched to the complementary state with the first control switch SW1 to switch to the third control switch SW3 such that the first and second frame memories 30 and 32 are alternated every frame period. To be connected. As a result, when the first frame memory 30 is connected to the data transmission line DTL in one frame period, the second frame memory 32 is connected to the third control switch SW3. On the contrary, when the first frame memory 30 is connected to the third control switch SW3, the second frame memory 32 stores one frame of pixel data from the data transmission line DTL. Both the first and second frame memories 30 and 32 read two times the pixel data of one frame, which is stored in advance, at twice the speed for two frame periods connected to the third control switch SW3. Allow video data to be generated. The video data of the odd-numbered subframe read from each frame memory 30, 32 is inevitably the same as the video data of the even-numbered subframe. The video data of these odd subframes and the video data of even-numbered subframes correspond to the video data of one frame.

The third control switch SW3 is switched for each period of the sub horizontal synchronizing signal so that the pixel data (or video data) is alternately supplied to the high gray level corrector 34 and the low gray level corrector 36 by one line. In addition, the third control switch SW3 causes two lines of pixel data to be continuously supplied to the high gradation compensator 34 or the low gradation compensator 36 whenever the subframe is changed. In other words, the third control switch SW3 causes the pixel data to be displayed on the odd-numbered (or even-numbered) lines to be supplied to the high gray level compensator 34 in the odd-numbered sub-frame period, while the even-numbered sub-frame period is provided. In this example, pixel data to be displayed on even-numbered (or odd-numbered) lines is supplied to the high gray scale corrector 34. By the switching operation of the third control switch SW3, the low gradation corrector 36 also inputs pixel data to be displayed on even-numbered (or odd-numbered) lines in the odd-numbered sub-frame period, while the even-numbered sub-frame In the period, the pixel data to be displayed on the odd (or even) lines are input.

The high gradation corrector 34 raises the pixel data from the third control switch SW3 differently according to the gradation value. When the gray scale value of the input pixel data belongs to the lower gray scale region as shown in IG1 of FIG. 3A (for example, when it corresponds to the lower 25% gray scale value), the high gray scale corrector 34 is input as shown in OHG1 in FIG. 3A. The gradation value of the pixel data is increased to twice the value. When the gradation value of the input pixel data belongs to the upper gradation region like IG2 in FIG. 3B (for example, when it corresponds to the upper 25% gradation value), the high gradation corrector 34 is as in OHG2 in FIG. 3B. The gray scale value of the pixel data is raised to the highest gray scale value corresponding to the back level. When the grayscale value of the input pixel data belongs to the middle grayscale region (i.e., corresponding to the grayscale values of 25% to 75%), the high gray scale corrector 34 has a pixel corresponding to the difference from the middle grayscale value. Increase the gradation value of the data.

The low gradation corrector 36 lowers the pixel data from the third control switch SW3 differently according to the gradation value. When the gray scale value of the input pixel data belongs to the lower gray scale region as shown in IG1 of FIG. 3A (for example, when it corresponds to the lower 25% gray scale value), the low gray scale corrector 36 inputs as shown in OLG1 in FIG. 3A. The gray value of the pixel data is lowered to a value of "0" corresponding to the black level. When the gray scale value of the input pixel data belongs to the upper gray scale region as shown by IG2 in FIG. 3B (for example, when it corresponds to the upper 25% gray scale value), the low gray scale corrector 36 is the same as the OLG2 in FIG. 3B. The gray value of the pixel data is lowered by a gray value corresponding to twice the difference from the back level. When the grayscale value of the input pixel data belongs to the middle grayscale region (i.e., corresponding to the grayscale values of 25% to 75%), the low gray scale corrector 36 may increase the number of pixels corresponding to the difference from the middle grayscale value. Lower the gradation value of the data.

Pixel data whose gradation value is upwardly corrected by the high gradation corrector 34 and pixel data whose gradation value is downwardly corrected by the low gradation corrector 36 are mixed in the mixer 38, and thus low gradation as shown in FIG. 4A or 4B. The compensated pixel data and the high gradation compensated pixel data are alternately arranged by one line. The pixel data in units of sub-frames output from the mixer 38 are converted into pixel drive signals in an analog form one by one in the data driver 14 and supplied to the corresponding one line of pixels on the liquid crystal panel 10 to FIG. 4A. And sub pictures as shown in FIG. 4B are alternately displayed. FIG. 4A is an image in which pixel data of the odd-numbered line is low gray compensated and pixel data of the even-numbered line is high gray compensated by pixel data of the odd-numbered subframe. 4B is an image in which pixel data of even-numbered lines is low gray compensated and pixel data of odd-numbered lines is displayed by pixel data of even-numbered subframes with high gradation compensation. 4A and 4B, the images of the two subframes are superimposed so that an image of one frame as shown in FIG. 4C is displayed on the liquid crystal panel 10. FIG.

The timing controller 16 doubles the synchronization signals SYNC from the control transmission line CTL. Using the frequency multiplied synchronization signals, the timing controller 16 causes the gate driver 12 and the data driver 14 to be driven at a speed twice as fast as the frequency of the input synchronization signal. To this end, the timing controller 16 performs gate control signals necessary for generating a plurality of scan signals for the gate driver 12 to scan the plurality of gate lines GL1 to GLn on the liquid crystal panel 10 every subframe. Generate (GCS). In addition, the timing controller 16 sequentially inputs one line of pixel data for each period in which the data driver 14 enables the gate line GL, and sequentially inputs one line of pixel data in analog form. It generates data control signals DCS necessary to convert and output the pixel driving signal. In addition, the timing controller 16 includes the first and the second. A second switch control signal (FSC1) and the third control switch (SW3) for switching the control switch (SW1, SW2) to be complementary to each frame period, the second switch for each period of the sub horizontal synchronization signal of the sub-frame Generate the switch control signal FSC2. Here, the sub horizontal synchronization signal may be generated by multiplying the frequency of the input synchronization signal by twice. In addition, the timing controller 16 may generate a memory control signal MCS for controlling the write operation of the first and second frame memories 30 and 32 and the read operation performed at twice the speed of the write operation. The second frame memories 30 and 32 are supplied to the second frame memories 30 and 32.

The polarity control unit 20 generates a polarity control signal POL to be supplied to the data driver 14 in response to the vertical and horizontal synchronization signals multiplied by twice the frequency from the timing control unit 16. The polarity control signal POL generated by the polarity control unit 20 inverts a logic state (high logic and low logic) for each period of two frequency multiplied horizontal synchronization signals and a waveform that is inverted each time a subframe is changed. Have In response to the polarity control signal POL, the data driver 14 causes the pixel driving signal applied to the data lines to have inverted polarity every two gate lines, and also inverts the inverted polarity every subframe cycle. To have. Accordingly, the liquid crystal panel 10 is driven to be polarity-inverted for each pixel on the horizontal side and polarity-inverted for every two pixels on the vertical side. In addition, the pixels on the liquid crystal panel 10 are driven by pixel driving signals of inverted polarity for each subframe. In other words, the liquid crystal panel 10 is driven in a 1-dot-2 line-frame inversion manner so that the polar patterns as shown in FIGS. 5A and 5B alternately appear.

The liquid crystal display according to the exemplary embodiment of the present invention may further include an outline corrector 22 and / or an over driver 24 connected in series between the frame converter 18 and the data driver. The outline corrector 22 corrects the gray value of the pixel data corresponding to the boundary of the image implemented by the pixel data of the subframe so that the pixel data of the corrected subframe is line-by-line via the transient driver 14. To the data driver 14. By the outline corrector 22, the boundary of the video image appears clearly in the image displayed on the liquid crystal panel 10. The over driver 24 compensates the gray value of the pixel data of the subframe from the contour corrector 22 with a weight according to the difference from the gray value of the previous subframe. The weight-compensated pixel data is applied to the pixels on the liquid crystal panel 10 in the form of a pixel driving signal via the data driver 14, thereby improving the response speed of the pixel.

As described above, in the liquid crystal display according to the present invention, the liquid crystal panel is driven in an impulse manner by dividing the pixel data of one frame into two subframes so that the pixels on the liquid crystal panel are once dark and the other bright. In addition, the liquid crystal panel is driven such that adjacent lines are bright and dark with each other and light and dark are changed in each subframe. Accordingly, in the liquid crystal display according to the present invention, even in an image having a large amount of pixel data of more than half gray scale, blurring phenomenon can be effectively prevented and flicker is minimized. In addition, noise in still images can be minimized and the stereoscopic feeling can be improved. In addition, in the liquid crystal display according to the present invention, contour compensation is further performed so that a boundary of an image of an image is clearly displayed. Furthermore, in the liquid crystal display according to the present invention, the driving speed of the pixel on the liquid crystal panel is increased by overdriving the pixel data to be weighted.

As described above, the present invention has been described with reference to the embodiments shown in the drawings, which are merely exemplary, and a person of ordinary skill in the art without departing from the spirit and scope of the present invention. It will be apparent that various modifications, changes, and equivalent other embodiments are possible. Accordingly, the scope of the present invention to be protected should be defined by the appended claims.

Claims (9)

A hold type display panel; A data driver for driving a data line of the display panel; Frame conversion, which converts video data of a first frame frequency to be supplied to the data driver into video data of a second frame frequency higher than the first frame frequency, and allows video data of a second frame frequency to be corrected high and low according to a frame. With wealth, The frame converter, First and second frame memories for changing the video data of the first frame frequency to a second frame frequency; A high gradation compensator for increasing a gradation value of the video data of the second frame frequency; A low gradation compensator for lowering a gradation value of the video data of the second frame frequency; And And a mixer for mixing the video data from the high and low gray level compensators to supply mixed video data to the data driver. The method of claim 1, wherein the frame converter A first switch configured to alternately input video data of the first frame frequency to the first and second frame memories; A second switch driven complementarily with the first switch to select video data of a second frame frequency from the first and second frame memories; And And a third switch for selectively supplying video data of a second frame frequency from a second switch to the high and low gray level compensators. The method of claim 2, And the third switch divides the video data into lines for supplying the high and low gray level compensators. The method of claim 1, And an outline corrector for compensating for a contour component of the video data of the second frame frequency to be supplied from the frame converter to the data driver. 5. The method of claim 4, And an over-driver for compensating the video data of the second frame frequency to be supplied from the contour correcter to the data driver by a weight according to a difference from the previous one. 6. The method of claim 5, And a polarity control unit for controlling the data driver so that the signal supplied to the display panel from the data driver is inverted every two pixel lines and inverted every frame. The method of claim 1, And the display panel comprises a liquid crystal panel. The method of claim 1, The high gray scale compensator determines a rising value of the gray scale value according to the video data value of the second frame frequency. The method of claim 1, The low gray scale compensator determines a falling value of the gray scale value according to the video data value of the second frame frequency.

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