KR100370416B1 - Encoding/decoding method for recording/reproducing high-density data and system based thereon - Google Patents

Abstract

PURPOSE: An encoding/decoding method for recording/reproducing high-density data and a system based on the method are provided to record/reproduce high-density data in/from a partial response maximum likelihood(PRML) channel. CONSTITUTION: An encoding/decoding system includes an encoder(100) for compressing input binary data, correcting an error in the data and modulating the data to encode the data, a signal generator(102) for generating a signal from the modulated data, a write equalizer(104) for previously compensating the signal output from the signal generator, and a storage unit(106) for storing the signal output from the read equalizer. The encoding/decoding system further includes a read equalizer(108) for processing a signal reproduced from the signal stored in the storage unit to facilitate detection of the reproduced signal, a detector(110) for detecting a signal from the signal output from the read equalizer in a manner that error probability is minimized, and a decoder(112) for decoding the signal output from the detector.

Description

An encoding / decoding method for recording / reproducing high density data and an apparatus thereof.

The present invention relates to an encoding / decoding method for recording / reproducing data in a high-density storage device and a device therefor, and more particularly, to recording high-density data in a PRML (Partial Response Maximum Likehood) channel. The present invention relates to an encoding / decoding method for reproducing, and an apparatus according to the same.

In the process of recording and reproducing data in a storage device, research is being actively conducted to deliver reliable information at high speed while increasing the amount of data (recording density) recorded in a given storage device capacity. Efforts for high-capacity and high-capacity data storage devices include methods that consider physical aspects such as improving the physical characteristics of the storage disk or improving the precision of the device. In addition, there are methods in consideration of signal processing aspects such as a method of reducing data detection error using a signal processing technique and a method of increasing the recording density of a storage device or facilitating detection of a reproduced signal through efficient encoding.

With the information war in modern times, storage devices are required to have a larger recording density, and a movement for encoding a data recorded in the storage device in such a flow to increase the recording density and facilitating detection of a reproduction signal is actively underway. As the storage device records more densely, more information can be recorded and used more efficiently on a storage disk of a given size, so that less redundancy can be used to increase the recording density and facilitate efficient signal detection. Purpose.

In general, a useful coding method for the storage device is a run length limited (RLL) method that satisfies the (d, k) condition, which is intended to reduce interference for signal detection while maintaining the self-clocking characteristics of the data signal. do. That is, the run length (d, k) encoding method limits the number of consecutive "0" s between "1" and "1" to a minimum of d and a maximum of k. The former is for facilitating signal detection, and the latter is for timing data in restoring the reproduction signal.

Among these methods, recently used coding methods include code ratio 1/2 (2,7) encoding method, code ratio 2/3 (1,7) encoding method, code ratio 8/9 (0,3) encoding method, code And the ratio 8/9 (0,4 / 4) coding method. Code ratio 1/2 (2,7) coding method and code ratio 2/3 (1,7) coding method have a value between '1' and '1' because the 'd' value is '2' and '1', respectively. It is a coding method that reduces interference between signals by recording the interval of '0' by 'd'. This method reduces the interference between signals, while having a low redundancy due to large redundancy, so many bits must be written to transmit the same amount of user data. 8/9 RLL (0,3), 8 As with the / 9 RLL (0.4 / 4), the advantage of causing more symbol-to-symbol interference than the code with the higher code ratio is lost. A code with a high code ratio has less redundancy than a coding method with a low code ratio, thereby helping to record and reproduce data. The main factor in designing code is to have a high code rate. The advantage of the high coding method is that it increases the channel input SNR and has less redundancy, thereby reducing the interference between data and enabling high density recording.

In general, modeling of a channel should be modeled similarly to an actual channel in the process of recording and playing back to a storage device. In order to reflect the channel characteristics of the storage device, it can be expressed as Equation 1 below according to the recording density.

[Equation 1]

In the PRML method, the input signal is precoded to have controlled ISI between the current data and the previous data, and then the target response is modified as shown in Equation 2 to detect the data with the Viterbi decoder.

[Equation 2]

At a recording density with signal interference with a channel characteristic of n = 1, the PRML method shows very good detection performance. As the storage device records more densely, the distance between state transitions becomes shorter, and the intersymbol interference (ISI) increases between data. As such, in order to reduce interference with each other at high density, there is a method of reducing state transition and generating less ISI. The sign of this concept is RLL (1,7), which is a method of encoding to have at least one zero between symbols. However, this RLL (1,7) code limits the state transition, while the code rate is low. Therefore, to transmit the same amount of user data, an RLL (0.3) or RLL (0.4 / 4) code with an 8/9 code rate is required. Since many bits need to be written, the interval between the recorded data becomes narrow. Therefore, the interference between data increases, thus losing the advantage of having at least one zero between symbols. That is, in a storage channel, a code having a higher code ratio helps to record / reproduce data than an encoding method having a low code ratio. The most interesting factor in designing channel codes is to have a high code rate when user data is mapped to codewords. This is to increase the channel input SNR. In addition, an advantage of a code having a higher code ratio than a code having a low code ratio is to reduce interference between data, to reduce nonlinearity, and to enable high density recording. As described above, among the encoding methods for reducing inter-symbol interference, there is a method of increasing the code ratio and providing a space between state transitions. However, these two methods have a trade off. That is, without sacrificing the code ratio, the interval between the state transitions can not be more than a certain degree, and the code ratio cannot be increased while maintaining the interval between the state transitions. In the above method, a 2/3 RLL (1,7) code is used to reduce the interference between symbols by spaces between state transitions. After that, the code was designed from a different perspective, with 8/9 RLL (0,3) and 8/9 RLL (0,4 / 4) codes. Such an encoding method has a higher code rate and has a higher channel input SNR than an encoding method having a low code rate. Further, in order to record the same amount of user data, less data may be recorded than a low code rate encoding method, thereby reducing nonlinearity by reducing interference between symbols. However, as the recording density of data storage devices gradually increases, the problem of intersymbol interference becomes more serious. As such, the coding method designed for high-density recording of data storage devices is the maximum state transition Run (MTR) code. This coding method slightly permits the method of recording at least one sample distance between state transitions of 2/3 RLL (1,7) codes, and limits the maximum number of consecutive state transitions to 2, and records these continuous states. Instead of allowing transitions, the concept is to improve the code rate that affects the channel input SNR. Therefore, the MTR encoding method is an encoding method suitable for high density recording of a data storage device.

However, the coding / decoding for recording / reproducing high density data is required by increasing the code ratio which has less interference between symbols and affects the channel input signal-to-noise ratio than the conventional MTR coding method.

An object of the present invention is to provide an encoding method capable of recording / reproducing high density data suitable for a PRML channel, and to provide a decoding method accordingly. It is another object to provide a device.

1 is a block diagram showing the configuration of an encoding / decoding apparatus for recording / reproducing high density data according to the present invention.

2 is a flowchart illustrating a method of generating code ratio 8/9, MTR = 3, K = 7 code according to the present invention.

FIG. 3 is a diagram showing 8/9 MTR = 3 and k = 7 symbols obtained in FIG. 2 in decimal form.

FIG. 4 is a diagram illustrating a look-up table between 8-bit user data and 9-bit codewords to minimize an encoder / decoder circuit among codewords satisfying MTR = 3, k 7.

According to the present invention for achieving the above object, a predetermined 8-bit binary data symbol for indexing integer time in a storage device or a communication channel A codeword of 9 bits, given by, K = 1, 2, 3, ..., 8 , K = 1, 2, 3, ..., 9, the method for encoding a state transition limit step of limiting the maximum continuous state transition to a predetermined number of times; A zero run length limiting step of limiting a length of the zero run to a predetermined number in a codeword in which state transition is restricted from the state transition limiting step; The zero run length limiting step may include a pattern removing step of removing a pattern having a bad effect on signal detection in a codeword of which the number of zero run lengths is limited to a predetermined number.

In the present invention, the state transition limiting step is characterized by limiting the continuous maximum state transition to three times or less.

In the present invention, the zero run length limiting step is limited to a maximum of 7 or less for timing and control.

In the present invention, the pattern removing step comprises: separating the first four bits and the last four bits of the 8-bit data so as to correspond to the first and last four bits of a 9-bit codeword without state; Determining from the separating step whether the middle bit of a 9 bit code word is "zero"; And if the result of the determining step is "zero", the first four bits and the last four bits of the codewords are mapped to the same 8-bit binary data, and if not "zero", the 9-bit code word most similar to the 8-bit data is mapped. Selecting and matching.

According to the present invention for achieving the above object, a method of decoding a 9-bit codeword, which detects a signal transmitted or recorded a predetermined binary symbol in a storage device or a communication channel into 8-bit binary data is a 9-bit codeword Binary data signal string of given length with, K = 1, 2, 3, ..., 9 , K = 1, 2, 3, ..., 8.

According to another aspect of the present invention, an encoding / decoding apparatus includes: an encoder unit configured to modulate and encode binary input data so as to be suitable for compression, error correction, and channel characteristics of a storage device; A signal generator for generating a signal from the modulated data output from the encoder; A read equalizer for precompensating the signal output from the signal generator; A storage unit which records a signal output from the equalizer; A read equalizer for processing to easily detect a reproduced signal from the signal recorded in the storage unit; A detector for detecting a signal to minimize an error probability in the signal output from the read equalizer; And a decoder which decodes the signal output from the detector through demodulation, error correction, and decompression.

Hereinafter, with reference to the accompanying drawings will be described the present invention in more detail.

First, modulation codes according to the present invention are represented by two parameters, an MTR parameter and a K parameter. That is, the MTR parameter represents the maximum continuous state transition in the channel output code bit sequence and reduces the intersymbol interference. In the present invention, the MTR parameter has a value of MTR = 3. Parameter k represents the maximum run lengths of zeros of the encoded sequence, where k is required for timing and gain control accuracy and is necessary for self-clocking and has k = 7 in the present invention. . The codeword according to the invention relates to a PRML code constraint for use in digital data magnetic recording of disk memory devices. Code constraints for encoding and decoding data are applicable to the PR signaling system for ML detection. Code ratios, MTR, and k parameter values according to the present invention include code ratios 8/9, MTR = 3, and k = 7 block codes.

The code ratio 8/9 maximum continuous state transition 3 code according to the present invention is a byte-oriented encoding method and has a minimum redundancy, and thus is an encoding method suitable for a high density data storage device. The present invention provides an optimized input and output look-up tables and simplified codeword generation relations for encoding and decoding block codes that limit the code ratio 8/9 maximum continuous state transition to three.

1 is a block diagram showing a configuration of an encoding / decoding apparatus for recording / reproducing high density data according to the present invention. The data encoder unit and decoder are provided to record and reproduce data without interference between signals at high density in a storage device. A negative, equalizer and detector are used.

In the apparatus shown in Fig. 1, reference numeral 100 denotes an encoder portion, reference numeral 102 denotes a signal generator, reference numeral 104 denotes a write equalizer, reference numeral 106 denotes a channel hard disk, reference numeral 108 denotes a lead equalizer, and Reference numeral 110 denotes a detector, and reference numeral 112 denotes a decoder unit. Here, the encoder unit 100 compresses user data and encodes the data into modulation codes suitable for the channel head disk 106 of the storage device after compression and error correction encoding. The decoder unit 112 decodes the recorded data into user data in the reverse order of the encoder unit 100.

Next, the operation of the apparatus shown in FIG. 1 will be described.

The signal to be recorded in the storage device is immune to noise or other factors causing signal distortion during the encoding process through the compression unit 1001 and the error correction unit 1003 of the encoder unit 100 to protect the binary data. Will have Thereafter, the modulator 1005 is encoded to suit the characteristics of the channels of the storage device, and the modulated data is generated by the signal generator 4 and pre-compensated by the read equalizer 5, followed by the channel hard disk 106. Is written on. The signal recorded on the channel hard disk 106 is reproduced and processed by the read equalizer 6 so as to easily detect the signal, and then detected by the detector 7 to minimize the error probability. The decoder 112 restores the binary data through the reverse process of writing the data to the storage device.

FIG. 2 is a flowchart illustrating a method of generating a K = 7 codeword by limiting an 8/9 maximum continuous state transition to 3 or less according to the present invention, and is a modulation coding suitable for a PR channel for ML detection. It is about.

In data storage, the most significant effect on intersymbol interference is that two consecutive state transitions are run, so that the state transition with less specific gravity allows Run to be 3, rather than channel input SNR than the conventional MTR coding method. It is intended to help recording / reproducing data by increasing the code ratio that affects it. A code with an 8/9 maximum continuous state transition of 3 has a high code rate and reduces the path of a Viterbi detector such as 2/3 RLL (1,7) and MTR = 2. Reduce delay and complexity of the detector. In addition, the k constraint is set to 7 for timing and gain control to facilitate signal detection while maintaining the self-clocking characteristics of the signal.

The present invention will be described with reference to the flowchart shown in FIG. 3.

First, a codeword satisfying a maximum state transition run (MTR) condition is generated (step 200). Here, a code ratio 8/9 having a parameter MTR = 3 and k = 7 is a 8-bit maximum continuous state transition block code. It provides 257 codewords that can correspond one-to-one from a data byte to a 9-bit codeword. Therefore, all 8-bit data combinations can be encoded and decoded into 9-bit codewords. In the present invention, a special method of mapping 8-bit data and 9-bit codeword is introduced to maintain read backward symmetry, and partitioning of a byte makes the 9-bit codeword similar to 8-bit data. Have a structure. Byte partitioning is intended to simplify the overall one-to-one correspondence between 8-bit binary data and 9-bit codewords to reduce the complexity of the encoder / decoder. If Y is a 9-bit codeword in a code ratio of 8/9 MTR = 3; k = 7 block code, Y is expressed as in Equation 3 below.

[Equation 3]

It is determined whether the maximum state transition is 3 (step 201). Here, the group of codewords satisfying the code ratio 8/9 and the constraint of the parameter MTR = 3 is the MTR restriction in the entire coded sequence. It can be generated by eliminating 9-bit sequences that have two or more consecutive state transitions on the right, or have three or more consecutive state transitions run on the right, or four or more consecutive state transitions within a 9-bit codeword. Such an MTR = 3 constraint is given by a boolean relation, such as

[Equation 4]

It is determined whether the maximum consecutive "zero" K = 7 is satisfied (step 206). Here, the k limit means that the number of consecutive "zeros" at the left end for all sequences is 5 or more and 4 or more "zero" run lengths at the right end. Codewords that have or have more than seven " zero " run lengths in a 9-bit codeword are removed, represented by the following equation.

[Equation 5]

A valid 9-bit binary sequence satisfying Equation 4 is 293 codewords. Finally, 257 9-bit codewords satisfying Equations 3 and 4 simultaneously. Therefore, only one spare codeword is present and the efficiency is high. This extra codeword can be used as a means to eliminate unwanted codeword patterns or for error detection and other special purposes.

It is determined whether the value of the fifth codeword is "zero" (step 207). Here, a division method is used as a method for giving regularity between the 9-bit codeword and the input 8-bit user data sequence. First, the first four bits and the last four bits of 8-bit data are mapped unchanged into the first and last four bits of the 9-bit codeword. In this division, if the middle bit of the 9-bit codeword, that is, the fifth bit is 0 (step 208), that is, among the 9-bit codewords satisfying Equations 4 and 5, the intermediate bit of the codeword is "0". Codewords with the value of are mapped to 8-bit binary data whose first 4 bits and the last 4 bits are the same. Thus, there are 143 pairs of 8-bit data bits and 9-bit codewords separated by division using symmetry between 8-bit user data and 9-bit encoded data.

However, if the fifth bit is not " 0 " as a result of the determination step 207, a 9-bit codeword most similar to the 8-bit user data is selected (step 210). This is a process of mapping an 8 bit sequence with a 9 bit codeword. That is, 8-bit user data and 9-bits excluded in step 210 of the 9-bit codewords to reduce the complexity of the encoder and the decoder among the 9-bit codewords whose intermediate bits of the 28-143 9-bit codewords are "1". In mapping the coded data, a 9-bit codeword most similar to 8-bit user data is selected.

Create input and output look-up tables and simplify them with Karnough Map (step 212).

3 is an 8/9 maximum continuous state transition = 3 obtained in FIG. 2; This figure shows k = 7 code in decimal form.

FIG. 4 is a diagram illustrating a look-up table between 8-bit user data and 9-bit codeword to minimize an encoder / decoder circuit among codewords satisfying a maximum continuous state transition = 3; k = 7.

As described above, modulation codes generated for the PR channel for ML detection according to the present invention provide frequent non-zero samples to improve the timing of the channel and the performance of the gain control circuit. Let's do it. It also limits the complexity of the ML detector by reducing the path during the data estimator's processing.

As described above, according to the encoding / decoding method according to the encoding / decoding method according to the present invention, a code having an 8/9 maximum continuous state transition of 3 has a high code ratio and has 2/3 RLL (1,7), MTR. By reducing the Viterbi detector's path, as in the = 2 sign, the delay and complexity of the detector is reduced. In addition, by limiting k to 7 for timing and gain control, it has an effect of facilitating signal detection while maintaining the self-clocking characteristics of the signal.

Claims (6)

Any 8-bit binary data symbol that indexes integer time in a storage device or communication channel A codeword of 9 bits, given by, K = 1, 2, 3, ..., 8 In the method for encoding with, K = 1, 2, 3, ..., 9, A state transition limiting step of limiting a maximum continuous state transition to a predetermined number of times; A zero run length limiting step of limiting a length of the zero run to a predetermined number in a codeword in which state transition is restricted from the state transition limiting step; And a pattern removing step of removing a pattern that adversely affects signal detection in a code word of which zero run length is limited by a predetermined number by the zero run length limiting step. The encoding method as claimed in claim 1, wherein the state transition limiting step limits a maximum number of consecutive state transitions to three or less times. The encoding method according to claim 1, wherein the zero run length limiting step is limited to a maximum of 7 or less for timing and control. The method of claim 1, wherein the pattern removing step is performed. Separating the first four bits and the last four bits of the 8-bit data to correspond to the first and last four bits of a 9-bit codeword without state; Determining whether the intermediate bit of the 9-bit codeword is "zero" from the separating step; And As a result of the judging step, if "zero", the first four bits and the last four bits of the codewords are mapped to the same 8-bit binary data, and if not "zero", the 9-bit codeword most similar to the 8-bit data is selected. And matching to match. A method of decoding a 9-bit codeword that detects a signal transmitted or recorded by a predetermined binary symbol in a storage device or a communication channel into 8-bit binary data. 9 bit codeword Binary data signal string of given length with, K = 1, 2, 3, ..., 9 And K = 1, 2, 3, ..., 8 decoding method. An encoder unit for modulating and encoding binary input data so as to be suitable for compression, error correction, and channel characteristics of a storage device; A signal generator for generating a signal from the modulated data output from the encoder; A read equalizer for precompensating the signal output from the signal generator; A storage unit which records a signal output from the equalizer; A read equalizer for processing to easily detect a reproduced signal from the signal recorded in the storage unit; A detector for detecting a signal to minimize an error probability in the signal output from the read equalizer; And And a decoder to decode the signal output from the detector through demodulation, error correction, and decompression.