KR0156104B1 - Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film - Google Patents

Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film Download PDF

Info

Publication number
KR0156104B1
KR0156104B1 KR1019900014379A KR900014379A KR0156104B1 KR 0156104 B1 KR0156104 B1 KR 0156104B1 KR 1019900014379 A KR1019900014379 A KR 1019900014379A KR 900014379 A KR900014379 A KR 900014379A KR 0156104 B1 KR0156104 B1 KR 0156104B1
Authority
KR
South Korea
Prior art keywords
wafer
step coverage
thin film
metal thin
semiconductor metal
Prior art date
Application number
KR1019900014379A
Other languages
Korean (ko)
Other versions
KR920007068A (en
Inventor
이현우
Original Assignee
문정환
엘지반도체주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 엘지반도체주식회사 filed Critical 문정환
Priority to KR1019900014379A priority Critical patent/KR0156104B1/en
Publication of KR920007068A publication Critical patent/KR920007068A/en
Application granted granted Critical
Publication of KR0156104B1 publication Critical patent/KR0156104B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본발명은 반도체 제조공정중 금속박막 입힘 공정에서 금속박막의 스텝 커버리지를 측정하기 위한 표준웨이퍼 제조방법에 관한 것으로 웨이퍼에 산화막을 성장시키고, 여러형태의 스텝 커버리지 측정 패턴이 내장된 마스크를 이용하여 사진감광, 사진식각을 실시한 후 건식에치를 구분지어 실시하고 웨이퍼홈을 에치할 수 있는 마스크를 이용하여 사진감광 후 웨이퍼홈을 식각하여서 이루어진다.The present invention relates to a standard wafer manufacturing method for measuring the step coverage of a metal thin film in the metal thin film coating step of the semiconductor manufacturing process, and to grow an oxide film on the wafer, using a mask having a variety of step coverage measurement pattern After performing photosensitive and photolithography, dry etching is performed separately and the wafer groove is etched after photosensitive using a mask capable of etching the wafer groove.

Description

반도체 금속박막의 스텝 커버리지 측정용 표준웨이퍼 제조방법Standard Wafer Manufacturing Method for Step Coverage Measurement of Semiconductor Metal Thin Film

제1도와 제2도는 종래의 공정 단면도.1 and 2 are cross-sectional views of a conventional process.

제3도와 제4도는 종래의 스텝 커버리지를 설명하기위한 웨이퍼및 단면도.3 and 4 are wafers and cross-sectional views for explaining the conventional step coverage.

제5도는 본발명의 공정 단면도.5 is a cross-sectional view of the process of the present invention.

제6도는 본발명의 스텝 커버리지 측정 패턴도.6 is a step coverage measurement pattern diagram of the present invention.

제7도는 본발명의 웨이퍼 홈을 에치할 수 있는 패턴도.7 is a pattern diagram that can etch the wafer groove of the present invention.

제8도는 본발명에 의한 표준 웨이퍼의 개략도.8 is a schematic view of a standard wafer according to the present invention.

본발명은 반도체 제조공정중 금속박막 입힘공정에서 금속박막의 스텝커버리지(Step Coverage)를 측정하기 위한 표준웨이퍼(Standard Wafer) 제조방법에 관한 것으로, 특히 하나의 웨이퍼로 여러가지 조건의 스텝 커버리지를 측정하기에 적당하도록 한 것이다.The present invention relates to a standard wafer manufacturing method for measuring the step coverage of the metal thin film in the metal thin film coating step of the semiconductor manufacturing process, in particular to measure the step coverage of various conditions with one wafer It is to be suitable for.

일반적인 스텝 커버리지에 대하여 설명하면 다음과 같다.A general step coverage is described as follows.

즉, 반도체 제조공정에서 금속박막 입힘공정 이전까지의 웨이퍼 상태를 보면 그 단면에 제1도와 같이 요철이 심하다.That is, when the wafer state from the semiconductor manufacturing process to the metal thin film coating process is seen, irregularities are severe in the cross section as shown in FIG.

따라서, 이러한 웨이퍼위에 금속박막을 입히기 위해서는 금속박막이 웨이퍼 표면의 요철을 얼마나 균일하게 덮을 수 있는가 하는데 있으며, 금속박막이 웨이퍼 요철을 덮는 정도를 퍼센트로 표시하면,Therefore, in order to coat the metal thin film on the wafer, how uniformly the metal thin film can cover the unevenness of the wafer surface. When the metal thin film covers the unevenness of the wafer in percent,

Figure kpo00002
Figure kpo00002

으로 나타난다.Appears.

종래의 일반적인 스텝 커버리지 측정용 표준웨이퍼를 살펴보면 제3도와 제4도에 도시된 바와 같이 실리콘 베어(Bare)웨이퍼를 산화막 성장시켜서 원하는 크기의 요철을 포토/에칭공정에 의해 만들고 그위에 금속박막을 일정두께만큼 입힌다.Referring to the conventional standard wafer for measuring step coverage, as shown in FIG. 3 and FIG. 4, silicon bare wafers are grown by an oxide film to form irregularities of a desired size by a photo / etching process and a metal thin film is placed thereon. Cover it with thickness.

공정이 완료되면 측정하고자하는 부위를 기준으로 웨이퍼를 절단하여 그 단면을 SEM등 고배율 측정장비로 촬영하여 스텝커버리지값을 구한다.After the process is completed, the wafer is cut based on the area to be measured, and the cross section is photographed with a high magnification measuring device such as SEM to obtain a step coverage value.

그러나, 상기와 같은 종래의 기술에 있어서는 한개의 표준웨이퍼에서 한가지 조건의 스텝 커버리지만을 측정할 수 있었고, 표준 웨이퍼 제조시 스텝의 깊이 및 폭, 기울기등이 원하는 형태로 만들어졌는지를 금속박막 입힘전에 절단후 촬영하여 확인해야하는 불편함이 있었으며, 웨이퍼 절단시 원하는 지점을 정확히 절단하기가 어려워 시행착오를 겪어야 했다.However, in the conventional technique as described above, only one condition of step coverage can be measured on one standard wafer, and the standard wafer is cut before the metal thin film coating to determine whether the step depth, width, and slope are made in a desired shape. There was an inconvenience to be photographed and confirmed, and it was difficult to cut exactly the desired point when cutting the wafer, and had to undergo trial and error.

또한 웨이퍼 절단시 원하는 요철과 정확히 수직이 되게 절단하기도 어려웠다.In addition, it was difficult to cut the wafer to be exactly perpendicular to the unevenness desired.

본발명은 상기와 같은 종래 기술의 결점을 감안한 것으로 여러가지 조건의 스텝 커버리지를 측정할 수 있는 하나의 표준웨이퍼를 제조하여 측정의 신뢰도를 높이고 측정에 소요되는 시간을 단축하는데 그 목적이 있다.The present invention has been made in view of the above-mentioned drawbacks of the prior art, and has the purpose of manufacturing a single standard wafer capable of measuring step coverage under various conditions, thereby increasing the reliability of the measurement and reducing the time required for the measurement.

이와 같은 목적을 달성하기 위한 본발명을 첨부된 도면을 참고로하여 상세히 설명하면 다음과 같다.The present invention for achieving the object described in detail with reference to the accompanying drawings as follows.

먼저 제5도(a)와 같은 웨이퍼(1)에 (b)와 같이 산화막(2)을 약3000Å정도 성장시킨 후 P/R을 도포하고 제6도와 같은 여러가지 형태의 스텝 커버리지 측정패턴(각기 다른 크기의 콘택트, 예를들어 1×1, 1×2 - 1×10과 2×1, 2×2 - 1×10과 ......10×10) 각기 다른 폭의 라인 예를들어 1μ짜리폭, 2μ짜리폭 -10μ짜리폭을 가짐)이 내장된 마스크 이용하여 사진감광 시킨다음 P/R을 현상한다.First, the oxide film 2 is grown on the wafer 1 as shown in FIG. 5 (a) as shown in (b) by about 3000 microseconds, and then P / R is applied and various types of step coverage measurement patterns as shown in FIG. Contacts of different sizes, e.g. 1x1, 1x2-1x10 and 2x1, 2x2-1x10 and ...... 10x10) Lines of different widths e.g. 1μ Photographs are exposed using a built-in mask having a width of 2 μm and a width of 10 μm) and then develop P / R.

여기서 제5도의 (c)나 (d)와 같이 콘택트 슬로프(접촉장 기울기)를 각기 달리 만들수 있도록 건식 에치를 구분지어 실시하고, 다시 P/R을 도포하여 제7도와 같은 웨이퍼 홈을 에치할 수 있는 크롬(Cr) 돌기를 가진 마스크를 이용하여 사진감광 시킨후 실리콘 에천트(Etchant)에서 웨이퍼홈을 식각한다.Here, as shown in (c) or (d) of FIG. 5, dry etching is performed separately so as to make different contact slopes (contact field inclination), and P / R can be applied again to etch wafer grooves as shown in FIG. The photoresist is photographed using a mask having a chrome (Cr) protrusion, and the wafer groove is etched in the silicon etchant.

이와 같이 제조하면 제8도와 같이 절단을 위한 홈(a)을 가진 표준 웨이퍼를 얻을 수 있다.In this way, a standard wafer having grooves a for cutting can be obtained as shown in FIG.

본 발명에서의 표준 웨이퍼는 절단의 용이성을 위해 (1. 1. 1)웨이퍼를 사용한다.The standard wafer in the present invention uses a (1. 1.1) wafer for ease of cutting.

이상에서 설명한 바와 같이 본발명에 의하면 한개의 표준웨이퍼에서 여러가지 조건의 스텝 커버리지의 측정이 가능하며, 표준웨이퍼내의 요철의 깊이 및 폭, 기울기등을 미리 측정, 촬영하여 알 수 있어 기존과 같이 금속박막 입힘전에 웨이퍼를 절단하여 확인할 필요가 없다.As described above, according to the present invention, it is possible to measure the step coverage of various conditions in one standard wafer, and to measure and photograph the depth, width, and inclination of irregularities in the standard wafer in advance. It is not necessary to cut and confirm the wafer before coating.

또한, 웨이퍼 가장자리로 절단을 위한 홈을 미리 만들어두므로 절단시 정확히 원하는 부위를 통과할 수 있으며, 웨이퍼 절단부위와 촬영부위(요철)가 수직을 이룰 수 있을 뿐만아니라 표준웨이퍼의 각 테스트부위에 표식을 해 두무로 SEM 촬영시 어떤 조건에서의 스텝인지 인식하기 쉬운 장점이 있다.In addition, since the groove for cutting is made in advance at the edge of the wafer, it can pass exactly the desired part during cutting, and the wafer cutting part and the photographing part (unevenness) can be perpendicular to each other. It is easy to recognize in which conditions the step is taken when scanning with SEM.

Claims (1)

실리콘 초기 웨이퍼위에 산화막을 성장시키고, 여러가지 형태의 스텝 커버리지 측정패턴이 내장된 마스크를 이용하여 사진감광과 사진식각 공정을 실시하며, 콘택트 슬로프를 각기 달리 만들 수 있도록 건식에치를 구분지어 실시하고, 웨이퍼 홈을 에치할 수 있는 마스크를 이용하여 사진감광 후 웨이퍼홈을 식각함을 특징으로하는 반도체 금속박막의 스텝 커버리지 측정용 표준웨이퍼 제조방법.An oxide film is grown on the initial silicon wafer, a photosensitive and photolithography process is performed using a mask with various types of step coverage measurement patterns, and dry etching is performed separately so that different contact slopes can be made. A method of manufacturing a standard wafer for step coverage measurement of a semiconductor metal thin film, which comprises etching a wafer groove after photo-sensitization using a mask capable of etching the groove.
KR1019900014379A 1990-09-12 1990-09-12 Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film KR0156104B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900014379A KR0156104B1 (en) 1990-09-12 1990-09-12 Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014379A KR0156104B1 (en) 1990-09-12 1990-09-12 Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film

Publications (2)

Publication Number Publication Date
KR920007068A KR920007068A (en) 1992-04-28
KR0156104B1 true KR0156104B1 (en) 1998-12-01

Family

ID=19303494

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900014379A KR0156104B1 (en) 1990-09-12 1990-09-12 Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film

Country Status (1)

Country Link
KR (1) KR0156104B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100252220B1 (en) * 1997-06-25 2000-04-15 윤종용 Oxide film thickness standard reference of semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
KR920007068A (en) 1992-04-28

Similar Documents

Publication Publication Date Title
EP0126621A2 (en) Alignment marks on semiconductor wafers and method of manufacturing the marks
US5982044A (en) Alignment pattern and algorithm for photolithographic alignment marks on semiconductor substrates
US5552718A (en) Electrical test structure and method for space and line measurement
KR19990063186A (en) Method and apparatus for quantifying proximity effects by measuring device performance
US3650020A (en) Method of monitoring semiconductor device fabrication
KR0156104B1 (en) Reference wafer fabricating method for measuring step coverage of semiconductor metal thin film
EP0276938B1 (en) Semiconductor device fabrication including a non-destructive method for examining lithographically defined features
US4717445A (en) Etch bias monitoring technique
US5043236A (en) Process for determining the focussing of a photolithographic apparatus
KR100310541B1 (en) Stencil mask
EP0230648B1 (en) Method of forming an alignment mark
JPH06180210A (en) Method for measuring size of spacer
JPS627692B2 (en)
US6368516B1 (en) Semiconductor manufacturing methods
KR960011469B1 (en) Determining mehtod of photoresist film thickness
JPH03108330A (en) Manufacture of semiconductor
KR920010752B1 (en) Etch monitoring pattern testing method
KR100232216B1 (en) Capacitor manufacturing method using thr over lay pattern for align measurement
KR100212011B1 (en) Mask used in patterning and method of exposure using the same
KR960011252B1 (en) Wire width change measurement method of defective pattern
KR920007186B1 (en) Removing method of remains at cleaning process
KR100584834B1 (en) Apparatus and method for setting bake conditions of resist
KR920010753B1 (en) Diffusion distance measuring method
KR920008037B1 (en) Etching method of semiconductor manufacturing process
KR20010066143A (en) Method for measuring trench depth of semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060619

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee