JPWO2021171898A1 - - Google Patents

Info

Publication number
JPWO2021171898A1
JPWO2021171898A1 JP2022503187A JP2022503187A JPWO2021171898A1 JP WO2021171898 A1 JPWO2021171898 A1 JP WO2021171898A1 JP 2022503187 A JP2022503187 A JP 2022503187A JP 2022503187 A JP2022503187 A JP 2022503187A JP WO2021171898 A1 JPWO2021171898 A1 JP WO2021171898A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2022503187A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021171898A1 publication Critical patent/JPWO2021171898A1/ja
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08JWORKING-UP; GENERAL PROCESSES OF COMPOUNDING; AFTER-TREATMENT NOT COVERED BY SUBCLASSES C08B, C08C, C08F, C08G or C08H
    • C08J5/00Manufacture of articles or shaped materials containing macromolecular substances
    • C08J5/18Manufacture of films or sheets
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04Interconnection of layers
    • B32B7/06Interconnection of layers permitting easy separation
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/20Adhesives in the form of films or foils characterised by their carriers
    • C09J7/22Plastics; Metallised plastics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/562Protection against mechanical damage
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08JWORKING-UP; GENERAL PROCESSES OF COMPOUNDING; AFTER-TREATMENT NOT COVERED BY SUBCLASSES C08B, C08C, C08F, C08G or C08H
    • C08J2363/00Characterised by the use of epoxy resins; Derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08JWORKING-UP; GENERAL PROCESSES OF COMPOUNDING; AFTER-TREATMENT NOT COVERED BY SUBCLASSES C08B, C08C, C08F, C08G or C08H
    • C08J2429/00Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by an alcohol, ether, aldehydo, ketonic, acetal, or ketal radical; Hydrolysed polymers of esters of unsaturated alcohols with saturated carboxylic acids; Derivatives of such polymer
    • C08J2429/14Homopolymers or copolymers of acetals or ketals obtained by polymerisation of unsaturated acetals or ketals or by after-treatment of polymers of unsaturated alcohols
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08JWORKING-UP; GENERAL PROCESSES OF COMPOUNDING; AFTER-TREATMENT NOT COVERED BY SUBCLASSES C08B, C08C, C08F, C08G or C08H
    • C08J2463/00Characterised by the use of epoxy resins; Derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08KUse of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K3/00Use of inorganic substances as compounding ingredients
    • C08K3/34Silicon-containing compounds
    • C08K3/36Silica
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08KUse of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K9/00Use of pretreated ingredients
    • C08K9/04Ingredients treated with organic substances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Medicinal Chemistry (AREA)
  • Polymers & Plastics (AREA)
  • Laminated Bodies (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Mechanical Engineering (AREA)
JP2022503187A 2020-02-27 2021-01-29 Pending JPWO2021171898A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2020031717 2020-02-27
PCT/JP2021/003161 WO2021171898A1 (en) 2020-02-27 2021-01-29 Protective coating formation sheet, method for producing chip equipped with protective coating, and layered product

Publications (1)

Publication Number Publication Date
JPWO2021171898A1 true JPWO2021171898A1 (en) 2021-09-02

Family

ID=77490089

Family Applications (5)

Application Number Title Priority Date Filing Date
JP2022503187A Pending JPWO2021171898A1 (en) 2020-02-27 2021-01-29
JP2022503688A Pending JPWO2021172426A1 (en) 2020-02-27 2021-02-25
JP2022503692A Pending JPWO2021172431A1 (en) 2020-02-27 2021-02-25
JP2022503687A Pending JPWO2021172424A1 (en) 2020-02-27 2021-02-25
JP2022503678A Pending JPWO2021172410A1 (en) 2020-02-27 2021-02-25

Family Applications After (4)

Application Number Title Priority Date Filing Date
JP2022503688A Pending JPWO2021172426A1 (en) 2020-02-27 2021-02-25
JP2022503692A Pending JPWO2021172431A1 (en) 2020-02-27 2021-02-25
JP2022503687A Pending JPWO2021172424A1 (en) 2020-02-27 2021-02-25
JP2022503678A Pending JPWO2021172410A1 (en) 2020-02-27 2021-02-25

Country Status (5)

Country Link
JP (5) JPWO2021171898A1 (en)
KR (5) KR20220147084A (en)
CN (5) CN115176333A (en)
TW (5) TW202136448A (en)
WO (5) WO2021171898A1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2022138946A1 (en) * 2020-12-25 2022-06-30
JP7095780B1 (en) * 2021-06-09 2022-07-05 住友ベークライト株式会社 Manufacturing method of release film and molded product
JP2024047019A (en) * 2022-09-26 2024-04-05 株式会社レゾナック Method for manufacturing semiconductor device, and adhesive film for semiconductor wafer processing
JP2024047022A (en) * 2022-09-26 2024-04-05 株式会社レゾナック Method for manufacturing semiconductor device and adhesive film for semiconductor wafer processing

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59205426A (en) 1983-05-06 1984-11-21 Nippon Mining Co Ltd Converter operating method
WO2003003445A1 (en) * 2001-06-29 2003-01-09 Fujitsu Limited Sheet for underfill, method for underfilling semiconductor chip, and method for mounting semiconductor chip
JP4776188B2 (en) * 2004-08-03 2011-09-21 古河電気工業株式会社 Semiconductor device manufacturing method and wafer processing tape
JP4532358B2 (en) * 2005-06-15 2010-08-25 株式会社ディスコ Manufacturing method of semiconductor chip
JP5564782B2 (en) * 2008-06-17 2014-08-06 日立化成株式会社 Adhesive composition, film adhesive, adhesive sheet and semiconductor device
JP2011171712A (en) * 2010-01-21 2011-09-01 Hitachi Chem Co Ltd Adhesive tape for semiconductor wafer processing, method of manufacturing semiconductor wafer with adhesive tape for semiconductor wafer processing, method of manufacturing semiconductor device, and semiconductor device
JP5738263B2 (en) * 2012-12-25 2015-06-17 日立化成株式会社 Manufacturing method of semiconductor device
WO2014148496A1 (en) * 2013-03-19 2014-09-25 リンテック株式会社 Film for forming protection film
JP6328987B2 (en) * 2014-04-22 2018-05-23 デクセリアルズ株式会社 Manufacturing method of semiconductor device
JP2015092594A (en) 2014-12-10 2015-05-14 日東電工株式会社 Protection layer formation film
JP6213757B2 (en) * 2015-11-04 2017-10-18 リンテック株式会社 Curable resin film and first protective film forming sheet
WO2017077957A1 (en) 2015-11-04 2017-05-11 リンテック株式会社 Method for manufacturing semiconductor device
CN109791887B (en) * 2016-10-05 2023-04-28 琳得科株式会社 First protective film-forming sheet
KR102387943B1 (en) * 2017-05-17 2022-04-18 린텍 가부시키가이샤 Semiconductor device and method for manufacturing same
JP7098221B2 (en) * 2017-09-08 2022-07-11 株式会社ディスコ Wafer processing method
TWI783082B (en) * 2017-11-17 2022-11-11 日商琳得科股份有限公司 Heat-curable resin film and sheet for forming first protective film
WO2019098334A1 (en) * 2017-11-17 2019-05-23 リンテック株式会社 Semiconductor chip with first protective film, method for manufacturing semiconductor chip with first protective film, and method for evaluating laminate of semiconductor chip and first protective film
JP7064184B2 (en) * 2017-12-11 2022-05-10 日東電工株式会社 Manufacturing method of dicing tape integrated sealing sheet and semiconductor device
TWI825080B (en) * 2018-03-30 2023-12-11 日商琳得科股份有限公司 Method for manufacturing semiconductor chip

Also Published As

Publication number Publication date
CN114728508A (en) 2022-07-08
CN114585683A (en) 2022-06-03
WO2021171898A1 (en) 2021-09-02
WO2021172424A1 (en) 2021-09-02
WO2021172426A1 (en) 2021-09-02
KR20220147063A (en) 2022-11-02
CN115176333A (en) 2022-10-11
CN114729142A (en) 2022-07-08
JPWO2021172410A1 (en) 2021-09-02
JPWO2021172426A1 (en) 2021-09-02
KR20220147064A (en) 2022-11-02
KR20220147571A (en) 2022-11-03
TW202136448A (en) 2021-10-01
KR20220147084A (en) 2022-11-02
JPWO2021172424A1 (en) 2021-09-02
KR20220147062A (en) 2022-11-02
WO2021172410A1 (en) 2021-09-02
TW202140664A (en) 2021-11-01
TW202200373A (en) 2022-01-01
CN114555697A (en) 2022-05-27
WO2021172431A1 (en) 2021-09-02
TW202146540A (en) 2021-12-16
TW202200374A (en) 2022-01-01
JPWO2021172431A1 (en) 2021-09-02

Similar Documents

Publication Publication Date Title
BR112021014123A2 (en)
JPWO2021172424A1 (en)
BR102021018859A2 (en)
BR102021015500A2 (en)
BR102020022030A2 (en)
BR112023016292A2 (en)
JPWO2022138946A1 (en)
BR102021020147A2 (en)
BR102021018926A2 (en)
BR102021018167A2 (en)
BR102021017576A2 (en)
BR102021016837A2 (en)
BR102021016551A2 (en)
BR102021016375A2 (en)
BR102021016176A2 (en)
BR102021016200A2 (en)
BR102021015566A2 (en)
BR102021015450A8 (en)
BR102021015220A2 (en)
BR102021015247A2 (en)
BR102021014044A2 (en)
BR102021014056A2 (en)
BR112021017747A2 (en)
BR112021013417A2 (en)
BR102021009555A2 (en)

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20231124