JPWO2016186143A1 - Plasma processing apparatus, plasma processing method, and semiconductor manufacturing method - Google Patents

Plasma processing apparatus, plasma processing method, and semiconductor manufacturing method Download PDF

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JPWO2016186143A1
JPWO2016186143A1 JP2016539344A JP2016539344A JPWO2016186143A1 JP WO2016186143 A1 JPWO2016186143 A1 JP WO2016186143A1 JP 2016539344 A JP2016539344 A JP 2016539344A JP 2016539344 A JP2016539344 A JP 2016539344A JP WO2016186143 A1 JPWO2016186143 A1 JP WO2016186143A1
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後藤　哲也
哲也 後藤
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Abstract

【課題】ミラー磁場に閉じ込めたプラズマを半導体製造プロセスに利用して低温・低ダメージで高品質な薄膜の形成を可能としつつ閉じ込めるべきプラズマをより効率良く励起可能なプラズマ処理装置を提供する。【解決手段】マイクロ波の供給側に形成されるミラー磁場の複数の共鳴点ＲＰ１〜ＲＰ３のうち、ミラー磁場の２つの最大磁場部間に形成される共鳴点ＲＰ１のみがプラズマ励起に利用され、他の共鳴点ＲＰ２，ＲＰ３がプラズマ励起に寄与しないように、プラズマ生成空間ＳＰが画定されている。【選択図】図１Disclosed is a plasma processing apparatus that can excite plasma to be confined more efficiently while making it possible to form a high-quality thin film at low temperature and low damage by using plasma confined in a mirror magnetic field. Of the plurality of resonance points RP1 to RP3 of the mirror magnetic field formed on the supply side of the microwave, only the resonance point RP1 formed between two maximum magnetic field portions of the mirror magnetic field is used for plasma excitation, The plasma generation space SP is defined so that the other resonance points RP2 and RP3 do not contribute to plasma excitation. [Selection] Figure 1

Description

本発明は、プラズマ処理装置、プラズマ処理方法および半導体製造方法に関する。   The present invention relates to a plasma processing apparatus, a plasma processing method, and a semiconductor manufacturing method.

半導体製造におけるプラズマによる薄膜形成プロセスは、プラズマにより反応性に富む様々な活性種を容易に発生させることが出来るため、それら活性種を利用し、基板温度を上げることなく、高品質な薄膜の形成が可能である（例えば、特許文献１参照）。   The thin film formation process using plasma in semiconductor manufacturing can easily generate various active species that are highly reactive by plasma, so these active species can be used to form high-quality thin films without increasing the substrate temperature. (For example, refer to Patent Document 1).

特公平６−９１０１３号公報Japanese Patent Publication No. 6-91013

ところで、プラズマで発生したイオンは、プラズマ電位で加速されてウエハ等の基板に衝突し、ダメージを与える可能性がある。また、処理チャンバの内壁へイオンが照射され、チャンバの内壁材料がスパッタされると、処理すべき基板が汚染される可能性もある。プラズマによる基板へのダメージを低減させるために、プラズマから基板を遠ざけると、遠ざける距離に応じて成膜に寄与する活性種が失活する確率が高くなり、高品質な薄膜の形成が困難となる。
本発明者は、国際特許出願ＰＣＴ／ＪＰ２０１４／００１８２１において、マイクロ波励起高密度プラズマ技術を基本とし、新規な磁場閉じ込め機能を追加することで、低温・低ダメージで成膜可能な技術を既に提案している。この技術の発展としてプラズマをさらにより一層安定的に効率良く生成可能なマイクロ波励起高密度プラズマ技術が求められている。By the way, there is a possibility that ions generated in the plasma are accelerated by the plasma potential and collide with a substrate such as a wafer to cause damage. In addition, if the inner wall of the processing chamber is irradiated with ions and the inner wall material of the chamber is sputtered, the substrate to be processed may be contaminated. If the substrate is moved away from the plasma in order to reduce the damage to the substrate by the plasma, the probability that the active species contributing to the film formation will be deactivated depending on the distance moved away increases, and it becomes difficult to form a high-quality thin film. .
In the international patent application PCT / JP2014 / 001821, the present inventor has already proposed a technique capable of forming a film with low temperature and low damage by adding a new magnetic confinement function based on the microwave excitation high density plasma technology. doing. As development of this technology, a microwave-excited high-density plasma technology capable of generating plasma more stably and efficiently is required.

本発明の目的は、ミラー磁場に閉じ込めたプラズマを半導体製造プロセスに利用して低温・低ダメージで高品質な薄膜の形成を可能としつつ閉じ込め領域に閉じ込めるプラズマをより効率良く生成可能なプラズマ処理装置、プラズマ処理方法およびこれを用いた半導体製造方法を提供することにある。   An object of the present invention is to use a plasma confined in a mirror magnetic field in a semiconductor manufacturing process to enable formation of a plasma confined in a confinement region more efficiently while enabling formation of a high-quality thin film at low temperature and low damage. Another object is to provide a plasma processing method and a semiconductor manufacturing method using the same.

本発明のプラズマ処理装置は、ミラー磁場を形成するミラー磁場形成機構と、前記ミラー磁場の一端側から他端側に向けてマイクロ波を供給するマイクロ波供給機構と、を有し、前記ミラー磁場と前記マイクロ波とによる電子サイクロトロン共鳴によりプラズマを生成するとともに、前記ミラー磁場により所定の閉じ込め領域に当該プラズマを閉じ込めるプラズマ処理装置であって、
前記マイクロ波の供給側に形成される複数の共鳴点のうち、前記ミラー磁場の２つの最大磁場部間に形成される共鳴点がプラズマの生成に利用され、他の共鳴点がプラズマの生成に寄与しないか実質的に寄与しないように、プラズマ生成空間が画定されていることを特徴とする。The plasma processing apparatus of the present invention includes a mirror magnetic field forming mechanism that forms a mirror magnetic field, and a microwave supply mechanism that supplies a microwave from one end side to the other end side of the mirror magnetic field, and the mirror magnetic field And a plasma processing apparatus for generating plasma by electron cyclotron resonance by the microwave and confining the plasma in a predetermined confinement region by the mirror magnetic field,
Of the plurality of resonance points formed on the microwave supply side, the resonance point formed between the two maximum magnetic field portions of the mirror magnetic field is used for plasma generation, and the other resonance points are used for plasma generation. The plasma generation space is defined so that it does not contribute or does not substantially contribute.

本発明のプラズマ処理方法は、ミラー磁場を形成するとともに、前記ミラー磁場の一端側から他端側に向けてマイクロ波を供給し、前記ミラー磁場と前記マイクロ波とによる電子サイクロトロン共鳴によりプラズマを生成するとともに、前記ミラー磁場により所定の閉じ込め領域に当該プラズマを閉じ込めるプラズマ処理方法であって、
前記マイクロ波の供給側に形成される複数の共鳴点のうち、前記ミラー磁場の２つの最大磁場部間に形成される共鳴点のみを実質的にプラズマの生成に利用する、ことを特徴とする。The plasma processing method of the present invention forms a mirror magnetic field, supplies a microwave from one end side to the other end side of the mirror magnetic field, and generates plasma by electron cyclotron resonance using the mirror magnetic field and the microwave. And a plasma processing method for confining the plasma in a predetermined confinement region by the mirror magnetic field,
Of the plurality of resonance points formed on the microwave supply side, only the resonance point formed between the two maximum magnetic field portions of the mirror magnetic field is substantially used for plasma generation. .

本発明の半導体製造方法は、上記のプラズマ処理方法を半導体製造プロセスに用いたことを特徴としている。
尚、ミラー磁場とは、高温プラズマを閉じ込める(プラズマの閉じ込め)ための磁場配位の1つである。磁束線(または磁力線)が漏斗状に収束している領域をミラーまたは磁気鏡といい，磁場はここで強くなる．荷電粒子がミラーに近づくと，らせん運動のピッチ角が増し，90°に達するとミラーから遠ざかる．このように荷電粒子がミラーで斥力をうける現象を磁気鏡効果またはミラー効果という．ミラー磁場は，図に示すように両端で磁場を強くした紡錘形の磁場配位で，ミラー効果によって中にプラズマを閉じ込めるものである
又、本発明で扱うプラズマは、大部分が中性粒子でその一部が電離している弱電離プラズマである。プラズマ中には、イオン、電子のほか励起状態の原子、分子あるいは分子の解離によって生じた中性活性種Mなどが存在している。
次に、本発明におけるプラズマの説明で使用する主な技術用語の定義を以下にしておく。
「プラズマ生成用ガス」：プラズマを生成するのに使用されるガス。
「プロセスガス」：半導体の製造プロセスに使用されるガス。
「プラズマガス」：様々な反応を起こして、電子,イオン,ラジカル,励起種などの様々な反応生成物が生成される。それらの様々な反応生成物の生成・消滅を繰り返しながら,時間とともにプラズマ特性を変化させる。
「化学種」：物質がもつ固有の物理・化学的性質によって他の物質と識別される物質種。イオン、原子、分子、原子団（基とほぼ同じ）、元素、化合物、活性種（ラジカル）、励起種、前駆体（プリカーサー；precursor）、中間体、等を一括して言う語。
「原子団」（atomic group）：化合物の分子内で、一つの化学単位を作っている原子の集団。「基」と同義に使われることもあるが，一般にはさらに広く，化学反応の際にまとまって行動するような分子ではない原子集団すべてをいう語。
「イオン」：電子の過剰あるいは欠損により電荷を帯びた原子、または原子団。
「活性種」（active species）：反応性の高い反応中間体のことをいい、反応性の高い状態にある原子・ 分子やイオンなどをいう。フリーラジカルまたは遊離基ともいう。
「励起種」：分子が、高速な電子の衝突により、形態は変わらず内部のエネルギー状態が変化（高くなる：励起状態）したもの。
「前駆体」（プリカーサー；precursor）：ある化学物質について、その物質が生成する前の段階の物質のことを指す。「前駆物質」ともいう。
「中間体」：原料物質から化学反応を利用して目的の物質を生成する際に、その工程の途中で生成される化学物質。

「ラジカル」(radical)：不対電子をもつ原子や分子、あるいはイオンのことを指す。フリーラジカルまたは遊離基（ゆうりき）ということもある。
また、C2, C3, CH2 など、不対電子を持たないがいわゆる オクテット則を満たさず、活性で短寿命の中間化学種一般の総称として「ラジカル（フリーラジカル）」と使う場合もある。The semiconductor manufacturing method of the present invention is characterized by using the above-described plasma processing method in a semiconductor manufacturing process.
The mirror magnetic field is one of magnetic field configurations for confining high temperature plasma (plasma confinement). The region where the magnetic flux lines (or lines of magnetic force) converge in a funnel shape is called a mirror or magnetic mirror, where the magnetic field becomes stronger. As the charged particle approaches the mirror, the pitch angle of the spiral motion increases, and when it reaches 90 °, it moves away from the mirror. The phenomenon in which charged particles are repelled by a mirror is called the magnetic mirror effect or mirror effect. As shown in the figure, the mirror magnetic field is a spindle-shaped magnetic field configuration in which the magnetic field is strengthened at both ends, and the plasma is confined inside by the mirror effect. The plasma handled in the present invention is mostly neutral particles. It is a weakly ionized plasma that is partially ionized. In the plasma, there are ions, electrons, atoms in the excited state, molecules, or neutral active species M generated by dissociation of molecules.
Next, definitions of main technical terms used in the description of plasma in the present invention are as follows.
“Plasma generating gas”: a gas used to generate plasma.
“Process gas”: a gas used in a semiconductor manufacturing process.
“Plasma gas”: Various reaction products such as electrons, ions, radicals, and excited species are generated by causing various reactions. The plasma characteristics change with time while repeating the generation and extinction of these various reaction products.
“Chemical species”: Substance species that are distinguished from other substances by the inherent physical and chemical properties of the substance. Ion, atom, molecule, atomic group (same as group), element, compound, active species (radical), excited species, precursor (precursor), intermediate, etc.
“Atomic group”: A group of atoms that make up a chemical unit within a molecule of a compound. A term sometimes used synonymously with "group", but it is generally broader and refers to all atomic groups that are not molecules that act together during chemical reactions.
“Ion”: An atom or atomic group charged by excess or deficiency of electrons.
“Active species”: Reactive intermediates, such as atoms, molecules and ions that are in a highly reactive state. Also called free radical or free radical.
"Excited species": A molecule whose internal energy state has changed (becomes higher: excited state) without changing its form due to high-speed electron collision.
“Precursor”: refers to a substance at a stage prior to the production of the substance. Also called “precursor”.
“Intermediate”: A chemical substance produced in the middle of a process when a target substance is produced from a raw material substance using a chemical reaction.

“Radical”: An atom, molecule, or ion with an unpaired electron. Sometimes referred to as free radicals or free radicals.
In addition, C2, C3, CH2, etc., which do not have unpaired electrons but do not satisfy the so-called octet rule, are sometimes used as “radicals” as a general term for active and short-lived intermediate species.

本発明者は、マイクロ波の供給側に形成されるミラー磁場の複数の共鳴点のうち、ミラー磁場の２つの最大磁場部間に形成される共鳴点のみをプラズマの生成に励起に利用し、他の共鳴点においてプラズマが発生しないようにすることで、安定的かつ効率良くプラズマを生成することができることを見出した。なお、共鳴点とは、マイクロ波周波数に比例する、電子サイクロトロン共鳴する磁場強度のポイント（位置）である。これにより、ミラー磁場に閉じ込めたプラズマを利用して低温・低ダメージで高品質な薄膜の形成を可能としつつ、プラズマをより効率良く生成可能となる。その結果、プラズマＣＶＤ（Plasma-enhanced Chemical Vapor Deposition:以後、「ＰＣＶＤ」と記すこともある）、プラズマを使用する原子層堆積（Plasma-enhanced Atomic Layer Deposition:以後、「ＰＡＬＤ」と記すこともある）反応性スパッタ等への応用で本発明の優位点が大いに発揮される。   The present inventor uses only the resonance point formed between the two maximum magnetic field portions of the mirror magnetic field among the plurality of resonance points of the mirror magnetic field formed on the microwave supply side for excitation for plasma generation, It has been found that plasma can be generated stably and efficiently by preventing generation of plasma at other resonance points. The resonance point is a point (position) of the magnetic field intensity that is proportional to the microwave frequency and that performs electron cyclotron resonance. This makes it possible to generate plasma more efficiently while making it possible to form a high-quality thin film at low temperature and low damage using plasma confined in a mirror magnetic field. As a result, plasma CVD (Plasma-enhanced Chemical Vapor Deposition: hereinafter also referred to as “PCVD”), atomic layer deposition using plasma (Plasma-enhanced Atomic Layer Deposition: hereinafter referred to as “PALD”) ) The advantages of the present invention are greatly exhibited in applications such as reactive sputtering.

本発明のプラズマ処理装置の一実施形態に係る成膜装置の概略を示す断面図。1 is a cross-sectional view schematically showing a film forming apparatus according to an embodiment of a plasma processing apparatus of the present invention. 永久磁石機構３０Ａの正面図。The front view of 30 A of permanent magnet mechanisms. 図２ＡのIIＢ−IIＢ線に沿った断面図。Sectional drawing along the IIB-IIB line | wire of FIG. 2A. 電位調整用分割リングの構成を示す平面図。The top view which shows the structure of the division ring for electric potential adjustment. ミラー磁場およびミラー磁場に形成される共鳴点を説明する概略図。Schematic explaining a resonance point formed in a mirror magnetic field and a mirror magnetic field. ミラー磁場の軸線上の磁場強度の分布の一例を示すグラフ。The graph which shows an example of distribution of the magnetic field intensity on the axis line of a mirror magnetic field. 本発明のプラズマ処理装置が適用される、典型的なシリコンＣＭＯＳトランジスタの構造の一例を示す断面図。Sectional drawing which shows an example of the structure of a typical silicon CMOS transistor with which the plasma processing apparatus of this invention is applied. 本発明のプラズマ処理装置の他の実施形態の概略を示す断面図。Sectional drawing which shows the outline of other embodiment of the plasma processing apparatus of this invention. 本発明のプラズマ処理装置のさらに他の実施形態の概略を示す断面図。Sectional drawing which shows the outline of other embodiment of the plasma processing apparatus of this invention. 本発明のプラズマ処理装置のさらに他の実施形態の概略を示す断面図。Sectional drawing which shows the outline of other embodiment of the plasma processing apparatus of this invention. 本発明を具現化するプラズマ処理装置の主要部示す断面図。The sectional view showing the principal part of the plasma treatment apparatus which embodies the present invention. 図９に示す装置で使用した永久磁石機構を示す斜視図。The perspective view which shows the permanent magnet mechanism used with the apparatus shown in FIG. 図９に示す装置での成膜の実施例での磁場強度を示すグラフ。The graph which shows the magnetic field intensity in the Example of the film-forming with the apparatus shown in FIG.

以下に添付図面を参照しながら、本発明の実施形態について詳細に説明する。なお、本明細書及び図面において、実質的に同一の機能構成を有する構成要素については、同一の符号を付することにより重複説明を省略する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, in this specification and drawing, about the component which has the substantially same function structure, duplication description is abbreviate | omitted by attaching | subjecting the same code | symbol.

図１は、電子サイクロトロン共鳴（Electron Cyclotron Resonance：以後、「 ＥＣＲ」と記すこともある）によるプラズマ生成を用いた成膜装置１を示している。成膜装置１は、具体的には、ＰＣＶＤ装置である。
処理チャンバ１０は、アルミニウム合金、ステンレス等の導電性材料で形成され、基準電位に接続されている。処理チャンバ１０には、図示しないが、各種ガスを供給する供給装置が接続されている。処理チャンバ１０の底部には、ウエハＷを保持するステージ５０が設けられている。また、処理チャンバ１０には、図示しないが、処理チャンバ１０内の雰囲気を排気するための排気口が設けられ、この排気口に処理チャンバ１０の外部に設置された図示しない真空ポンプなどの排気装置が接続される。この排気装置により、処理チャンバ１０内は減圧される。FIG. 1 shows a film forming apparatus 1 using plasma generation by electron cyclotron resonance (hereinafter also referred to as “ECR”). The film forming apparatus 1 is specifically a PCVD apparatus.
The processing chamber 10 is made of a conductive material such as aluminum alloy or stainless steel, and is connected to a reference potential. Although not shown, a supply device that supplies various gases is connected to the processing chamber 10. A stage 50 that holds the wafer W is provided at the bottom of the processing chamber 10. Although not shown, the processing chamber 10 is provided with an exhaust port for exhausting the atmosphere in the processing chamber 10, and an exhaust device such as a vacuum pump (not shown) installed outside the processing chamber 10 at the exhaust port. Is connected. The inside of the processing chamber 10 is depressurized by this exhaust device.

処理チャンバ１０の一方の側壁からは、筒状或いは方形状の中空柱状部１８Ａが軸線ＡＸの方向に沿って突出しており、他方の側壁からは、筒状或いは方形状の中空柱状部１８Ｂが軸線ＡＸの方向に沿って突出している。中空柱状部１８Ａ，１８Ｂの中心軸線は、水平方向に延びる軸線ＡＸと一致している。中空柱状部１８Ａの外周には、第１の永久磁石機構３０Ａが配置され、中空柱状部１８Ｂの外周には、第２の永久磁石機構３０Ｂが配置されている。第１および第２の永久磁石機構３０Ａ,３０Ｂの中心軸線は、軸線ＡＸと一致している。第１および第２の永久磁石機構３０Ａ,３０Ｂは、同じ構造を有し、協働してミラー磁場を形成する機構を構成している。
図２Ａ，２Ｂに示すように、第１の永久磁石機構３０Ａは、環状に形成された２つの永久磁石３１Ａ，３２Ａからなる。永久磁石３１Ａ，３２Ａは、放射状に着磁され、かつ互いに異なる向きに着磁されている。永久磁石３１Ａ，３２Ａは、例えば、磁力の強いネオジム（Ｎｄ）磁石（Neodymium magnet）で形成されるのが好ましい。ネオジム磁石の他、フェライト磁石、サマリウムコバルト磁石、プラセオジム磁石、ネオジウム・鉄・ボロン磁石、サマリウム窒素鉄磁石、強磁性窒化鉄、白金磁石、セリウム・コバルト磁石なども装置の設計次第で使用することが出来る。
第２の永久磁石機構３０Ｂの永久磁石３１Ｂ，３２Ｂは、軸線ＡＸ上で、永久磁石３０Ａと永久磁石３０Ｂの中点を通り、軸線ＡＸに垂直な平面において対称な寸法を持つ構造をしているが、着磁方向は逆向きとなっている。
永久磁石３１Ａ，３２Ａ，３１Ｂ，３２Ｂの形状は、図２Ａ，Ｂに示す様に円環状であるのが磁力効果の点で最善であるが、これに限定されるものではない。形成される磁力線が、軸線ＡＸに垂直な面内で、実質的に同心円か、若しくは実質的に同心円に近ければ、方形形状であっても良い。方形形状の場合、六角以上の多角形状であることが望ましい。より望ましくは、八角以上であるのが好ましい。From one side wall of the processing chamber 10, a cylindrical or rectangular hollow columnar portion 18A projects along the direction of the axis AX, and from the other side wall, a cylindrical or rectangular hollow columnar portion 18B is an axis. It protrudes along the direction of AX. The central axes of the hollow columnar portions 18A and 18B coincide with the axis AX extending in the horizontal direction. A first permanent magnet mechanism 30A is disposed on the outer periphery of the hollow columnar portion 18A, and a second permanent magnet mechanism 30B is disposed on the outer periphery of the hollow columnar portion 18B. The central axes of the first and second permanent magnet mechanisms 30A and 30B coincide with the axis AX. The first and second permanent magnet mechanisms 30A and 30B have the same structure, and constitute a mechanism that cooperates to form a mirror magnetic field.
As shown in FIGS. 2A and 2B, the first permanent magnet mechanism 30A is composed of two permanent magnets 31A and 32A formed in an annular shape. The permanent magnets 31A and 32A are magnetized radially and magnetized in different directions. The permanent magnets 31A and 32A are preferably formed of, for example, a strong neodymium (Nd) magnet (Neodymium magnet). In addition to neodymium magnets, ferrite magnets, samarium cobalt magnets, praseodymium magnets, neodymium / iron / boron magnets, samarium nitrogen iron magnets, ferromagnetic iron nitride, platinum magnets, cerium / cobalt magnets, etc. can be used depending on the design of the equipment. I can do it.
The permanent magnets 31B and 32B of the second permanent magnet mechanism 30B have a structure having symmetrical dimensions on a plane perpendicular to the axis AX, passing through the midpoint between the permanent magnet 30A and the permanent magnet 30B on the axis AX. However, the magnetization direction is opposite.
The shape of the permanent magnets 31A, 32A, 31B, and 32B is best in terms of magnetic effect as shown in FIGS. 2A and 2B, but is not limited thereto. If the magnetic field lines to be formed are substantially concentric or substantially close to a concentric circle in a plane perpendicular to the axis AX, the magnetic field lines may be rectangular. In the case of a square shape, it is desirable that the shape is a polygonal shape of hexagon or more. More desirably, the number is eight or more.

図１において、中空柱状部１８Ｂの外側端部はプレート１９により密閉されている。中空柱状部１８Ａの外側端部には、導波管１５が接続され、中空柱状部１８Ａと導波管１５との間には、減圧丙空間を形成するために、酸化アルミニウム、石英等の誘電体材料で形成されたマイクロ波ＭＷを透過する部材（マイクロ波透過部材）である入射窓６０が設けられている。入射窓６０の先端面６０ａは、処理チャンバ１０の内壁面とともにプラズマＰＬが生成可能なプラズマ形成空間ＳＰを画定している。入射窓６０の後端部には、フランジ６０ｂが形成され、フランジ６０ｂと中空柱状部１８Ｂおよび導波管１５との間は、ＯリングＯＲ１，ＯＲ２でシールされている。   In FIG. 1, the outer end portion of the hollow columnar portion 18 </ b> B is sealed with a plate 19. A waveguide 15 is connected to the outer end of the hollow columnar portion 18A, and a dielectric such as aluminum oxide or quartz is formed between the hollow columnar portion 18A and the waveguide 15 in order to form a decompression space. An incident window 60 that is a member (microwave transmitting member) that transmits the microwave MW formed of the body material is provided. The tip surface 60 a of the entrance window 60 defines a plasma formation space SP in which the plasma PL can be generated together with the inner wall surface of the processing chamber 10. A flange 60b is formed at the rear end of the incident window 60, and the flange 60b, the hollow columnar portion 18B, and the waveguide 15 are sealed with O-rings OR1 and OR2.

中空柱状部１８Ａおよび１８Ｂの処理チャンバ１０側の端部には、円形の開口をもつ処理チャンバ１０内でのプラズマＰＬの存在領域を画定するためのリミッター部材２０Ａ，２０Ｂが設置されている。中空柱状部１８Ｂ内には、軸線ＡＸを中心軸にもつ、電位調整用分割リング４０が設けられている。電位調整用分割リング４０は、図３に示すように、円盤状の電極４１、この外側に同心に配置されたリング状の電極４２および４３からなる。   Limiter members 20A and 20B are provided at the ends of the hollow columnar portions 18A and 18B on the processing chamber 10 side so as to define the region where the plasma PL exists in the processing chamber 10 having a circular opening. In the hollow columnar portion 18B, a potential adjusting split ring 40 having an axis AX as a central axis is provided. As shown in FIG. 3, the potential adjusting split ring 40 includes a disk-shaped electrode 41 and ring-shaped electrodes 42 and 43 disposed concentrically on the outside thereof.

図４に示すように、永久磁石機構３０Ａ、３０Ｂによりミラー磁場ＭＭＦが形成される。永久磁石を用いてミラー磁場ＭＭＦを形成するとともにマイクロ波ＭＷを供給すると、永久磁石機構３０Ａの近くには、軸線ＡＸの方向において３か所に共鳴点ＲＰ１〜ＲＰ３が形成される。共鳴点は、ＥＣＲを起こす磁場強度のポイントであり、マイクロ波周波数に比例する。たとえば、マイクロ波周波数が６ＧＨｚの場合には、図５に示すように、共鳴点ＲＰ１〜ＲＰ３の磁場強度は２０７１ガウスとなる。マイクロ波周波数が２．４５ＧＨｚの場合、共鳴点ＲＰ１〜ＲＰ３の磁場強度は８７５ガウスとなる。
プラズマＰＬは、共鳴点を含むその付近で生成される。上記した共鳴点ＲＰ１〜ＲＰ３が減圧雰囲気にあるプラズマ生成空間ＳＰ内にあると、すべての共鳴点ＲＰ１〜ＲＰ３付近でプラズマＰＬが生成される。生成されたプラズマＰＬ中の荷電粒子（ここでは電子）は、ミラー磁場ＭＭＦの磁力線ＭＦＬに拘束されるが、磁力線ＭＦＬの方向には自由に運動できる。磁力線ＭＦＬに沿って運動するプラズマＰＬを構成する電子は、いわゆる磁気ミラー効果により２つの最大磁場部Ｍ１Ａ，Ｍ１Ｂの間でバウンス運動をすることで、２つの最大磁場部Ｍ１Ａ，Ｍ１Ｂの間に閉じ込められる。As shown in FIG. 4, a mirror magnetic field MMF is formed by the permanent magnet mechanisms 30A and 30B. When the mirror magnetic field MMF is formed using a permanent magnet and the microwave MW is supplied, resonance points RP1 to RP3 are formed at three locations in the direction of the axis AX near the permanent magnet mechanism 30A. The resonance point is a point of magnetic field strength that causes ECR, and is proportional to the microwave frequency. For example, when the microwave frequency is 6 GHz, the magnetic field strength at the resonance points RP1 to RP3 is 2071 gauss as shown in FIG. When the microwave frequency is 2.45 GHz, the magnetic field strength of the resonance points RP1 to RP3 is 875 gauss.
The plasma PL is generated in the vicinity including the resonance point. When the above-described resonance points RP1 to RP3 are in the plasma generation space SP in the reduced pressure atmosphere, the plasma PL is generated near all the resonance points RP1 to RP3. The charged particles (electrons here) in the generated plasma PL are restrained by the magnetic lines MFL of the mirror magnetic field MMF, but can move freely in the direction of the magnetic lines MFL. Electrons constituting the plasma PL that moves along the magnetic field lines MFL bounce between the two maximum magnetic field portions M1A and M1B by a so-called magnetic mirror effect, and are confined between the two maximum magnetic field portions M1A and M1B. It is done.

ここで、本発明者は、共鳴点ＲＰ１〜ＲＰ３のうち、共鳴点ＲＰ１のみ、すなわち、図５に示すミラー磁場の２つの最大磁場部Ｍ１Ａ,Ｍ１Ｂ間に形成される共鳴点ＲＰ１のみをプラズマの生成に利用し、他の共鳴点ＲＰ２およびＲＰ３はプラズマの生成に寄与しないようにすることで、２つの最大磁場部Ｍ１Ａ,Ｍ１Ｂ間に形成される閉じ込め領域に閉じ込めるプラズマをより効率良く生成可能であることを見出した。なお、共鳴点ＲＰ２およびＲＰ３がプラズマ生成に寄与しないとは、実質的に寄与しないという意味も含む。即ち、共鳴点ＲＰ２およびＲＰ３がプラズマを生成するのにわずかでも寄与したとしても全体としてはほとんど無視できる程度の場合も含む。
具体的には、図１に示すように、共鳴点ＲＰ１のみをプラズマ生成空間ＳＰ内に配置し、他の共鳴点ＲＰ２およびＲＰ３を入射窓６０中に位置させる。共鳴点ＲＰ２およびＲＰ３は、入射窓６０中にあるので、共鳴点ＲＰ２およびＲＰ３ではプラズマ形成がされないので無駄なプラズマを形成することはない。Here, the inventor of the resonance point RP1 to RP3, only the resonance point RP1, that is, only the resonance point RP1 formed between the two maximum magnetic field portions M1A and M1B of the mirror magnetic field shown in FIG. It is possible to generate plasma confined in the confinement region formed between the two maximum magnetic field portions M1A and M1B more efficiently by using the other resonance points RP2 and RP3 so as not to contribute to plasma generation. I found out. Note that the fact that the resonance points RP2 and RP3 do not contribute to plasma generation also includes the meaning that they do not substantially contribute. That is, even if the resonance points RP2 and RP3 contribute even slightly to the generation of plasma, the case where the resonance points RP2 and RP3 can be almost ignored as a whole is included.
Specifically, as shown in FIG. 1, only the resonance point RP1 is arranged in the plasma generation space SP, and the other resonance points RP2 and RP3 are positioned in the incident window 60. Since the resonance points RP2 and RP3 are in the incident window 60, plasma is not formed at the resonance points RP2 and RP3, so that useless plasma is not formed.

そして、図１に示すように、閉じ込め領域ＰＣＲから中性のラジカルが処理すべきウエハＷに選択的に到達するように、ウエハＷを閉じ込め領域ＰＣＲに対向させて配置する。ウエハＷの表面と閉じ込め領域ＰＣＲの外延（最大外周位置）との距離Ｌが、プラズマＰＬ中の荷電粒子が閉じ込め領域ＰＣＲに閉じ込められた状態で、閉じ込め領域ＰＣＲから中性のラジカルのみが活性を失うことなく処理すべきウエハＷに到達するように設定される。これにより、プラズマからのウエハＷへのイオン照射を大幅に減らしつつ、ウエハＷへの中性の活性種の照射を最大化することが可能となる。   Then, as shown in FIG. 1, the wafer W is arranged to face the confinement region PCR so that neutral radicals selectively reach the wafer W to be processed from the confinement region PCR. When the distance L between the surface of the wafer W and the extension (maximum outer peripheral position) of the confinement region PCR is such that charged particles in the plasma PL are confined in the confinement region PCR, only neutral radicals are activated from the confinement region PCR. It is set so as to reach the wafer W to be processed without loss. This makes it possible to maximize irradiation of neutral active species to the wafer W while greatly reducing ion irradiation from the plasma to the wafer W.

リミッター部材２０Ａ，２０Ｂの役割について説明する。上記した閉じ込め領域ＰＣＲの外延の位置が不確定であると、ウエハＷに荷電粒子が入射する可能性がある。荷電粒子は磁力線に拘束されることから、プラズマの存在空間（閉じ込め領域ＰＣＲ）の外延は、リミッター部材２０Ａ，２０Ｂの開口の縁部の位置で画定される。すなわち、リミッター部材２０Ａ，２０Ｂを設置することで、閉じ込め領域ＰＣＲの外延をより精密にコントロールすることができる。リミッター部材２０Ａ，２０Ｂの形成材料は、特に限定されないが、プラズマ生成室１７Ａで生成されたプラズマがリミッター部材２０Ａ，２０Ｂに衝突し、リミッター部材２０Ａ，２０Ｂの形成材料がスパッタされ、このスパッタされた材料がウエハＷに付着する可能性もある。このため、リミッター部材２０Ａ，２０Ｂは、スパッタされない材料で形成するか、スパッタされたとしても、処理すべき基体であるウエハＷ、または成膜する薄膜の特性に影響を与えない材料（Ａ）で形成するのが望ましい。また、リミッター部材２０Ａ，２０Ｂの表面を例えば、前記材料（Ａ）コーティングしてもよい。
同様に、中空柱状部１８Ａ，１８Ｂの内壁面もプラズマが衝突して中空柱状部１８Ａ，１８Ｂの形成材料がスパッタされ、このスパッタされた材料がウエハＷまたは成膜される薄膜に付着する可能性もある。このため、中空柱状部１８Ａ，１８Ｂの形成材料またはコーティング材料を前記材料（Ａ）で形成するのが望ましい。The role of the limiter members 20A and 20B will be described. If the position of the extension of the confinement region PCR is uncertain, charged particles may enter the wafer W. Since charged particles are constrained by magnetic lines of force, the extension of the plasma space (confinement region PCR) is defined at the position of the edge of the opening of the limiter members 20A and 20B. That is, by installing the limiter members 20A and 20B, the extension of the confinement region PCR can be controlled more precisely. The material for forming the limiter members 20A and 20B is not particularly limited, but the plasma generated in the plasma generation chamber 17A collides with the limiter members 20A and 20B, and the material for forming the limiter members 20A and 20B is sputtered. There is also a possibility that the material adheres to the wafer W. For this reason, the limiter members 20A and 20B are made of a material that is not sputtered, or even if sputtered, the limiter members 20A and 20B are made of a material (A) that does not affect the characteristics of the wafer W that is the substrate to be processed or the thin film to be formed. It is desirable to form. Further, the surfaces of the limiter members 20A and 20B may be coated with the material (A), for example.
Similarly, the inner wall surfaces of the hollow columnar portions 18A and 18B may also be sputtered to cause the material forming the hollow columnar portions 18A and 18B to be sputtered, and the sputtered material may adhere to the wafer W or the thin film to be formed. There is also. For this reason, it is desirable to form the forming material or coating material of the hollow columnar portions 18A and 18B with the material (A).

電位調整用分割リング４０の役割について説明する。ミラー磁場でプラズマを閉じ込めると、軸線ＡＸを中心とする径方向（軸線ＡＸに直交する方向）に電位勾配が形成され、閉じ込め領域ＰＣＲに閉じ込められたプラズマＰＬが径方向に拡散しやすくなることが知られている。このため、例えば、電位調整用分割リング４０の中心部に位置する電極４１をマイナスの電位に、電極４２を基準電位に、最外周に配置された電極４３をプラスの電位に接続する。これにより、閉じ込め領域ＰＣＲに閉じ込められたプラズマＰＬに生じる径方向の電位勾配と逆向きの電位勾配を与え、閉じ込め領域ＰＣＲに閉じ込められたプラズマＰＬの電位分布を平坦化する。これにより、プラズマＰＬが径方向に拡散することを抑制できて、ウエハＷの荷電粒子によるダメージの発生をより一層抑制できる。   The role of the potential adjusting split ring 40 will be described. When the plasma is confined by the mirror magnetic field, a potential gradient is formed in the radial direction centering on the axis AX (direction orthogonal to the axis AX), and the plasma PL confined in the confinement region PCR may easily diffuse in the radial direction. Are known. For this reason, for example, the electrode 41 positioned at the center of the potential adjusting split ring 40 is connected to a negative potential, the electrode 42 is connected to a reference potential, and the electrode 43 disposed on the outermost periphery is connected to a positive potential. Thereby, a potential gradient in the opposite direction to the radial potential gradient generated in the plasma PL confined in the confinement region PCR is given, and the potential distribution of the plasma PL confined in the confinement region PCR is flattened. Thereby, it is possible to suppress the diffusion of the plasma PL in the radial direction, and it is possible to further suppress the occurrence of damage due to the charged particles of the wafer W.

適用例１
本実施形態の装置を図６に示す典型的なシリコンＣＭＯＳトランジスタにおける、シリコン窒化膜のサイドウォール形成工程に適用した。図６において、５１０はＷ／ＴｉＮ電極、５２０はシリコン窒化膜サイドウォール、５３０はシリサイド、５４０はソースドレインエクステンション層、および、５５０はポリシリコンゲートを示している。
シランガス、アンモニアガスを流してプラズマを生成し、基板温度400℃にて形成し、ソースドレインのコンタクト電極形成プロセスにセルフアラインコンタクト工程に用いるシリコン窒化膜を形成した。得られたシリコン窒化膜は従来法に比べ格段に優れた膜品質を有していた。 Application example 1
The apparatus of this embodiment was applied to the side wall formation process of the silicon nitride film in the typical silicon CMOS transistor shown in FIG. In FIG. 6, 510 is a W / TiN electrode, 520 is a side wall of a silicon nitride film, 530 is a silicide, 540 is a source / drain extension layer, and 550 is a polysilicon gate.
Silane gas and ammonia gas were allowed to flow to generate plasma, which was formed at a substrate temperature of 400 ° C., and a silicon nitride film used for the self-aligned contact process was formed in the source / drain contact electrode formation process. The obtained silicon nitride film had much better film quality than the conventional method.

ここで、上記工程におけるシリコン窒化膜において、その高品質化が要請される理由について説明する。
デバイス寸法の微細化の要請からコンタクト電極構造にセルフアラインコンタクトを導入するためにゲート電極側壁のゲートスペーサーに高品質なシリコン窒化膜を導入することが必須となる。このシリコン窒化膜はデバイスの高性能化に伴い、その高品質化・低温成膜化が強く要求されている。デバイスの微細化・高性能化行うためには、シリサイドやHigh-k/メタルゲート技術等の様々な技術が導入されており、高温にしてしまうとどうしても特性が劣化してしまうからである。前述したセルフアラインコンタクトプロセスでは、コンタクトホール形成の際のシリコン酸化膜系の絶縁膜エッチングの際のストッピング膜に使われている。このシリコン窒化膜の形成温度を下げると、結合の弱い品質の悪い膜になってしまい、ストッパーの役割を果たせなくなり、微細加工が不可能となってしまう。
また、成膜後のプロセス工程で多用されるフッ酸洗浄等のウェット洗浄工程でエッチングされないようにしなくてはならない。故に、シリコン窒化膜の成膜温度の低減と高品質薄膜形成の両立が必須である。これを実現するには、成膜材料ガスを活性化させるプラズマを用いたＰＣＶＤを用いることが有効である。
現在では、大口径ウェーハプロセスにおいてもＰＣＶＤ技術、もしくはＰＡＬＤ技術が用いられており、膜質向上の研究開発が続いている。本実施形態に係るプラズマＣＶＤ装置は、上記のような要求に応え、プロセスマージンを広げ、歩留まりの向上にも貢献するものである。Here, the reason why the silicon nitride film in the above process is required to have high quality will be described.
In order to introduce a self-aligned contact into the contact electrode structure, it is essential to introduce a high-quality silicon nitride film into the gate spacer on the side wall of the gate electrode in order to reduce the device size. The silicon nitride film is strongly required to have high quality and low temperature as the performance of the device increases. This is because various technologies such as silicide and high-k / metal gate technology have been introduced for miniaturization and high performance of devices, and the characteristics are inevitably deteriorated at high temperatures. In the above-described self-alignment contact process, it is used as a stopping film for etching a silicon oxide insulating film when forming a contact hole. If the formation temperature of the silicon nitride film is lowered, the film becomes weak and poor in quality, and cannot serve as a stopper, and fine processing becomes impossible.
In addition, it must be prevented from being etched in a wet cleaning process such as hydrofluoric acid cleaning frequently used in the process process after film formation. Therefore, it is indispensable to reduce the temperature for forming the silicon nitride film and form a high-quality thin film. To realize this, it is effective to use PCVD using plasma that activates the film forming material gas.
At present, PCVD technology or PALD technology is also used in large-diameter wafer processes, and research and development for improving film quality continues. The plasma CVD apparatus according to the present embodiment responds to the above-described requirements, widens the process margin, and contributes to the yield improvement.

さらに、本実施形態に係る装置の他の観点からのメリットについて説明する。
近年、電子機器の高機能化と消費者のニーズの多様化に対応した多品種少量生産プロセスの半導体デバイス生産システム（ミニマルファブシステム）が提案され、低コスト装置から構成される革新的デバイス製造プロセスとして大いに期待されている。現在まで、半導体ＩＣの基本技術となるシリコンＣＭＯＳ回路を作製するためのミニマルファブ装置及びプロセスが開発されている。ミニマルファブ装置においても、高品質な薄膜形成が可能なプラズマＣＶＤ装置の実現が強く求められる。
本実施形態では、拡散しやすいプラズマを磁場により狭い領域に閉じ込めるため、装置の小型化に適している。加えて、また、高い磁場強度のミラー磁場を形成するために永久磁石を用いるため、電磁石等用いる場合と比較して装置の小型化が容易である。このことから、本実施形態によれば、ミニマルファブシステムにおけるＣＭＯＳ回路のさらなる微細化・高性能化に必須となる、ミニマル化されたシリコン窒化膜形成用プラズマＣＶＤ装置を実現することができる。Furthermore, the merit from the other viewpoint of the apparatus which concerns on this embodiment is demonstrated.
In recent years, a semiconductor device production system (minimal fab system) with a high-mix low-volume production process has been proposed in response to higher functionality of electronic equipment and diversifying consumer needs, and an innovative device manufacturing process consisting of low-cost equipment. As much as expected. To date, minimal fab devices and processes have been developed for fabricating silicon CMOS circuits, which are the basic technology of semiconductor ICs. Even in the minimal fab apparatus, it is strongly required to realize a plasma CVD apparatus capable of forming a high-quality thin film.
In this embodiment, plasma that is easy to diffuse is confined in a narrow region by a magnetic field, which is suitable for downsizing of the apparatus. In addition, since a permanent magnet is used to form a mirror magnetic field having a high magnetic field strength, the apparatus can be easily downsized as compared with the case of using an electromagnet or the like. Thus, according to the present embodiment, it is possible to realize a minimalized plasma CVD apparatus for forming a silicon nitride film, which is indispensable for further miniaturization and higher performance of the CMOS circuit in the minimal fab system.

本実施形態に係る装置は、高品質シリコン窒化膜形成のみならず、酸化物形成にも適用可能であり、今後のさらなるシリコンデバイスの高性能化に必須であるＨｉｇｈ−ｋ（高誘電率）ゲート絶縁膜形成、メタルゲート形成や、ＣＭＯＳイメージセンサ分野で要求される高容量密度キャパシタ形成、さらにはＧａＮパワーデバイスの高品質パッシベーション膜形成等、その応用範囲は非常に広いと考えられる。   The apparatus according to the present embodiment can be applied not only to the formation of high-quality silicon nitride films but also to the formation of oxides, and is a high-k (high dielectric constant) gate that is indispensable for further high-performance silicon devices in the future The range of applications such as formation of insulating films, metal gates, formation of high-capacity density capacitors required in the field of CMOS image sensors, and formation of high-quality passivation films for GaN power devices is considered to be very wide.

変形例
図７Ａに変形例を示す。図７Ａにおいて、共鳴点ＲＰ１のみがプラズマ生成空間ＳＰ内に配置され、中間の共鳴点ＲＰ２は誘電体からなる透過窓１６０に位置し、最も外側の共鳴点ＲＰ３を大気側に位置するようにした。また、外側の永久磁石３２Ａの内径を、内側の永久磁石３１の内径よりも拡大させて、ＯリングＯＲ１，ＯＲ２を設けるフランジの場所を確保した。共鳴点ＲＰ３は、大気中にあるので、強いマイクロ波に晒されたとしてもても、プラズマは励起されない。また、共鳴点ＲＰ３を大気中に配置することで、誘電体からなる透過窓１６０を小型化できる。 Modification FIG. 7A shows a modification. In FIG. 7A, only the resonance point RP1 is arranged in the plasma generation space SP, the intermediate resonance point RP2 is located in the transmission window 160 made of a dielectric, and the outermost resonance point RP3 is located on the atmosphere side. . Further, the inner diameter of the outer permanent magnet 32A was made larger than the inner diameter of the inner permanent magnet 31 to secure a flange location for providing the O-rings OR1 and OR2. Since the resonance point RP3 is in the atmosphere, the plasma is not excited even when exposed to strong microwaves. Further, by arranging the resonance point RP3 in the atmosphere, the transmission window 160 made of a dielectric can be reduced in size.

図７Ｂに他の変形例を示す。図７Ｂにおいて、共鳴点ＲＰ１のみがプラズマ生成空間ＳＰ内に配置され、中間の共鳴点ＲＰ２は誘電体からなる透過窓２６０に位置し、最も外側の共鳴点ＲＰ３を大気側に位置するようにした。また、Ｏリングを用いてシールする代わりに、ロウ付け３００によりシールする構成としている。この構成によれば、ＯリングＯＲ１，ＯＲ２を設けるフランジの場所が不要になるとともに、誘電体からなる透過窓２６０をさらに小型化できる。
ミラー磁場形成機構としてこれまでの説明では、永久磁石を使用することで本発明の適用がミニマルハブなど用の超小型のプラズマ処理装置に最適であること中心に述べてきたが、本発明の趣旨からすれば、これまでの記載に限定されるものではない。以下にその好適な例の一つを説明する。FIG. 7B shows another modification. In FIG. 7B, only the resonance point RP1 is arranged in the plasma generation space SP, the intermediate resonance point RP2 is located in the transmission window 260 made of a dielectric, and the outermost resonance point RP3 is located on the atmosphere side. . Moreover, it is set as the structure sealed by brazing 300 instead of sealing using an O-ring. According to this configuration, the location of the flange where the O-rings OR1 and OR2 are provided becomes unnecessary, and the transmission window 260 made of a dielectric can be further reduced in size.
In the above description as the mirror magnetic field forming mechanism, the application of the present invention has been mainly described by using a permanent magnet, so that the application of the present invention is most suitable for an ultra-compact plasma processing apparatus for a minimal hub or the like. Therefore, it is not limited to the description so far. One suitable example will be described below.

図８に、さらに他の変形例を示す。
図８において、ミラー磁場形成機構は、軸線ＡＸ上において離隔して配置された電流コイル１３０Ａ，１３０Ｂで構成される。第１および第２の電流コイル１３０Ａ，１３０Ｂを用いた場合、電流コイル１３０Ａの近くに２つの共鳴点ＲＰ１，ＲＰ２が形成される。共鳴点ＲＰ１のみをプラズマ生成空間ＳＰ内に配置し、他の共鳴点ＲＰ２を入射窓６０上に位置させる。共鳴点ＲＰ２は、減圧雰囲気下にないので、共鳴点ＲＰ２付近で無駄なプラズマが形成されず、閉じ込め領域ＰＣＲに閉じ込めるプラズマＰＬをより効率良く生成可能となる。
本発明の適用が大型装置の場合は、この例のようにミラー磁場形成機構を電流コイルで構成することが出来る。FIG. 8 shows still another modification.
In FIG. 8, the mirror magnetic field forming mechanism is configured by current coils 130 </ b> A and 130 </ b> B spaced apart on the axis AX. When the first and second current coils 130A and 130B are used, two resonance points RP1 and RP2 are formed near the current coil 130A. Only the resonance point RP1 is disposed in the plasma generation space SP, and the other resonance point RP2 is positioned on the incident window 60. Since the resonance point RP2 is not in a reduced pressure atmosphere, useless plasma is not formed near the resonance point RP2, and the plasma PL confined in the confinement region PCR can be generated more efficiently.
When the application of the present invention is a large apparatus, the mirror magnetic field forming mechanism can be configured with a current coil as in this example.

適用例２
図９乃至図１１を参照しながら高品質の窒化シリコン膜を作成した例を説明する。
図９、１０は、本適用例で作成された超小型のＰＣＶＤ装置の主要部を説明するための図である。
図９は、プラズマ処理部の断面図である。ＰＣＶＤ装置９００は、基本的には図１に示す装置１と同様の機構を有する。
ミラー磁場形成機構３００Ａは、永久磁石３１０Ａ，３２０Ａを備えている。
ミラー磁場形成機構３００Ｂは、永久磁石３１０Ｂ，３２０Ｂを備えている。
ミラー磁場形成機構３００Ａは、図１０に模式的に示すように、その構成要素である永久磁石（３２０Ａ１乃至３２０Ａ８）は、台柱状の形状をしており、取り付け部材９０１Ａに嵌合付設されている。８個の永久磁石（３２０Ａ１乃至３２０Ａ８）が取り付け部材９０１Ａに取り付けられて形成される中空部の断面は八角形をしている。
永久磁石３１０Ａ，３２０Ａは、放射状に着磁され、かつ互いに異なる向きに着磁されている。
以上の点は、ミラー磁場形成機構３００Ｂも同様である。
ミラー磁場形成機構３００Ａ、３００Ｂは、同形状、同寸法に設計されている。 Application example 2
An example in which a high-quality silicon nitride film is formed will be described with reference to FIGS.
9 and 10 are diagrams for explaining the main part of the ultra-small PCVD apparatus created in this application example.
FIG. 9 is a cross-sectional view of the plasma processing unit. The PCVD apparatus 900 basically has the same mechanism as that of the apparatus 1 shown in FIG.
The mirror magnetic field forming mechanism 300A includes permanent magnets 310A and 320A.
The mirror magnetic field forming mechanism 300B includes permanent magnets 310B and 320B.
As schematically shown in FIG. 10, in the mirror magnetic field forming mechanism 300A, the permanent magnets (320A1 to 320A8) that are constituent elements thereof have a trapezoidal shape and are fitted and attached to the mounting member 901A. . The cross section of the hollow portion formed by attaching the eight permanent magnets (320A1 to 320A8) to the attachment member 901A has an octagonal shape.
The permanent magnets 310A and 320A are magnetized radially and magnetized in different directions.
The same applies to the mirror magnetic field forming mechanism 300B.
The mirror magnetic field forming mechanisms 300A and 300B are designed to have the same shape and the same dimensions.

図１１に、以下の成膜時の磁場強度を示す。横軸は、軸上の位置であり、「０」の位置は、中心位置線ＣＬの位置である。縦軸は、各位置での磁場強度を示す。
図中のＰＲ１は、ＥＣＲの位置で、軸上中心から２９mmであった。その磁場強度は、２０９０ガウスであった。最大磁場強度は、４３４０ガウス、最小磁場強度は、８５０ガウスであった。ミラー比は、５．１であった。
チャンバ内のプラズマ形成空間を所定の真空度に減圧した状態で、チャンバ内に設置したステージ５００に、ハーフインチのシリコンウエハ（直径12.5mm）を設置した。
ステージ５００に設置されたウエハはステージ５００に設けたヒーター（不図示）により、300℃に加熱保温された。
プラズマ形成空間を含むチャンバ内の空間に、Ar：2sccm（cc/分）、SiH4：0.2sccm、N2：4sccm、H2:1sccmの条件で各ガスを流し、前記空間の圧力を8mTorrに維持した。
5.8GHz、３０Ｗのマイクロ波を投入し、プラズマを形成して上記ウエハ上にSi3N4膜を3分間で30nm厚に形成した。FIG. 11 shows the magnetic field strength during the following film formation. The horizontal axis is the position on the axis, and the position “0” is the position of the center position line CL. The vertical axis represents the magnetic field strength at each position.
PR1 in the figure was 29 mm from the axial center at the position of ECR. The magnetic field strength was 2090 gauss. The maximum magnetic field strength was 4340 gauss, and the minimum magnetic field strength was 850 gauss. The mirror ratio was 5.1.
A half-inch silicon wafer (12.5 mm in diameter) was placed on a stage 500 placed in the chamber in a state where the plasma formation space in the chamber was depressurized to a predetermined degree of vacuum.
The wafer placed on the stage 500 was heated and kept at 300 ° C. by a heater (not shown) provided on the stage 500.
The space in the chamber containing the plasma forming space, Ar: 2sccm (cc / min), SiH 4: 0.2sccm, N 2: 4sccm, H2: flowing the gas in 1sccm conditions, maintaining the pressure of the space 8mTorr did.
A microwave of 5.8 GHz and 30 W was input to form plasma, and a Si 3 N 4 film was formed on the wafer to a thickness of 30 nm in 3 minutes.

上記のようにして成膜したSi3N4膜の品質を、0.5％のフッ酸のエッチングレートで評価した。
エッチングレートは、従来技術の減圧CVDで710℃で成膜した膜、及び従来技術のマイクロ波励起高密度プラズマによるプラズマCVDで400℃で成膜した膜、および上記の本発明技術により形成した膜について評価した。
エッチングレートは、減圧CVDの膜では0.4nm/min、従来技術のプラズマCVDの膜では0.4nm/min、本発明の膜では0.3nm/minであった。
本発明の膜は、一番低温（300℃）で形成したにもかかわらず、一番エッチングレートが小さく高品質な膜であることが示された。The quality of the Si 3 N 4 film formed as described above was evaluated at an etching rate of 0.5% hydrofluoric acid.
The etching rate is a film formed at 710 ° C. by conventional low-pressure CVD, a film formed at 400 ° C. by plasma CVD using conventional microwave-excited high-density plasma, and a film formed by the above-described technique of the present invention. Was evaluated.
The etching rate was 0.4 nm / min for the low-pressure CVD film, 0.4 nm / min for the conventional plasma CVD film, and 0.3 nm / min for the film of the present invention.
Although the film of the present invention was formed at the lowest temperature (300 ° C.), it was shown that it was the highest quality film with the lowest etching rate.

以上、添付図面を参照しながら本発明の実施形態について詳細に説明したが、本発明はかかる例に限定されない。本発明の属する技術の分野における通常の知識を有する者であれば、特許請求の範囲に記載された技術的思想の範疇内において、各種の変更例または修正例に想到し得ることは明らかであり、これらについても、当然に本発明の技術的範囲に属するものと了解される。   As mentioned above, although embodiment of this invention was described in detail, referring an accompanying drawing, this invention is not limited to this example. It is obvious that a person having ordinary knowledge in the technical field to which the present invention pertains can come up with various changes or modifications within the scope of the technical idea described in the claims. Of course, it is understood that these also belong to the technical scope of the present invention.

１ 成膜装置
１０ 処理チャンバ
１５ 導波管
１６ 入射窓
１７Ａ，１７０Ａ プラズマ生成室
１８Ａ，１８Ｂ 中空柱状部
２０Ａ，２０Ｂ、２００Ａ，２００Ｂ リミッター部材
３０Ａ，３０Ｂ、３００Ａ，３００Ｂ 永久磁石機構（ミラー磁場形成機構）
３１Ａ，３１Ｂ，３２Ａ，３２Ｂ，３１０Ａ，３１０Ｂ，３２０Ａ，３２０Ｂ 永久磁石
４０ 電位調整用分割リング
４１，４２，４３ 電極
５０、５００ ステージ
１３０Ａ，１３０Ｂ 電流コイル（ミラー磁場形成機構）
５１０ Ｗ／ＴｉＮ電極
５２０ シリコン窒化膜サイドウォール
５３０ シリサイド
５４０ ソースドレインエクステンション層
５５０ ポリシリコンゲート
９００ ＰＣＶＤ装置
９０１Ａ，９０１Ｂ 取り付け部材
Ｍ１Ａ,Ｍ１Ｂ 最大磁場部
Ｍ２ 中間部
ＲＰ１〜ＲＰ３ 共鳴点
ＰＣＲ 閉じ込め領域
ＭＦＬ 磁力線
ＭＭＦ ミラー磁場
ＰＬ プラズマ
Ｗ ウエハ（基体）DESCRIPTION OF SYMBOLS 1 Film-forming apparatus 10 Processing chamber 15 Waveguide 16 Incident window 17A, 170A Plasma generation chamber 18A, 18B Hollow columnar part
20A, 20B, 200A, 200B Limiter members 30A, 30B, 300A, 300B Permanent magnet mechanism (mirror magnetic field forming mechanism)
31A, 31B, 32A, 32B, 310A, 310B, 320A, 320B Permanent magnet 40 Potential adjusting split ring 41, 42, 43 Electrode 50, 500 Stage 130A, 130B Current coil (mirror magnetic field forming mechanism)
510 W / TiN electrode 520 Silicon nitride film side wall 530 Silicide 540 Source drain extension layer 550 Polysilicon gate 900 PCVD apparatus 901A, 901B Mounting member M1A, M1B Maximum magnetic field part M2 Resonant point PCR Confinement region MFL Magnetic field line MMF Mirror magnetic field PL Plasma W Wafer (Substrate)

Claims (8)

ミラー磁場を形成するミラー磁場形成機構と、前記ミラー磁場の一端側から他端側に向けてマイクロ波を供給するマイクロ波供給機構と、を有し、前記ミラー磁場と前記マイクロ波とによる電子サイクロトロン共鳴によりプラズマを生成するとともに、前記ミラー磁場により所定の閉じ込め領域に当該プラズマを閉じ込めるプラズマ処理装置であって、
前記マイクロ波の供給側に形成される複数の共鳴点のうち、前記ミラー磁場の２つの最大磁場部間に形成される共鳴点がプラズマ形成に利用され、他の共鳴点がプラズマ形成に寄与しないか実質的に寄与しないように、プラズマ生成空間が画定されていることを特徴とするプラズマ処理装置。A mirror magnetic field forming mechanism for forming a mirror magnetic field, and a microwave supply mechanism for supplying a microwave from one end side to the other end side of the mirror magnetic field, and an electron cyclotron using the mirror magnetic field and the microwave A plasma processing apparatus for generating plasma by resonance and confining the plasma in a predetermined confinement region by the mirror magnetic field,
Among a plurality of resonance points formed on the microwave supply side, a resonance point formed between the two maximum magnetic field portions of the mirror magnetic field is used for plasma formation, and other resonance points do not contribute to plasma formation. A plasma processing apparatus characterized in that a plasma generation space is defined so as not to contribute substantially. 処理室と、
前記処理室内へ前記マイクロ波を導く導波路に設けられた、誘電体からなるマイクロ波透過部材と、を有し、
前記マイクロ波透過部材の先端面および前記処理室の内壁面は、前記プラズマ生成空間を画定し、
前記複数の共鳴点のうち、前記プラズマ形成に利用される共鳴点のみが前記プラズマ生成空間内に配置され、他の共鳴点は、前記マイクロ波透過部材上または大気側に位置する、ことを特徴とする請求項１に記載のプラズマ処理装置。A processing chamber;
A microwave transmitting member made of a dielectric, provided in a waveguide for guiding the microwave into the processing chamber,
The front end surface of the microwave transmitting member and the inner wall surface of the processing chamber define the plasma generation space,
Of the plurality of resonance points, only the resonance points used for the plasma formation are arranged in the plasma generation space, and the other resonance points are located on the microwave transmitting member or on the atmosphere side. The plasma processing apparatus according to claim 1. 前記ミラー磁場形成機構は、前記所定軸線において離隔して配置された第１および第２の永久磁石機構を有し、
前記第１および第２の永久磁石機構は、放射状に着磁され、かつ互いに異なる向きに着磁された環状の第１および第２の永久磁石を含み、当該第１および第２の永久磁石機構は、前記ミラー磁場に３つの共鳴点をそれぞれ形成する、請求項１又は２に記載のプラズマ処理装置。The mirror magnetic field forming mechanism has first and second permanent magnet mechanisms that are spaced apart from each other on the predetermined axis.
The first and second permanent magnet mechanisms include annular first and second permanent magnets that are radially magnetized and magnetized in different directions, and the first and second permanent magnet mechanisms. The plasma processing apparatus according to claim 1, wherein three resonance points are respectively formed in the mirror magnetic field. 前記ミラー磁場形成機構は、前記所定軸線上において離隔して配置された第１および第２の電流コイルを有し、当該第１および第２の電流コイルは、前記ミラー磁場に２つの共鳴点をそれぞれ形成する、請求項１又は２に記載のプラズマ処理装置。   The mirror magnetic field forming mechanism includes first and second current coils that are spaced apart on the predetermined axis, and the first and second current coils provide two resonance points in the mirror magnetic field. The plasma processing apparatus according to claim 1, wherein each is formed. 前記閉じ込め領域から活性化した中性のラジカルが処理すべき基体に選択的に到達するように、前記所定軸線を横切る方向において前記基体を前記閉じ込め領域に対向させて配置する保持機構を有する、請求項１ないし４のいずれかに記載のプラズマ処理装置。   A holding mechanism for disposing the substrate so as to face the confinement region in a direction crossing the predetermined axis so that neutral radicals activated from the confinement region selectively reach the substrate to be treated; Item 5. The plasma processing apparatus according to any one of Items 1 to 4. 前記所定軸線を横切る方向の電位勾配を平坦化するための電位調整用部材をさらに備える、ことを特徴とする請求項１ないし５のいずれかに記載のプラズマ処理装置。   The plasma processing apparatus according to claim 1, further comprising a potential adjusting member for flattening a potential gradient in a direction crossing the predetermined axis. ミラー磁場を形成するとともに、前記ミラー磁場の一端側から他端側に向けてマイクロ波を供給し、前記ミラー磁場と前記マイクロ波とによる電子サイクロトロン共鳴によりプラズマを生成するとともに、前記ミラー磁場により所定の閉じ込め領域に当該プラズマを閉じ込めるプラズマ処理方法であって、
前記マイクロ波の供給側に形成される複数の共鳴点のうち、前記ミラー磁場の２つの最大磁場部間に形成される共鳴点のみを実質的にプラズマ形成に利用する、ことを特徴とするプラズマ処理方法。A mirror magnetic field is formed, a microwave is supplied from one end side to the other end side of the mirror magnetic field, plasma is generated by electron cyclotron resonance by the mirror magnetic field and the microwave, and predetermined by the mirror magnetic field. A plasma processing method for confining the plasma in a confinement region of
Of the plurality of resonance points formed on the supply side of the microwave, only the resonance point formed between the two maximum magnetic field portions of the mirror magnetic field is substantially used for plasma formation. Processing method. 請求項７に記載のプラズマ処理方法を半導体製造プロセスに用いた半導体製造方法。
A semiconductor manufacturing method using the plasma processing method according to claim 7 in a semiconductor manufacturing process.
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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60263434A (en) * 1984-06-12 1985-12-26 Fujitsu Ltd Plasma processing device
JPS62170475A (en) * 1986-01-24 1987-07-27 Hitachi Ltd Plasma treatment device
JPS63213344A (en) * 1987-03-02 1988-09-06 Hitachi Ltd Plasma processing device
JPH01238020A (en) * 1988-03-18 1989-09-22 Hitachi Ltd Plasma processing device and processing system therefor
JPH0227718A (en) * 1988-07-15 1990-01-30 Mitsubishi Electric Corp Plasma treating method and plasma treater using the same method
JPH02192720A (en) * 1989-01-20 1990-07-30 Sanyo Electric Co Ltd Formation of thin film
JP2000174009A (en) * 1998-12-02 2000-06-23 Hitachi Ltd Plasma processing device, semiconductor manufacture device and liquid crystal manufacture device
JP2000277492A (en) * 1999-03-26 2000-10-06 Hitachi Ltd Plasma processor, plasma processing method, and manufacture of semiconductor
JP2006049020A (en) * 2004-08-02 2006-02-16 Japan Atom Energy Res Inst Device and method for generating mirror field for confining plasma used in ecr ion source

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60263434A (en) * 1984-06-12 1985-12-26 Fujitsu Ltd Plasma processing device
JPS62170475A (en) * 1986-01-24 1987-07-27 Hitachi Ltd Plasma treatment device
JPS63213344A (en) * 1987-03-02 1988-09-06 Hitachi Ltd Plasma processing device
JPH01238020A (en) * 1988-03-18 1989-09-22 Hitachi Ltd Plasma processing device and processing system therefor
JPH0227718A (en) * 1988-07-15 1990-01-30 Mitsubishi Electric Corp Plasma treating method and plasma treater using the same method
JPH02192720A (en) * 1989-01-20 1990-07-30 Sanyo Electric Co Ltd Formation of thin film
JP2000174009A (en) * 1998-12-02 2000-06-23 Hitachi Ltd Plasma processing device, semiconductor manufacture device and liquid crystal manufacture device
JP2000277492A (en) * 1999-03-26 2000-10-06 Hitachi Ltd Plasma processor, plasma processing method, and manufacture of semiconductor
JP2006049020A (en) * 2004-08-02 2006-02-16 Japan Atom Energy Res Inst Device and method for generating mirror field for confining plasma used in ecr ion source

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
犬竹 正明: "マイクロ波反射計とプローブ計測による密度および磁場揺動径方向分布の比較", 平成７年〜８年度科学研究費補助金（基盤研究（Ｂ）（２））研究成果報告書, JPN6014027028, March 1997 (1997-03-01), JP, pages 1 - 73, ISSN: 0004393312 *

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