JPS6442823A - Flattening of semiconductor device surface - Google Patents

Flattening of semiconductor device surface

Info

Publication number
JPS6442823A
JPS6442823A JP20019187A JP20019187A JPS6442823A JP S6442823 A JPS6442823 A JP S6442823A JP 20019187 A JP20019187 A JP 20019187A JP 20019187 A JP20019187 A JP 20019187A JP S6442823 A JPS6442823 A JP S6442823A
Authority
JP
Japan
Prior art keywords
silicon
projected part
semiconductor device
insulating film
flattening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20019187A
Other languages
Japanese (ja)
Inventor
Tsuneo Hamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20019187A priority Critical patent/JPS6442823A/en
Publication of JPS6442823A publication Critical patent/JPS6442823A/en
Pending legal-status Critical Current

Links

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To obtain a uniform, highly flattened surface in the interior of a wafer by depositing a silicon film on both a silicon insulating film and a silicon projected part, and by flattening the surface while removing the silicon projected part and the silicon layer. CONSTITUTION:A silicon layer 4 is deposited on a silicon insulating film 2 and a silicon projected part 3, both of which form the surface of a semiconductor device. The silicon projected part 3 and the silicon layer 4 are then removed to flatten the surface of the semiconductor device. A polishing process consists of two steps, the first being a lapping or grinding whose main processing is a mechanical abrasion using abrasive grains, and the second being a polishing using a chemical solution containing amine. In the second step the silicon insulating film works as a stopper against the etching process, thereby making it possible to terminate the process with an excellent overall controllability of wafers. The amine water solution has low etching effects on silicon, thereby leaving the surface of silicon free from being recessed. According to the constitution, a uniform, highly flattened surface can be obtained in the interior of a wafer.
JP20019187A 1987-08-10 1987-08-10 Flattening of semiconductor device surface Pending JPS6442823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20019187A JPS6442823A (en) 1987-08-10 1987-08-10 Flattening of semiconductor device surface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20019187A JPS6442823A (en) 1987-08-10 1987-08-10 Flattening of semiconductor device surface

Publications (1)

Publication Number Publication Date
JPS6442823A true JPS6442823A (en) 1989-02-15

Family

ID=16420310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20019187A Pending JPS6442823A (en) 1987-08-10 1987-08-10 Flattening of semiconductor device surface

Country Status (1)

Country Link
JP (1) JPS6442823A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376118A (en) * 1989-08-17 1991-04-02 Shin Etsu Handotai Co Ltd Manufacture of substrate for semiconductor element formation
EP0874390A1 (en) * 1995-09-13 1998-10-28 Hitachi, Ltd. Grinding method of grinding device
US6354922B1 (en) 1999-08-20 2002-03-12 Ebara Corporation Polishing apparatus
US6478977B1 (en) 1995-09-13 2002-11-12 Hitachi, Ltd. Polishing method and apparatus
EP1297927A2 (en) * 1995-09-13 2003-04-02 Hitachi, Ltd. Polishing apparatus
US6682408B2 (en) 1999-03-05 2004-01-27 Ebara Corporation Polishing apparatus

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376118A (en) * 1989-08-17 1991-04-02 Shin Etsu Handotai Co Ltd Manufacture of substrate for semiconductor element formation
EP0874390A1 (en) * 1995-09-13 1998-10-28 Hitachi, Ltd. Grinding method of grinding device
US6180020B1 (en) 1995-09-13 2001-01-30 Hitachi, Ltd. Polishing method and apparatus
EP0874390A4 (en) * 1995-09-13 2002-02-06 Hitachi Ltd Grinding method of grinding device
US6478977B1 (en) 1995-09-13 2002-11-12 Hitachi, Ltd. Polishing method and apparatus
EP1297927A2 (en) * 1995-09-13 2003-04-02 Hitachi, Ltd. Polishing apparatus
US6682408B2 (en) 1999-03-05 2004-01-27 Ebara Corporation Polishing apparatus
US6878044B2 (en) 1999-03-05 2005-04-12 Ebara Corporation Polishing apparatus
US6354922B1 (en) 1999-08-20 2002-03-12 Ebara Corporation Polishing apparatus

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