JPS6442756A - Interface cable extending device - Google Patents

Interface cable extending device

Info

Publication number
JPS6442756A
JPS6442756A JP19912187A JP19912187A JPS6442756A JP S6442756 A JPS6442756 A JP S6442756A JP 19912187 A JP19912187 A JP 19912187A JP 19912187 A JP19912187 A JP 19912187A JP S6442756 A JPS6442756 A JP S6442756A
Authority
JP
Japan
Prior art keywords
signal
responding
channel
limitation
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19912187A
Other languages
Japanese (ja)
Inventor
Masahiro Yamashita
Koichi Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP19912187A priority Critical patent/JPS6442756A/en
Publication of JPS6442756A publication Critical patent/JPS6442756A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To except the limitation of a distance between a channel and an input and output device due to a responding time limitation by providing a detecting means to detect an operation instructing signal whose responding time is limited and to generate a detecting signal and a false responding signal generating means to respond to the detecting signal and to send the false responding signal, which is equivalent to a responding signal from the input and output device, to a channel. CONSTITUTION:Detecting means 11, 21 and 23 which detect the operation instructing signal, whose responding time is limited, to be sent from the channel 1 to an input and output device 2 and generate the detecting signal are provided in an interface cable extending device 3 of a channel 1 side. False responding signal generating means 22, 23 and 26 are provided, which respond to this detecting signal and send the false responding signal, which is equivalent to the responding signal from the input and output device 2, to the channel 1. Thus, the generation of error condition based on the limitation of the responding time is avoided and as the result, the limitation of the distance, which is charged by the limitation of the responding time, between the channel and the input and output device can be excepted.
JP19912187A 1987-08-11 1987-08-11 Interface cable extending device Pending JPS6442756A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19912187A JPS6442756A (en) 1987-08-11 1987-08-11 Interface cable extending device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19912187A JPS6442756A (en) 1987-08-11 1987-08-11 Interface cable extending device

Publications (1)

Publication Number Publication Date
JPS6442756A true JPS6442756A (en) 1989-02-15

Family

ID=16402488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19912187A Pending JPS6442756A (en) 1987-08-11 1987-08-11 Interface cable extending device

Country Status (1)

Country Link
JP (1) JPS6442756A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006178688A (en) * 2004-12-21 2006-07-06 Nec Corp Multiplexing apparatus and method for multiplexing legacy device
JP2010538508A (en) * 2007-09-03 2010-12-09 エアバス・オペレーションズ ACARS message transmission method via IP network
JP2019016056A (en) * 2017-07-04 2019-01-31 富士通株式会社 Transmission and reception system, control method for transmission and reception system, transmitting apparatus, and receiving apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006178688A (en) * 2004-12-21 2006-07-06 Nec Corp Multiplexing apparatus and method for multiplexing legacy device
JP2010538508A (en) * 2007-09-03 2010-12-09 エアバス・オペレーションズ ACARS message transmission method via IP network
JP2019016056A (en) * 2017-07-04 2019-01-31 富士通株式会社 Transmission and reception system, control method for transmission and reception system, transmitting apparatus, and receiving apparatus

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