JPS6343576A - Pulse width modulation type inverter - Google Patents

Abstract

PURPOSE:To obtain a low loss and a high efficiency inverter, by utilizing high speed switching semiconductor elements as one sides of series-connecting-arms, and low ON-loss semiconductor elements as the other sides of them. CONSTITUTION:In order to convert direct current from a DC power source 1, to alternating currents, a pulse width modulation type inverter, is constituted with arms composed of fieldeffect transistors(FET)3a-3b as high speed switch semiconductor elements, and bipolar transistors(BJT)6a-6b as low ON-loss semiconductor elements, and the arms are controlled by switching through gate units 4a-4d. Then, by the FETs 3a-3b, the magnitude of an output power is controlled, and by the BJTs 6a-6b, the frequency of output is controlled, and power is fed to a load 2. As a result, a pulse width modulation type inverter of low loss and high efficiency can be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a
The present invention relates to a pulse 1 fall modulation type inverter device that outputs power according to the pulse width by controlling the pulse width by turning on and off two switching elements.

[Conventional technology]

Figure 3 shows engineering M Au5t -8 engineering REHAu5t,
, Vol. 5 1 (published March 1985) P4
In Figure 0, which is an example of a conventional pulse width modulation type inverter device (hereinafter referred to as a PWM inverter device) shown on pages 9 to 53, (1) is a DC power supply, (2) is a load, (
3&) ~(js (1) is a DC T power supply (1) and is a semiconductor element for high-speed switching required to convert DC current to AC, and a field effect transistor (hereinafter referred to as 'FET) is used. .The above IFF, T (31L)~
(3d) depicts the arm of the inverter device, (3&)
(3c), (3b) and (3d) are connected in series L'a, respectively, and these series connections are connected in parallel to the DC power supply. (4a) to (4d) are 7IGT
Gate unit that controls switching of (3a) to (3d), (5&) to (5a) are FETs (37L)
connected in parallel to ~(sa), IT (3a) ~(3d
) is a diode that conducts current when it is in the off state.

Next, the operation will be explained. Figure 4 shows the PWM of Figure 3.
FIG. 3 is a timing diagram illustrating the operation of the inverter device.

The following explanation will be given based on this timing chart. Due to the command from the gate unit (4a), the lFET (31) (sa) is in the off state during the time tl''-'t2 (see Figure 2 02). (3a) is in the on state for a certain period of Δt (see Figure 4, 0), and furthermore, the PET (sb) is controlled to be on/off at high speed by the gate unit (4'b) (the fourth
(see diagram). At this time, when the FET (3b) is on, the DC 1S current from the DC power supply (1) is
lCr (3b) → Load (2) 4 FICT (3a
) → Free circulation with the DC power supply (1), and when FIT (sb) is off, it circulates with the load (2) → FIT (3c) - + diode (5d) → load (2). FICT (
By setting the on-period of sb) to mvt, it is possible to control the direct current to approximately create a half-wave of a sine wave as shown in FIG. 4E. At t2 to t3, FilT(sb)
, (3G) is turned off, and IPET (
3a) is in the on state, and FET (3a) performs a fast reading high-speed switching operation of on and off.

As a result, when IPET (3a) is on, DC power supply (1) → FET (3a) - *Load (2) →: FET
(3d) − + Circulate with DC power supply (1), FET (3
m) is off, load (2) → FF1iT (3d)
−+ Diode (5C) → Circulate with load (2). As a result, the direct current is controlled to approximately create a half-wave of a sine wave as shown in FIG. 4F. By repeating the above-described operation rt, direct current can be approximated to alternating current and supplied to the load.

[Problems that the invention attempts to solve]

In order to perform high-speed switching, conventional PWM inverter devices use FETs, 1 bimos transistors, etc. as switching elements for high-speed switching; In addition, high-speed switching elements are used even though there is no need for high-speed switching, and this type of high-speed switching element has a very large on loss, so there is a problem that the power efficiency of the PWM inverter equipment is poor. This invention was made to solve the above-mentioned problems, and its purpose is to obtain a highly efficient PWM inverter device with less power loss.

[Means for solving problems]

The PWM inverter device according to the present invention includes a pair of series-connected arms, one of which is a high-speed switching semiconductor element, and the other of which is a low-on-loss semiconductor element.

[Effect]

PWM inverter device f! in this invention! t controls the magnitude of output power using a high-speed switching semiconductor element, performs output diagonal control using a low on-loss semiconductor element, and supplies power from the controlled DC power source to a load.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

In Figure 1, (1), (2), (3m),
(3b) , (4&) ~(4(L)?(5&)~
(5d) is exactly the same as the conventional device, 0(6!L
), (61)) are bipolar transistors (hereinafter referred to as B and TT) which are low on-loss layer switching elements constituting one of a pair of arms connected in series.

Next, the operation of the PWM inverter device shown in FIG. 1 will be explained.

FIG. 2 is a timing diagram illustrating the operation of the PWM inverter device of FIG. 1. The operation of the PWM inverter device is clear from the timing diagram in Figure 2, and it performs the same operation as the conventional I'WM inverter device.
2).

That is, as an operation between time t1 and t2, IFICT(
3a).

B: rT(eb) is in the off state (Fig. 2 A2,
B, TT (6 &) are turned on for a certain period of Δt by the command from the gate unit (4C) (see Fig. 2 02), and the gate unit (4b) turns on the lFET (3'b) at high speed. and continuously controlled on and off. (See Figure 2 02), at this time, the DC power supply (
When 71CT (3b) is on, the DC current from 1) is from DC power supply (1) -+ IPET (3b) → load (
2)→11. TT (am) → Circulate with DC 1 source (1), when PET (3b) is off, load (2) → E, TT
By adjusting the on-period of 0FIST (31)) which circulates with (6 &) → diode (5d) → load (2), the DC current is approximately made into a half wave of a sine wave as shown in Figure 2 E2. so that it can be controlled. During the period from t2 to t3, the FET (3a) y performs the same operation as described above.
B-rT (6b) is performed and the DC 1u current is approximately made into a half-wave of a sine wave. During a series of operations, B, TT (6-)
, (ab) is a certain period (Fig. 2 t1 to t2t or t
2 to t3) is used to maintain the on state. In the above embodiment, an FET was used as a semiconductor element for high-speed switching, but a bimos transistor, S-T (static induction transistor), etc. may also be used.
Although an EJT is used as a semiconductor element for low on-loss, any element may be used as long as it has a lower on-loss than a high-speed switching semiconductor (eg, YZR).

〔Effect of the invention〕

As described above, according to the present invention, one of the pair of arms connected in series is a KM switching 1m conductor element, and the other is a low on-loss semiconductor element, resulting in a highly efficient PWM inverter with low loss. One load RTF! :Obtainable.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a PW)A inverter device which is an embodiment of the present invention, Fig. 2 is a timing diagram explaining the operation of the PWM inverter device of Fig. 1, and Fig. 3 is a conventional PWM inverter device.
A circuit diagram of the inverter device, FIG. 4 is a timing diagram illustrating the operation of the PWM inverter device of FIG. 3. In the figure, (3a) and (3b) are semiconductor elements for high-speed switching, and (6a) and (ab) are semiconductor elements for low on-loss. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (3)

[Claims] (1) A plurality of series connected bodies of a pair of arms, each consisting of a switching element, are connected in parallel to a DC power supply,
In a pulse width modulation type inverter device that outputs AC power according to the conduction period of the switching element from the series connection point of the pair of arms, one of the pair of series-connected arms is connected to a semiconductor element for high-speed switching, and the other is connected to a low speed switching element. A pulse width modulation type inverter device comprising an on-loss semiconductor element. (2) The pulse width modulation type inverter device according to claim 1, wherein the high-speed switching semiconductor element is a field effect transistor or a bimos transistor. (3) The pulse width modulation type inverter device according to claim 1, wherein the semiconductor element for low on-loss is a bipolar transistor.