JPS63186387A - Binarizing circuit - Google Patents

Abstract

PURPOSE:To perform the binarizing operation with high accuracy and high stability by controlling the amplitude of a photoelectric conversion signal based on the shading signal obtained by scanning a reference white color plate. CONSTITUTION:An original 1 is read in a period during which a timing signal T1 is kept at 'L' and a function processing circuit 10 outputs the value obtained from a gain switching function G(x) to a variable amplifier 7 in response to the shading signal received from a RAM 9. The output of an A/D converter 8 is supplied to a subtractor 12 via a logarithm converter 11 and the output of a RAM 16 which tracks and holds the envelope of a white level peak in response to the picture element of the subscanning direction is also supplied to the subtractor 12. A reference white color plate 2 is scanned while the gain of the amplifier is kept fixed and the photoelectric conversion signal sent from the converter 8 is supplied to the RAM 9 as a shading signal. The output of the subtractor 12 is equal to the difference between the white level peak value and a scan signal and therefore a signal containing its canceled shading value is inputted to a binarizing comparator 17 for production of the binarized output. Thus the photoelectric conversion signal containing shading can be binarized with high accuracy and high stability.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a photoelectric conversion signal binarization circuit in a character or image input device, and relates to a photoelectric conversion circuit using a contact type image sensor, a SELFOC lens, or a diode array. The present invention relates to a binarization circuit suitable for a conversion system.

[Conventional technology]

When a contact type image sensor or SELFOC lens 1-diode array is adopted as a photoelectric conversion system used in text/image human-powered devices, it is possible to avoid fluctuations in bit intensity due to the structure of the image sensor and brightness parameters of the LED array. Large shading occurs due to quantization, etc., and conventional binarization circuits cannot effectively utilize the dynamic range of the A/D converter, resulting in large errors during quantization and lowering the accuracy of binarization. , resulting in a decrease in reading accuracy.

As a countermeasure against this problem, for example, there is a technique disclosed in Japanese Patent Application Laid-open No. 16464/1983 (the pixel signal is level-corrected for each bit, shading correction is performed, the peak value of the pixel signal is held, and the peak value is divided). A binarization method that uses the compressed value as a dark value, and a method that performs shading correction using digital calculation after multi-value conversion, such as the technology disclosed in Japanese Patent Application Laid-Open No. 60-206369 (multiple vias), are recommended. has been done.

[Problem that the invention seeks to solve]

With the conventional measures mentioned above, the former has problems with analog accuracy, is easily affected by static electricity noise and ACC nested line noise, and is susceptible to the effects of dust, scratches, uneven reflectance, etc. on the reflective substrate. Furthermore, in order to perform high-precision gain control, the analog attenuator requires a large number of high-quality components. In the latter case, unless the amplitude of the photoelectric conversion signal input to the A/D converter for multilevel conversion is controlled within a predetermined range, the dynamic range of the A/D converter cannot be effectively utilized, and the ratio of quantization errors will increase. In particular, photoelectric conversion systems that employ optical systems that use bright lenses have the problem that there is a large difference in brightness between the center and the periphery of the lens itself, and photoelectric conversion Significant shading is likely to occur due to variations in element intensity, uneven lighting, etc., and in addition to ensuring component accuracy, consideration must be given to suppressing shading within a predetermined range by using other optical methods in combination. .

In view of these problems, the present invention provides a binarization circuit that has strong resistance to noise 2 and is capable of performing shading correction with higher precision even though component precision is at the same level or lower than conventional ones. The purpose is to

[Means for Solving the Problems] In the present invention, the means for solving the above problems is to convert the photoelectric conversion signal input to the multi-level A/D converter to each pixel or n pixels. A circuit is provided to control the gain for each block, which holds the shading correction coefficient based on the previous value detected or learned by the white board, and adjusts the amplitude of the photoelectric conversion signal based on a predetermined function corresponding to the correction coefficient. By performing control, the dynamic range of the A/D converter is effectively utilized.

[Effect]

Multi-value A
The input dynamic range of the A/D converter is effectively utilized, A/D conversion and quantization operations are performed with high precision, the binarization error is reduced, and stable binarization is achieved.

Note that in this specification, photoelectric conversion detects pixels along the main scanning direction and performs line feed in the sub-scanning direction.

〔Example〕

Hereinafter, the present invention will be explained in more detail with reference to embodiments shown in the accompanying drawings.

FIG. 1 is a block diagram showing an embodiment of the binarization circuit of the present invention. In FIG. 1, a document 1 or a reference reflector 2 is irradiated with light from a light source 3, and the reflected light is collected by a lens 4 and imaged on an image sensor 5, where it is photoelectrically converted. The photoelectric conversion signal is amplified by an amplifier 6, further subjected to amplitude control by a variable amplifier 7, and then converted to an n-bit digital photoelectric conversion signal by an A/D converter 8.

In the above operation, the reference white plate 2 is scanned as follows.
This is the period in which the timing signal T1 shown in FIG. 2 is "H'", and this period is set immediately before the original l is read. When a plurality of originals are read in succession, the reference white plate may be scanned each time each original is read.

When scanning the reference white plate 2, the RAM 9 is set to write mode by the timing signal T1, and the function processing circuit 10 is set to output a preset fixed value by the timing signal T1. As a result, the gain of variable amplifier 7 is fixed. In this state, the reference white plate 2 is scanned, and as a result, the n-bit photoelectric conversion signal output from the A/D converter 8 is stored at a predetermined address in the RAM 9 as a shading signal. The address signal for the RAM 9 is formed by counting the timing signal T3 with a counter 15.

Next, the operation when reading the original 1 will be explained.

Reading of the original 1 is performed over a period in which the timing signal T1 is "L", and at this time, the RAM 9 is set to the read mode, and the function processing circuit 10 adjusts the built-in gain according to the shading signal read out from the RAM 9. A value determined by the switching function G(x) is output to the variable amplifier 7. This limits the amplitude of the photoelectric conversion signal to within a predetermined range. The simplest form of the function processing circuit 10 is to round the shading signal read out from the RAM 9, and when reading the reference white board 2, the output of the amplifier 6 and the gain switching function G (x ) is approximately 1, and the amplitude of the photoelectric conversion signal is subjected to shading correction.

Here, it is clear that the function processing circuit 10 can be easily configured with a ROM or the like.

The output of the A/D converter 8 is input to the logarithmic converter 11,
Its output is input to one input terminal of the subtracter 12.

The other input terminal of the subtracter 12 receives the output of the RAM 16, which tracks and holds the envelope of the white level peak in the sub-scanning direction corresponding to the pixels in the sub-scanning direction. Therefore, the subtracter 12 outputs the difference between the white level peak value of the previous scan and the scanning signal of the current scan. Here, RAM1
Reference numeral 6 uses the output of the counter 15 as an address signal, and the mode is changed to a write mode or a read mode according to "H°" or "L"° of a timing signal T2.

The output of the subtracter 12 is input to the function processing circuit 13 on the one hand. The function processing circuit 13 has a white level tracking function F.
(x) and outputs a white level update value according to the output of the subtracter 12. White level tracking function F (x)
For example, the output value may be switched depending on whether or not the output of the subtracter 12 exceeds a predetermined value. The output of the function processing circuit 13 is input to the adder 14, and R
It is added to the output of AM16 to form a new white level peak value and stored in RAM16.

Since the output of the subtracter 12 is the difference between the white level peak value and the scanning signal, it becomes the black signal amplitude, and since it has been logarithmized by the logarithmic converter 11, the actual processing is that division has been performed. Become. That is, even if there is shading in the manually input photoelectric conversion signal, if the ratio between the white level signal and the black level signal is constant, a constant value will be output, and a signal with the amount of shading canceled will be output from the subtracter 12. Output.

This signal is input to the binarization comparator 17, and is compared with a predetermined slice level SL at the timing of the timing signal T3 shown in FIG. 2 to form a 2.4M output.

In addition, in the above embodiment, the RAM 9 and the function generator 10
has been described as operating on a pixel-by-pixel basis, but it may be arranged to operate on a block-by-block basis consisting of a plurality of pixels.

〔Effect of the invention〕

According to the present invention, in order to control the amplitude of a photoelectric conversion signal based on a shading signal obtained by scanning a reference white plate, it is possible to stably perform binary conversion of a photoelectric conversion signal having large shading with high precision. It has the effect of making it possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an example of a binarization circuit embodying the present invention, and FIG. 2 is a diagram showing timing signals of the embodiment shown in FIG. 1... Original, 2... Reference white plate, 3... Light source, 4
... Lens, 5... Image sensor, 6... Amplifier, 7... Variable amplifier, 8... A/D converter, 9,
16...RAM, 10, 13...Function processing circuit, 1
1... Logarithmic converter, 12... Subtractor, 14... Adder, 15... Counter, 17... Binarization comparator.

Claims (1)

[Claims] 1. In a binarization circuit used in a character or image input device using photoelectric conversion, a means for detecting and holding the shading amount of a photoelectric conversion signal, and a means for detecting and holding the shading amount of the photoelectric conversion signal, and a means for detecting and retaining the shading amount corresponding to the shading amount and based on a predetermined function. , a gain variable means for controlling the amplitude of the photoelectric conversion signal, a function processing means for setting the predetermined function for each block consisting of one pixel or a plurality of consecutive pixels, and a multi-valued variable gain means for controlling the output of the gain variable means. 1. A binarization circuit comprising means for converting the data into digital data, performing digital correction, and then binarizing the digital data.