JPS63100847U - - Google Patents
Info
- Publication number
- JPS63100847U JPS63100847U JP1986195595U JP19559586U JPS63100847U JP S63100847 U JPS63100847 U JP S63100847U JP 1986195595 U JP1986195595 U JP 1986195595U JP 19559586 U JP19559586 U JP 19559586U JP S63100847 U JPS63100847 U JP S63100847U
- Authority
- JP
- Japan
- Prior art keywords
- electrode metal
- semiconductor device
- semiconductor substrate
- metal plate
- coating material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 229920001721 polyimide Polymers 0.000 claims 1
- 239000009719 polyimide resin Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4007—Shape of bonding interfaces, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4009—Loop shape
- H01L2224/40095—Kinked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/40247—Connecting the strap to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73263—Layer and strap connectors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
第1図は従来の半導体装置の断面構造図、第2
図は本考案の実施例を示す断面構造図、第3図は
本考案の半導体装置に用いる電極金属板の構造例
図、であり1……電極金属板、2……半導体基体
、3……半田、4……電極金属板、4a……テラ
ス側面部、4b……テラス平たん部、5……コー
テイング材による塗布部分である。
Figure 1 is a cross-sectional structural diagram of a conventional semiconductor device;
The figure is a cross-sectional structural diagram showing an embodiment of the present invention, and FIG. 3 is a structural example diagram of an electrode metal plate used in the semiconductor device of the present invention. 1... Electrode metal plate, 2... Semiconductor substrate, 3... Solder, 4... Electrode metal plate, 4a... Terrace side part, 4b... Terrace flat part, 5... Part coated with coating material.
Claims (1)
に、それぞれ電極金属板を配設した半導体装置に
おいて、半導体基体のPN接合面に近い側の主表
面に配設する電極金属板に半田漏れ性の良くない
コーテイング材の塗布部分を設け、半導体基体の
主表面と電極金属板間の半田厚さをほぼ均一にす
ることを特徴とする半導体装置。 (2) 前記、コーテイング材にポリイミド系樹脂
を用いた事を特徴とする実用新案登録請求の範囲
第1項記載の半導体装置。[Claims for Utility Model Registration] (1) In a semiconductor device in which electrode metal plates are disposed on both surfaces of a semiconductor substrate having two main surfaces, electrode metal plates are disposed on the main surface of the semiconductor substrate near the PN junction surface. 1. A semiconductor device characterized in that an electrode metal plate to be installed is coated with a coating material that does not have good solder leakage, so that the solder thickness between the main surface of a semiconductor substrate and the electrode metal plate is made almost uniform. (2) The semiconductor device according to claim 1, wherein a polyimide resin is used as the coating material.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986195595U JPH0438524Y2 (en) | 1986-12-19 | 1986-12-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986195595U JPH0438524Y2 (en) | 1986-12-19 | 1986-12-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63100847U true JPS63100847U (en) | 1988-06-30 |
JPH0438524Y2 JPH0438524Y2 (en) | 1992-09-09 |
Family
ID=31153625
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986195595U Expired JPH0438524Y2 (en) | 1986-12-19 | 1986-12-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0438524Y2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02121356A (en) * | 1988-09-09 | 1990-05-09 | Motorola Inc | Automatic-positioning electronic device |
JPH02126659A (en) * | 1988-09-09 | 1990-05-15 | Motorola Inc | Semiconductor device having curved bonding-lead and forming method thereof |
JP2006294882A (en) * | 2005-04-12 | 2006-10-26 | Fuji Electric Holdings Co Ltd | Semiconductor device |
JPWO2016067414A1 (en) * | 2014-10-30 | 2017-04-27 | 三菱電機株式会社 | Semiconductor device and manufacturing method thereof |
EP3336881A1 (en) * | 2016-12-19 | 2018-06-20 | Nexperia B.V. | Semiconductor device and method with clip arrangement in ic package |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5313877A (en) * | 1976-07-23 | 1978-02-07 | Hitachi Ltd | Semiconductor device |
-
1986
- 1986-12-19 JP JP1986195595U patent/JPH0438524Y2/ja not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5313877A (en) * | 1976-07-23 | 1978-02-07 | Hitachi Ltd | Semiconductor device |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02121356A (en) * | 1988-09-09 | 1990-05-09 | Motorola Inc | Automatic-positioning electronic device |
JPH02126659A (en) * | 1988-09-09 | 1990-05-15 | Motorola Inc | Semiconductor device having curved bonding-lead and forming method thereof |
JP2006294882A (en) * | 2005-04-12 | 2006-10-26 | Fuji Electric Holdings Co Ltd | Semiconductor device |
JP4645276B2 (en) * | 2005-04-12 | 2011-03-09 | 富士電機システムズ株式会社 | Semiconductor device |
JPWO2016067414A1 (en) * | 2014-10-30 | 2017-04-27 | 三菱電機株式会社 | Semiconductor device and manufacturing method thereof |
EP3336881A1 (en) * | 2016-12-19 | 2018-06-20 | Nexperia B.V. | Semiconductor device and method with clip arrangement in ic package |
US10825757B2 (en) * | 2016-12-19 | 2020-11-03 | Nexperia B.V. | Semiconductor device and method with clip arrangement in IC package |
Also Published As
Publication number | Publication date |
---|---|
JPH0438524Y2 (en) | 1992-09-09 |
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