JPS6298783A - 発光ダイオ−ド - Google Patents

発光ダイオ−ド

Info

Publication number
JPS6298783A
JPS6298783A JP60237512A JP23751285A JPS6298783A JP S6298783 A JPS6298783 A JP S6298783A JP 60237512 A JP60237512 A JP 60237512A JP 23751285 A JP23751285 A JP 23751285A JP S6298783 A JPS6298783 A JP S6298783A
Authority
JP
Japan
Prior art keywords
chip
led
layer
bed
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60237512A
Other languages
English (en)
Inventor
Takao Anegawa
姉川　隆雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60237512A priority Critical patent/JPS6298783A/ja
Publication of JPS6298783A publication Critical patent/JPS6298783A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Led Device Packages (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は発光ダイオードの構造にかかり、特に発光ダ
イオードの順方向電圧よりも高電圧の回路に接続できる
ように電流制限用の抵抗器を発光ダイオードに組込む構
造に適用される。
〔発明の技術的背景〕
発光ダイオード（以下ＬＥＤと略称）をその順方向動作
電圧を超える回路電圧の回路に接続し動作させるものが
多い。これは一般のＯＡ機器の回路電圧がＤＣ５Ｖに設
定されていることからＬＥＤが挿入される上記回路の部
分に抵抗器を直列に挿入し電流制限を施して用いられる
。すなわち、第３図に示すように、ＬＥＤｌｏｏの容器
１０１から導出したリード１０２．１０２の一方とこれ
が接続される回路パターン１０３との間に電流制限用抵
抗器１α４がその端子１１４．１］、４をはんだ１０５
で接合挿入されたものである。なお、図中の１０６は一
方のリード１０２に直結されたチップベッド、１０７は
チップベッド１０６の上面に被着された例えば導電性の
エポキシ樹脂の接着層で、ＬＥＤチップ１０８に対しそ
の下部電極（図示省略）を接着してこのチップを取着す
る。また、１０９はＬＥＤチップの上部電極（図示省略
）とＬＥＤの他方のり−ド１０２とを接続するボンディ
ングワイヤである。
〔背景技術の問題点〕
上記従来のＬＥＤは回路に装着するにあたり、電流制限
を施すための抵抗器を用意することと、抵抗器をＬＥＤ
のリードに接続すること等を必要とする問題、このよう
に取着された抵抗器により回路の専有面積効率が低下す
る問題がある。
〔発明の目的〕
この発明は上記従来の問題点に鑑み、ＬＥＤの改良構造
を提供する。
〔発明の概要〕
この発明にかかるＬＥＤはチップベッドのＬＥＤチップ
のチップペットにマウントされる側の主面に抵抗層を蒸
着形成することにより電流制限用の抵抗器を内装させ、
ＬＥＤの順方向電圧を超える電圧の回路にＬＥＤを直接
取着けできる。
〔発明の実施例〕
以下、この発明の一実施例を第１図および第２図を参照
して説明する。なお、説明において従来と変わらない部
分については図中の各部に従来と同じ符号を付けて示し
説明を省略する。
第１図に示されるＬＥＤＩＩの構造はＬＥＤチップ１０
８の下主面、すなわち、このチップがチップベッド１０
６にマウントされる側の主面に、第２図ａに示すように
一例の窒化タンタル（ＴａＮ）層１２が被着されたもの
である。このチップはウェーハの状態で電極形成後にＴ
ａＮを蒸着またはスパッタリングにより被着しておいて
分割してチップに形成される。上記ＴａＮ層の形成条件
は、このＬＥＤが配設される回路の回路電圧が５ボルト
であり、ＬＥＤノＶＦ（順電圧）が２．５ボルト、ＩＦ
（順電流）が１０ｍＡの場合、ＩＦを上記に適合させる
ためには２５０Ωの抵抗を直列に挿入接続すればよい。
すなわち、ＬＥＤチップ主面の面積が０．３Ｘ０．３ｍ
ｍのとき、シート抵抗値が５０Ω／口のＴａＮ層はその
層厚を１．５ｎｏ＋に形成して適する。ついで、上記チ
ップ１０８はそのＴａＮ層１２を導電性エポキシ樹脂の
如き接着層１３でチップベッド１０６に接着される。
〔発明の効果〕
この発明によれば、電流制限抵抗器をＴａＮ層でＬＥＤ
チップの一方の主面に蒸着形成してＬＥＤ容器に内装し
たので、特に抵抗器を用意し、更に抵抗器をリードに接
続する必要が全くない。また。
抵抗器を内装したので抵抗器による回路の専有面積効率
を低下させることなく抵抗器が設置できる顕著な利点が
ある。
なお、この発明は実施例に限られるものでなく、発光ダ
イオード表示素子やフォトトランジスタカブラ等におい
ても適用できることはいうまでもない。
【図面の簡単な説明】
第１図はこの発明の一実施例のＬＥＤの側面断面図、第
２図は第１図の要部の構成をさらに説明するために同図
ａ、ｂで組立の順序を説明するいずれも斜視図、第３図
は従来のＬＥＤの側面断面図である。 旦、１００　　　　ＬＥＤ １２　　　　　　　ＴａＮ層（抵抗層）１３、１０７　
　　　接着層 １．０１　　　　　　ＬＥＤの容器 １．０２　　　　　　　リート

Claims (1)

    【特許請求の範囲】
  1. 発光ダイオードの順方向電圧を超える電圧の回路に直接
    接続される発光ダイオードが、発光ダイオードチップの
    チップベッドにマウントされる側の主面に被着された窒
    化タンタルの抵抗層を具備したことを特徴とする発光ダ
    イオード。
JP60237512A 1985-10-25 1985-10-25 発光ダイオ−ド Pending JPS6298783A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60237512A JPS6298783A (ja) 1985-10-25 1985-10-25 発光ダイオ−ド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60237512A JPS6298783A (ja) 1985-10-25 1985-10-25 発光ダイオ−ド

Publications (1)

Publication Number Publication Date
JPS6298783A true JPS6298783A (ja) 1987-05-08

Family

ID=17016419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60237512A Pending JPS6298783A (ja) 1985-10-25 1985-10-25 発光ダイオ−ド

Country Status (1)

Country Link
JP (1) JPS6298783A (ja)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7516755B2 (en) 2001-02-15 2009-04-14 Op Systems Oy System for producing and distributing compressed air
US10262881B2 (en) 2014-11-26 2019-04-16 Kateeva, Inc. Environmentally controlled coating systems
US10309665B2 (en) 2008-06-13 2019-06-04 Kateeva, Inc. Gas enclosure assembly and system
US10434804B2 (en) 2008-06-13 2019-10-08 Kateeva, Inc. Low particle gas enclosure systems and methods
US10442226B2 (en) 2008-06-13 2019-10-15 Kateeva, Inc. Gas enclosure assembly and system
US10500880B2 (en) 2008-06-13 2019-12-10 Kateeva, Inc. Gas enclosure systems and methods utilizing an auxiliary enclosure
US10519535B2 (en) 2008-06-13 2019-12-31 Kateeva Inc. Method and apparatus for load-locked printing
US11034176B2 (en) 2008-06-13 2021-06-15 Kateeva, Inc. Gas enclosure assembly and system
US11107712B2 (en) 2013-12-26 2021-08-31 Kateeva, Inc. Techniques for thermal treatment of electronic devices
US11338319B2 (en) 2014-04-30 2022-05-24 Kateeva, Inc. Gas cushion apparatus and techniques for substrate coating
US11975546B2 (en) 2008-06-13 2024-05-07 Kateeva, Inc. Gas enclosure assembly and system
US12018857B2 (en) 2008-06-13 2024-06-25 Kateeva, Inc. Gas enclosure assembly and system
US12064979B2 (en) 2008-06-13 2024-08-20 Kateeva, Inc. Low-particle gas enclosure systems and methods

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5017777A (ja) * 1973-05-11 1975-02-25
JPS59119777A (ja) * 1982-12-24 1984-07-11 Toshiba Corp 発光表示装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5017777A (ja) * 1973-05-11 1975-02-25
JPS59119777A (ja) * 1982-12-24 1984-07-11 Toshiba Corp 発光表示装置

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7516755B2 (en) 2001-02-15 2009-04-14 Op Systems Oy System for producing and distributing compressed air
US10900678B2 (en) 2008-06-13 2021-01-26 Kateeva, Inc. Gas enclosure assembly and system
US11034176B2 (en) 2008-06-13 2021-06-15 Kateeva, Inc. Gas enclosure assembly and system
US10434804B2 (en) 2008-06-13 2019-10-08 Kateeva, Inc. Low particle gas enclosure systems and methods
US10442226B2 (en) 2008-06-13 2019-10-15 Kateeva, Inc. Gas enclosure assembly and system
US10500880B2 (en) 2008-06-13 2019-12-10 Kateeva, Inc. Gas enclosure systems and methods utilizing an auxiliary enclosure
US10519535B2 (en) 2008-06-13 2019-12-31 Kateeva Inc. Method and apparatus for load-locked printing
US10309665B2 (en) 2008-06-13 2019-06-04 Kateeva, Inc. Gas enclosure assembly and system
US12064979B2 (en) 2008-06-13 2024-08-20 Kateeva, Inc. Low-particle gas enclosure systems and methods
US10654299B2 (en) 2008-06-13 2020-05-19 Kateeva, Inc. Low-particle gas enclosure systems and methods
US12018857B2 (en) 2008-06-13 2024-06-25 Kateeva, Inc. Gas enclosure assembly and system
US11975546B2 (en) 2008-06-13 2024-05-07 Kateeva, Inc. Gas enclosure assembly and system
US11633968B2 (en) 2008-06-13 2023-04-25 Kateeva, Inc. Low-particle gas enclosure systems and methods
US11107712B2 (en) 2013-12-26 2021-08-31 Kateeva, Inc. Techniques for thermal treatment of electronic devices
US11338319B2 (en) 2014-04-30 2022-05-24 Kateeva, Inc. Gas cushion apparatus and techniques for substrate coating
US10262881B2 (en) 2014-11-26 2019-04-16 Kateeva, Inc. Environmentally controlled coating systems

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