JPS6239080A - Semiconductor light position detecting device - Google Patents

Abstract

PURPOSE:To prevent the lowering of the accuracy in position detection due to a change in shape by uniforming a depletion layer by connecting the depletion layer to a high-resistance layer and both electrodes in a semiconductor light position detecting device for detecting a distance from an object by the change of an output current. CONSTITUTION:A P<+>N<-> junction is formed between a P<+> layer 17 and an N<-> layer and a depletion layer D is produced in only the N<-> layer 14 side. The P<+> layer 17 is connected to an N<+> layer 16 through an N layer 15. As a potential of the P<+> layer 17 is nearly the same as that of the N<+> layer 16, the depletion layer is formed nearly uniformly over the all regions of a high-resistance layer 13. When an incident light reaches a point S on the high resistance layer 13, pairs of electrons and holes are produced and surplus carriers flow in the high-resistance layer 13 toward the first and second anodes 11 and 12. However, the relation of potentials between the high-resistance layer 13 and the P<+> layer 17 is fixed from the outside, so that the uniformity of the depletion layer is not lost and much better linearity of position detection can be maintained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a position detection device using a semiconductor photoelectric conversion device, and particularly to a semiconductor device position detection device that detects the distance to a target object by a change in output current. Regarding.

(Prior Art) A conventional semiconductor device detection device is for detecting a position based on an operating principle as shown in FIG. 5, for example. In Fig. 5, 51 is a light source, and 52 and 53 are objects to be measured placed at apogee (distance i'y+ from the baseline where the measuring device is placed) and perigee (distance Y2 from the baseline where the measuring device is placed), respectively. , 54 is a semiconductor device detection device.

In FIG. 5, light enters the object to be measured 52 from the light source 51,
The light reflected from the object to be measured 52 is transmitted to the semiconductor device detection device 54.
The light enters the light receiving point X1. On the other hand, the light that enters the object to be measured 53 from the light source 51 and is reflected from the object to be measured 53 enters the light receiving point X2 of the semiconductor device detector 554.

On the flat conductor optical position detection device 54, the distance of the object to be measured is detected based on the difference between the points X, , X2.

The semiconductor device detection device 54 is a one-dimensional line sensor in which PN junction photodiodes are distributed one-dimensionally, and -
To form a dimensionally distributed array, the surface of the array is formed by a high resistance semiconductor layer.

Such a semiconductor device detection device has a cross-sectional structure as shown in FIG. 6, for example.

In FIG. 6, 60 is a silicon N-type substrate formed from the starting material. The surface of the silicon N-substrate 60 is mirror-finished to have extremely high flatness, and then subjected to a processing process.

61 and 62 are high-concentration P+ layers formed by diffusion on the surface of the silicon N- substrate during the processing process, and form the first and second anode electrodes.

63 is the above-mentioned P formed between the anode electrodes 61 and 62.
This is PJtif with extremely low concentration compared to the + layer, and is a high resistance layer forming a resistor. The resistor 63 is formed, for example, by ion implantation.

A high concentration N+ layer 63 is formed on the back side of the silicon N− substrate 60.
The connection surface is formed by diffusing the oxide over the entire surface.

This N+ layer 68 is a layer connected to a common electrode of the case or the like.

64 and 65 are lead electrodes for taking out the P+ layers 61 and 62, for example, A7! It is a connection of wires, etc.

Reference numeral 66 denotes a common cathode electrode made of an Al vapor deposited layer or an Au vapor deposited layer formed over the entire surface of the N+i layer 63 forming a common electrode.

In FIG. 6, the depletion 1i67 is located at the anode electrode 61°6.
Since it occurs inside the silicon N-substrate 60 from 2,
It also extends below the high resistance layer 63.

When light is incident on the intermediate point S between the first and second anodes 64 and 65, the semiconductor device detection apparatus shown in FIG.
This is represented by an equivalent circuit as shown in the figure.

In FIG. 7, 71 is the leakage resistance of the P''N- junction between the P+ electrode 61 and the silicon N- substrate 60 in FIG.
is the ideal diode of the above P”N-junction, and 73 is the above P”N-junction ideal diode.
75 is the junction capacitance of the N-junction. 75 is the leakage resistance per unit high-resistance layer length of the P-N-junction between the P-high resistance Fii 63 and the silicon N-substrate 60 in FIG. The ideal diode of the above PN-junction, 7
7 is the junction capacitance of the P-N-junction, and 78 is the photocurrent in the P-N-junction. 71-1゜74
, -2.74-3 is the resistance per unit length of the P layer 63 in FIG. In FIG. 7, the current flowing through the first anode 64 is expressed as 11. Let the current flowing through the second anode 65 be I2.

FIG. 8 (a>(b)) shows data indicating positional linearity in the semiconductor device detection apparatus shown in FIG. 6, and its linear distortion data, respectively.

FIG. 8(e) is an explanatory diagram for explaining the positional linearity in the above. In semiconductor device production equipment, the first
The distance between the second anodes 61 and 62 is 2L (for example, 3000 μm), and the midpoint thereof is O. Further, the distance from point O to light irradiation point S is assumed to be X.

From FIGS. 6, 7, and 8(e), the generated photocurrent rG at point S is 1G=(It I2)/(1++I2)...(1
) is given by

The sample in FIGS. 8(a) and 8(b) is a PSDI type photoarray manufactured by Hamamatsu Photonics, and the data is obtained when irradiating a wave [900 nm light and shifting the irradiation position with a step width of 50 μm. In this case, the size of the light spot is 50
μm× 50 IJm, and a bias voltage of 5 μm was applied between the anode 64, 65 and the cathode 86.

Further, the short circuit current of the cathode electrode 66 when a light spot is irradiated to the midpoint of the first and second anode electrodes 64.65 is 333.8 nA.

The data shown in FIGS. 8(a) and 8(b) remain unchanged even when a potential difference of approximately 20 mV is applied between the first and second anode electrodes 64, 65, and the current flowing between both anode electrodes is approximately 200 nA. be.

FIGS. 9(a) to 9(c) are explanatory diagrams showing the operation when light is incident on the intermediate point S of the resistance layer 63. FIG.

In FIG. 9(b), when the intermediate point S of the resistance layer 63 is irradiated with light, the potential φ at the intermediate point S decreases as shown in FIG. 9<a). Here, it is assumed that voltages E and E2 are applied to the first and second anodes 61 and 62, respectively.

The energy band diagram at S and P toward the middle of the high-resistance layer 63 in FIG. 9(b) is shown in FIG.
It is figure (c). In FIG. 9(C), Ap and N are potentials in the P-region and N-region, respectively, and φp and φn are pseudo-Fermi levels for holes and electrons, respectively.

△A is the potential difference caused by the irradiation of light.

When light enters point S in FIG. 9(b), electron-hole pairs are generated near the PN junction at point S,
The potential is changed as shown in FIGS. 9(a) and (c). At this time, since excess carriers are generated at point S, the pseudo-Fermi dominance changes. The carriers generated here are divided and distributed between the first and second anodes 61 .
62 through the high resistance layer 63. When the differential voltage between both anodes (El-E2) is much smaller than the potential at point S, the photocurrent is not related to the direct current.

However, the DC current due to this differential voltage (EI E2) becomes a bias current and makes the operation unstable.
It is necessary to stabilize the anode potential as shown in Figure 0. Here, 101 is a semiconductor device detection device, 102 is a differential amplifier for stabilizing the operation of the circuit, 103 is a MOS-FET for forming a feedback loop, and 104 is for stabilizing the drain current of the MOS-FET 103. npn) transistor.

(Problems to be Solved by the Invention) As described above, the present invention solves the problem of the depletion layer because the impurity concentration of the silicon N-substrate located below the high resistance layer is lower than that of the high resistance layer. extends deep into the silicon N-substrate layer. Therefore, when light is irradiated to one point on the high-resistance layer, the shape of the depletion layer changes below this point, and as long as the voltage difference between both anodes does not exceed this potential, linearity is maintained and normal operation occurs. Although it works, the direct current generated by the voltage difference interferes with the oysters being eaten, and since both anodes are connected through a resistor, there is a drawback that the input impedance of the detection circuit is limited.

An object of the present invention is to separate a high resistance layer and both electrodes and connect the high resistance layer and both electrodes with a depletion layer, thereby detecting unbalanced carriers generated by light and preventing the above-mentioned drawbacks. An object of the present invention is to provide a semiconductor device detection apparatus configured to enable the above-mentioned semiconductor device detection apparatus.

(Means for Solving the Problems) A semiconductor device detection device according to the present invention includes a thin silicon plate, first and second anodes, a high resistance layer, and a low resistance layer.

The silicon thin plate has the first polarity and has a low impurity concentration, and the impurity concentration has a concentration that exhibits normal semiconductor characteristics and is formed on a silicon substrate of the first polarity. It is.

The first and second anodes are formed in a pair separated from each other on the first surface of the thin silicon plate, and have a second polarity opposite to the first polarity and have an extremely high impurity concentration. It is something.

The high resistance layer is disposed on the first surface of the silicon thin plate to connect between the first and second anodes, can receive incident light, has a second polarity, and has an impurity concentration. It is low.

The low resistance layer is disposed on the second surface of the silicon thin plate and forms a sandwich structure opposite the high resistance layer.
It has extremely high impurity concentration.

(Example) Hereinafter, the present invention will be described in more detail with reference to the drawings and the like.

FIG. 1 is a sectional view showing an embodiment of a semiconductor device detection apparatus according to the present invention.

In FIG. 1, 11 is a first anode, 12 is a second anode, 13 is a P layer forming a high resistance layer, 14 is an N layer formed by epitaxial growth, etc., 15 is an N type substrate, and 16 is a common electrode. 17 is a P+ layer formed between Ni 15 and Nff 114, and 18-1.1!3-2 are first and second anodes 11.12, respectively. A lead extraction electrode 19 corresponds to the lead extraction electrode of the N+ layer 16.

In FIG. 1, the shape of the depletion layer of the N layer 14 is made uniform by the P+ layer 17.

FIG. 2 shows a one-dimensional sensor array having the cross section shown in FIG. 1 formed by multiple layers. In Figure 2,
21-24 are sensor arrays, and in FIG. 2, sensitivity can be improved by using a plurality of one-dimensional sensor arrays 21-24.

In FIG. 3, a plurality of one-dimensional sensor arrays 31 to 35 are cut in the middle, and both ends are joined to anodes 11 and 12.

The present invention will be described in detail below with reference to FIG.

In FIG. 1, due to the presence of the P+ layer 17, a P''N- junction is formed between the P soil layer 17 and the N- layer 114, and a depletion layer is generated only on the N layer 14 side.

Since the thickness of the N single layer is usually about 10 μm at most, the depletion layer exists over the entire area between the high resistance layer 13 and the P+ layer 17. P+ layer 17 is connected to N+1 via N layer 15.
iN16, but since both of them form a low resistance region, the potential of P"l'1i17 is almost equal to the potential of the N+ layer 16. Therefore, the depletion layer is connected to the high resistance layer 13. It is considered that it is formed almost uniformly over the entire area and is almost completely depleted by the voltage applied between the high resistance layer 13 and the common N'' layer 16.

When incident light arrives at one point S on the high-resistance layer 13, electron-hole pairs are generated by the P-N-junctions at eight points, and excess carriers pass through the high-resistance layer 13 to the first and second points, respectively. flows towards the anodes 11, 12 of. At this time, the pseudo-Fermi level of the high-resistance layer 13 changes slightly due to excess carriers, but since the potential relationship between the high-resistance layer 13 and the P+ layer 17 is fixed from the outside,
There is almost no change in areas other than those irradiated with light, so the uniformity of the depletion layer is not lost.

As explained above, since the uniformity of the depletion layer does not change due to light irradiation, the linearity of position detection can be maintained sufficiently well, and linear distortion can be significantly improved.

In FIG. 1, the lead electrode 18-1.18-2 is connected to P
Since it extends to the upper surface of the + layer 17, the photovoltaic force does not have non-linearity in the vicinity of the anode electrodes 11 and 12, and it is possible to maintain good linearity of position detection in the -dimensional sensor array. can.

FIG. 4 is a circuit diagram showing how to take out the output of the semiconductor device detection device according to the present invention. In Figure 4, 41.4
2 are pnpt transistors forming differential amplifiers, 43 and 44 are npn transistors forming feedback first stage amplifiers, and 45 is a semiconductor device detection device.

In FIG. 4, the output current obtained from the anode of the semiconductor device detection device 45 is
I)np to form a differential amplifier after being amplified by
) is amplified by transistors 41 and 42 and output to the outside.

(Effects of the Invention) As explained above, the present invention makes the N-substrate thin, and the back surface...
By forming an N layer on the outside of the back surface to increase the thickness, the depletion layer due to the P-N- junction is made uniform by the P+ layer, and the position detection accuracy is further improved by changing its shape. This has the effect of maintaining good position detection accuracy since it is possible to prevent a decrease in .

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of a semiconductor device detection apparatus according to the present invention. 2 and 3 are explanatory diagrams each showing an embodiment of the semiconductor device detection apparatus shown in FIG. 1. FIG. FIG. 4 is a system diagram showing an example of the output circuit of the semiconductor device detection device according to the present invention. FIG. 5 is an explanatory diagram showing an example of a method of measuring the distance to a target object using a semiconductor device detection device. FIG. 6 is a sectional view showing an example of a semiconductor device detection device according to the prior art. FIG. 7 is an explanatory diagram showing an example of an equivalent circuit of the semiconductor device detection apparatus shown in FIG. 6. 8(a) to 8(c) show linearity data of the semiconductor device detection device having the structure shown in FIG. 6, respectively. FIG. 4 is a positional relationship diagram illustrating an example of linear distortion data, an example of linear distortion data, and an output current formula. 9(a) to 9(c) are explanatory diagrams showing the semiconductor device detection apparatus in FIG. 6, respectively, in which (a) is a potential relationship, (b) is a configuration, and (c) is an energy diagram. FIG. 10 is a system diagram showing an example of an output circuit of a semiconductor device detection device according to the prior art. 11.12.61.62...Anode 13.21-2
4.31 to 35.63...High resistance P layer 14.60...N layer 15...N layer 16.68...N layer bottom 17...P+ layer 18-1.18-2 .19,64.65.66...Takeout electrode 45.54.101...Semiconductor device detection device 41-4
4,103,104...1-ransistor 51...Light source 52.53...Measurement object 67...Depletion layer 71-73.74-1-74-3.75-78...Equivalent Circuit element 101...Differential amplifier Patent applicant Hamamatsu Photonics Co., Ltd. Representative Patent attorney Hisashi Inoro M1, M2, 6, 17, B Sort 8I! 1 (C) Diagram M9

Claims (3)

[Claims] (1) A silicon thin plate having a first polarity and a low impurity concentration is formed in a pair separated from each other on a first surface portion of the silicon thin plate, and the first polarity is first and second anodes having opposite second polarities and having extremely high impurity concentrations, and disposed on the first surface of the silicon thin plate so as to connect between the first and second anodes. a high-resistance layer having a second polarity and a low impurity concentration, and a high-resistance layer that can receive incident light and has a low impurity concentration; 1. A semiconductor optical position detection device comprising a low resistance layer having extremely high impurity concentration and having two polarities. (2) The silicon thin plate having the first polarity is the silicon thin plate having the first polarity.
2. The semiconductor optical position detection device according to claim 1, which is a thin layer formed on a silicon substrate with an impurity concentration of such a polarity as to exhibit normal semiconductor characteristics. (3) The semiconductor optical position detection device according to claim 1, wherein the low resistance layer with extremely high impurity concentration is formed in a sandwich structure.