JPS62159458A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS62159458A
JPS62159458A JP61000539A JP53986A JPS62159458A JP S62159458 A JPS62159458 A JP S62159458A JP 61000539 A JP61000539 A JP 61000539A JP 53986 A JP53986 A JP 53986A JP S62159458 A JPS62159458 A JP S62159458A
Authority
JP
Japan
Prior art keywords
ccd
horizontal
solid
imaging device
ccds
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61000539A
Other languages
Japanese (ja)
Other versions
JP2585522B2 (en
Inventor
Toshiyuki Akiyama
俊之 秋山
Toshibumi Ozaki
俊文 尾崎
Haruhisa Ando
安藤 治久
Naoki Ozawa
直樹 小沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP61000539A priority Critical patent/JP2585522B2/en
Publication of JPS62159458A publication Critical patent/JPS62159458A/en
Application granted granted Critical
Publication of JP2585522B2 publication Critical patent/JP2585522B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14868CCD or CID colour imagers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To eliminate an external switch circuit in which an output signal is replaced even if an interlacing operation is executed in an image pickup element for reading out a signal charge of two lines by two horizontal CCDs. CONSTITUTION:A signal charge stored in a photoelectric converter 2 is transferred by vertical CCDs 11-1N to horizontal CCDs 3, 3', and simultaneously read out in two lines by CCDs 3, 3'. A gate connected with a terminal M2 and a storage unit connected with a terminal M2 are provided between the vertical CCDs and the horizontal CCD3'. Two lines of signal charges are transferred to the CCDs 3, 3' without using the storage unit at first field reading time. The order of the lines to be transferred to the CCDs 3, 3' are replaced to be transferred by utilizing the storage unit at second field reading time. Then, even if the combination of the lines to be read simultaneously is altered at every field to be interlaced in a single plate color image pickup element using a mosaiclike color filter, the horizontal CCDs 3, 3' always output the same color signals, thereby eliminating an external switch circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、固体撮像装置特に2次元的に蓄積された情報
電荷を、水平期間ごとに2行ずつ同時に読み出す電荷転
送形固体撮像装置の構造およびその駆動方法と回路に関
する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a solid-state imaging device, particularly a structure of a charge transfer solid-state imaging device that simultaneously reads two-dimensionally stored information charges in two rows per horizontal period. and its driving method and circuit.

〔従来の技術〕[Conventional technology]

第2図はすでに提案されている特願昭49−11746
4号に詳述されている2行同時読み出し可能な電荷転送
形固体撮像装置の回路構成を示したものである。
Figure 2 shows the already proposed patent application No. 49-11746.
This figure shows the circuit configuration of a charge transfer type solid-state imaging device capable of simultaneous readout of two rows, which is detailed in No. 4.

2は入射光を信号電荷に変換する光電変換素子群である
。11.12・・・INは各々光電変換素子部に蓄積し
た電荷を垂直の矢印の方向に転送するだめの電荷結合素
子(CCD)であり、端子V 1 。
2 is a group of photoelectric conversion elements that convert incident light into signal charges. 11.12...IN is a charge-coupled device (CCD) for transferring the charge accumulated in the photoelectric conversion element section in the direction of the vertical arrow, and terminal V 1 .

V2に加える転送パルスφv1g φv2はテレビジョ
ン信号の水平同期信号に同期したものである。
The transfer pulse φv1g φv2 added to V2 is synchronized with the horizontal synchronizing signal of the television signal.

光電変換部2に蓄積された信号電荷は、垂直帰線期間の
間に、端子Voに加えるスイッチパルスφvoによって
、隣接する垂直方向のCCDに移される。
The signal charge accumulated in the photoelectric conversion unit 2 is transferred to the adjacent CCD in the vertical direction by a switch pulse φvo applied to the terminal Vo during the vertical retrace period.

移された信号電荷は、テレビジョン信号の水平同期信号
に同期したパルスφv1.φv2を、V t 。
The transferred signal charge is generated by a pulse φv1. synchronized with the horizontal synchronization signal of the television signal. φv2, Vt.

■2に加えることによって水平期間に2行分ずつ順次上
方向(水平方向のCCDがある方向)に転送される。
(2) By adding the data to 2, two lines are sequentially transferred upward (towards the CCD in the horizontal direction) in the horizontal period.

3と3′は水平方向に電荷を転送するCCDである。垂
直方向のCCDからテレビジョン信号の水平同期信号に
同期して転送されてきた2行分の信号電荷例えば1行目
と2行目の信号電荷Q1.JとQx+J(jはQ 1 
、 Jが転送される垂直方向のCCDの番号を表わし、
11,12.・・・INを取ル)ノ内、QIJはCCD
 3 ニQ xiはCCD3’ に各々独立に転送蓄積
される。第3図はこの間の各駆動パルスのタイミングチ
ャートを示したもので、垂直方向のCCDから水平方向
のCCDに信号電荷を移すには、φvl、φv2に同期
したパルス6゜7を端子Tl、T2に加えることによっ
て行う。
3 and 3' are CCDs that transfer charges in the horizontal direction. Signal charges for two lines transferred from the vertical CCD in synchronization with the horizontal synchronizing signal of the television signal, for example, the signal charges Q1 for the first and second lines. J and Qx+J (j is Q 1
, J represents the number of the vertical CCD to be transferred,
11,12. ...IN is left) Nonouchi, QIJ is CCD
3 niQ xi are independently transferred and stored in the CCD 3'. Fig. 3 shows a timing chart of each driving pulse during this period. This is done by adding to.

なお第3図のタイミングは第1図ccD部に四角で示し
た各電極が第4図に示す構造を持つ場合について示しで
ある。
Note that the timing in FIG. 3 is shown for the case where each electrode indicated by a square in the ccD section of FIG. 1 has the structure shown in FIG. 4.

水平方向のCCD3.3’に移した信号電荷は、これに
続く水平映像期間に端子H1,H2にパルス列φl1l
s φH2を加えて信号電荷Q 114@ Qt、Jを
各々出力端子4,4′から、ビデオ信号として出方する
The signal charge transferred to the CCD 3.3' in the horizontal direction is applied to the terminals H1 and H2 in a pulse train φl1l during the subsequent horizontal video period.
s φH2 is added, and the signal charges Q 114 @Qt, J are output as video signals from the output terminals 4 and 4', respectively.

次のフィールドでは、水平期間ごとに同時に読み出す2
行の組み合わせを変えて(例えば。2.。
In the next field, 2
Change the combination of lines (for example, 2.

とQ 31JI Q4?JとQ fl、 J・・・)出
方することにより、インターレース操作を行う6 第2図の素子を用いて単板カラー撮像装置を作るには、
その光電変換部2の上層に1例えば第5図に示すような
モザイク状の色フィルタ(図中Cy、Ye、Gは各々シ
アン、黄色、緑色の光を、またWは全可視光を透過する
色フィルタであることを示す。以下ではこれらの透過光
r得られる信号電荷も同じ記号で示す)を配置して構成
する。
and Q 31JI Q4? J and Q fl, J...) are used to perform interlace operation.6 To make a single-chip color imaging device using the elements shown in Figure 2,
On the upper layer of the photoelectric conversion section 2, there is a mosaic color filter as shown in FIG. This indicates that it is a color filter.Hereinafter, the signal charges obtained by transmitting light r will also be indicated by the same symbol).

その結果第1フィールドでは出力端子4がら出力信号 S 1 = ・= + W + Cy + W + C
y + −が、出力端子4′から出方信号 5z==−+G+Y e +G+Y e +−が出力さ
れる。しかし第2フィールドではインターレース操作の
ために同時に読み出す2行の組み合すせが変わるため、
第1フィールドとは逆に81は出力端子4′から、s2
は出方端子4がら出力される。
As a result, in the first field, the output signal from the output terminal 4 is S 1 = ・= + W + Cy + W + C
The output signal 5z==-+G+Y e +G+Y e +- is output from the output terminal 4'. However, in the second field, the combination of two lines to be read at the same time changes for interlace operation, so
Contrary to the first field, 81 is from the output terminal 4', s2
is output from output terminal 4.

第6図はこの出力信号S 1 t S xをNTSC信
号に変換する信号処理回路のブロック図を示したもので
、1は撮像素子、9は駆動回路、1oは出力信号81、
S2をNTSC信号に変換する信号処理回路であ゛で発
明が解決しようとする問題点〕 ところで第2図の素子を用いた単板カラー素子では上記
したように出力信号S1.Sxはフィールドごとに異な
る出力端子から出力されるため、信号処理回路の入力端
子に常に同じ信号(例えば入力端子51にはSz)が入
力されるように素子からの2つの信号を入れ換えるスイ
ッチ回路8が必要になり、回路が複雑になる。また同じ
出力信号SLでも、フィールドごとに通過する経路が異
なるためその大きさが変化し、フリッカ−が発生するな
どの欠点があった。
FIG. 6 shows a block diagram of a signal processing circuit that converts this output signal S 1 t S x into an NTSC signal. 1 is an image sensor, 9 is a drive circuit, 1o is an output signal 81,
Problems to be Solved by the Invention with a Signal Processing Circuit that converts S2 into an NTSC signal] By the way, in the single-plate color element using the element shown in FIG. 2, as described above, the output signal S1. Since Sx is output from different output terminals for each field, a switch circuit 8 switches the two signals from the elements so that the same signal (for example, Sz to the input terminal 51) is always input to the input terminal of the signal processing circuit. is required, making the circuit complex. Furthermore, even if the output signal SL is the same, the path it passes through differs from field to field, so its magnitude changes, resulting in flicker.

本発明の目的は、2本以上の水平方向のCCDを有し、
これを用いて2行同時に読み出す電荷転送層固体撮像素
子を用いた単板カラー場像装置において、インターレー
ス操作を行っても2つ以上の出力信号を入れ換える外部
スイッチ回路が不要で、またフリッカ−も生じない固体
撮像素子の構成とその駆動回路を提供することにある。
The object of the present invention is to have two or more horizontal CCDs,
Using this, in a single-chip color field imaging device using a charge transfer layer solid-state image sensor that reads out two rows simultaneously, there is no need for an external switch circuit to switch two or more output signals even when performing interlace operation, and there is no flicker. It is an object of the present invention to provide a structure of a solid-state image sensor and a driving circuit thereof that do not cause this phenomenon.

〔問題点を解決するための手段〕[Means for solving problems]

上記の目的を達成するため本発明においては、第2図の
素子の構造の内水平方向のCCDの構造を変える。ある
いは垂直方向のCCDと水平方向のCCDの間に新たに
蓄積部を設ける。この蓄積部あるいは水平方向のCCD
を利用して、垂直方向のCCDで転送されてくる2行の
信号電荷の順序を、フィールドごとに素子内に入れ換え
て水平方向のCCD内に移す。そして同じ種類の信号電
荷(例えばWとCy)は、常に同じ水平方向のCCDを
通して外部に読み出すようにしたことに特徴がある。
In order to achieve the above object, the present invention changes the CCD structure in the horizontal direction of the device structure shown in FIG. Alternatively, a new storage section is provided between the vertical CCD and the horizontal CCD. This storage section or horizontal CCD
Using this, the order of the two rows of signal charges transferred by the vertical CCD is switched within the element for each field and transferred to the horizontal CCD. A feature is that signal charges of the same type (for example, W and Cy) are always read out to the outside through the same horizontal CCD.

〔作用〕[Effect]

以上の如き本発明の構成によれば、2本以上の水平方向
のCCDを有し、これを用いて2行の光ダイオード列に
蓄積されている信号電荷を、水平期間ごとに同時に読み
出す電荷転送層固体撮像素子を用いた単板カラー撮像装
置において、インターレース操作を行っても同一色信号
は常に同じ出力端子から出力することができる。そのた
め従来素子を用いた撮像装置において必要だった2つの
出力信号をフィールドごとに入れ換える外部スイッチ回
路が不用になり回路を簡単化することができる。また各
出力信号は各フィールドとも同じ回路を通過させること
ができるので、フリッカ−のない画像を得ることができ
る。
According to the configuration of the present invention as described above, two or more horizontal CCDs are provided, and the signal charges accumulated in two rows of photodiode columns are read out simultaneously in each horizontal period using the CCDs. In a single-chip color imaging device using a layered solid-state imaging device, the same color signal can always be output from the same output terminal even when interlace operation is performed. Therefore, an external switch circuit for switching two output signals for each field, which was necessary in an imaging apparatus using conventional elements, is no longer necessary, and the circuit can be simplified. Furthermore, since each output signal can pass through the same circuit for each field, a flicker-free image can be obtained.

〔発明の実施例〕[Embodiments of the invention]

第1図はインターレース操作を行っても、フィールドに
よらず同種の信号電荷は常に同じ水平方向のCCDを通
して読み出すことを可能にする、本発明による固体撮像
素子の一実施例の構成図である。
FIG. 1 is a block diagram of an embodiment of a solid-state image pickup device according to the present invention, which allows the same type of signal charge to be always read out through a CCD in the same horizontal direction regardless of the field even if an interlace operation is performed.

本装置は、端子T1につながる電極に隣接して、端子M
2につながるゲートと端子M1につながる蓄積部を設け
た点が第1図の素子と異なる。
This device has a terminal M adjacent to the electrode connected to the terminal T1.
This device differs from the device shown in FIG. 1 in that a gate connected to terminal M1 and a storage section connected to terminal M1 are provided.

本装置において、第1フィールドは端子M2をオフ状態
に保っておく。そして第2図の装置同様端子V1.V2
〜Ht、Hzに第3図の駆動パルスを加え、2行の信号
電荷例えばQ1+a* QxeJを水平方向のC0D3
.3’に転送し、出方端子4,4′から出力する。
In this device, the first field keeps terminal M2 in the off state. Similarly to the device shown in FIG. 2, the terminal V1. V2
By adding the driving pulse shown in Fig. 3 to ~Ht, Hz, the signal charges of two rows, for example, Q1+a*QxeJ, are changed to C0D3 in the horizontal direction.
.. 3' and output from output terminals 4 and 4'.

一方第2フィールドでは第7図の駆動パルスのタイミン
グチャートに従って駆動する。すなわち同時に転送され
てくる2行の信号電荷02pt。
On the other hand, in the second field, driving is performed according to the timing chart of driving pulses shown in FIG. That is, two rows of signal charges 02pt are transferred simultaneously.

Q82.の内初めに送られて来るQ z 、 tは端子
Ml。
Q82. Q z , t which is sent first is the terminal Ml.

M2に加えるパルス21.22によって一旦蓄積部に移
した後、M2につながるゲートをオフ状態に保っておく
。そして端子Vll Vat T 1 v Htに加え
るパルス23.〜26によってまず後から送られてくる
信号電荷Qajを水平方向のCCD内に転送する。その
後再び端子M2につながるゲートをパルス27でオン状
態にしてM積部内の信号電荷Qza を端子T1につな
がる電極下にもどす。
Once transferred to the storage section by pulses 21 and 22 applied to M2, the gate connected to M2 is kept in an off state. and a pulse 23. applied to the terminal Vll Vat T 1 v Ht. 26, the signal charge Qaj sent later is first transferred into the CCD in the horizontal direction. Thereafter, the gate connected to the terminal M2 is turned on again by the pulse 27, and the signal charge Qza in the M product section is returned to the bottom of the electrode connected to the terminal T1.

その後端子H1,T2にパルス28.29を加え、信号
電荷Q37は水平方向のCCD3に、信号電荷Q2Jは
第1フィールドと同じ水平方向のCCD3’に移す。そ
してこれに外く水平映像期間に出力端子4,4′から読
み出す。
Thereafter, pulses 28 and 29 are applied to the terminals H1 and T2, and the signal charge Q37 is transferred to the CCD 3 in the horizontal direction, and the signal charge Q2J is transferred to the CCD 3' in the same horizontal direction as in the first field. In addition to this, data is read from the output terminals 4 and 4' during the horizontal video period.

この素子に例えば第5図の色フィルタを配置して単板カ
ラー撮像装置を作ると、第2フィールドにおいても出力
端子4からは第1フィールドと同じ信号 S1=・・・十w+c y +w+c y+・・・が、
また出力端子4′からは S 2= −+ G + Y e + G + Y e
 + −が出力される。
If, for example, the color filter shown in FIG. 5 is arranged on this element to make a single-chip color imaging device, the same signal as in the first field will be outputted from the output terminal 4 in the second field S1=...1 w+c y +w+c y+. ··but,
Also, from the output terminal 4', S 2 = -+ G + Y e + G + Y e
+ - is output.

そのためこの素子を用いた単板カラー撮像装置の信号処
理回路は、第8図に示すように第6図の回路で必要であ
ったスイッチ回路8は不要になり、回路が簡単になる。
Therefore, the signal processing circuit of a single-chip color imaging device using this element does not require the switch circuit 8 required in the circuit of FIG. 6, as shown in FIG. 8, and the circuit becomes simpler.

また2つの出力信号Sz+ 82はフィールドによらず
常に同じ回路を通過するのでゲインにバラツキは無く、
フリッカ−のない画像を得ることができる。
Also, since the two output signals Sz+82 always pass through the same circuit regardless of the field, there is no variation in gain.
A flicker-free image can be obtained.

第9図は本発明による他の実施例を示す図である。本素
子は第2図、第1図の装置と、次の3点が異なる。すな
わち水平方向のCCDの各電極を第10図に示すように
独立に制御できるようにした点(垂直方向CCDは第4
図の構造で良い)と、2本の水平方向のCCDを制御す
る各電極を水平方向に互いに2電極分ずれた電極につな
いだ構造にした点、および水平方向のCCDを制御する
電極の内同じ2本の垂直方向のCCDの間にありかつ互
いにむすばれている電極(第9図では端子Hzにつなが
る電極)を、垂直方向のCCDから水平方向のCCD内
に信号電荷を移す間OFF状態に保つ点である。
FIG. 9 is a diagram showing another embodiment according to the present invention. This device differs from the devices shown in FIGS. 2 and 1 in the following three points. In other words, each electrode of the CCD in the horizontal direction can be controlled independently as shown in FIG.
(The structure shown in the figure is fine) and the structure in which each electrode that controls the two horizontal CCDs is connected to an electrode that is shifted by two electrodes from each other in the horizontal direction, and that the electrodes that control the horizontal CCDs are The electrodes located between the same two vertical CCDs and connected to each other (the electrodes connected to the terminal Hz in Figure 9) are kept in the OFF state while the signal charge is transferred from the vertical CCD to the horizontal CCD. The point is to keep it.

なお第9図では端子Tr、Txにつながる電極も第10
図同様各々1電極で構成されるものとして以下説明する
6 第11図は第9図の素子の駆動パルス・タイミングチャ
ートを示したものである。端子T2.H4に加えるパル
スはフィールドによって異なり、第1フィールドのパル
スは実線で、第2フィールドのパルスは破線で示しであ
る。
In addition, in FIG. 9, the electrodes connected to the terminals Tr and Tx are also connected to the 10th electrode.
As shown in the figure, each device will be described below as having one electrode.6 FIG. 11 shows a drive pulse timing chart of the device shown in FIG. 9. Terminal T2. The pulses applied to H4 vary depending on the field; the pulses for the first field are shown by solid lines, and the pulses for the second field are shown by broken lines.

前の2素子同様この素子でも水平帰線期間に入ったとき
、端子Vz+Vzにパ/L/ス23’ 、24’を加え
、垂直方向のCCD内の信号電荷を転送する。この時第
1フィールドでは同時に端子TI。
Like the previous two elements, when this element enters the horizontal retrace period, pass/L/passes 23' and 24' are applied to the terminals Vz+Vz to transfer the signal charges in the CCD in the vertical direction. At this time, in the first field, the terminal TI is simultaneously applied.

Ht+ Tz、Hsにもパルス31〜34を加えておき
、例えば初めに転送されてくる1行目の信号電荷Q 1
. j を水平方向のCCDa内まで転送する。
By adding pulses 31 to 34 to Ht+ Tz and Hs, for example, the signal charge Q 1 of the first row transferred at the beginning
.. j is transferred horizontally to within CCDa.

この後端子T2をOFF状態にすると端子H2,。After that, when terminal T2 is turned off, terminal H2,.

H4につながる電極はOFF状態にあるため、水平方向
のCCDa内にあり、互いに異なる垂直方向のCCDを
転送された信号電荷Qxesxe QxexztQ 1
 、1 s・・・は水平方向に互いに混ざることなく端
子H8につながる電極下all〜alNに蓄積される。
Since the electrode connected to H4 is in the OFF state, the signal charges Qxesxe QxexztQ 1 are located within the horizontal CCDa and are transferred to different vertical CCDs.
, 1 s... are accumulated under the electrodes all to alN connected to the terminal H8 without mixing with each other in the horizontal direction.

次に再び端子Vx、Vzにパルス23’ 、24’を加
え後から送られてきた信号電荷Q21、を垂直方向のC
CDから水平方向のCCDに転送する時は、端子Tx、
H1,H番のみにパルス31’ 、32’ 。
Next, pulses 23' and 24' are applied to the terminals Vx and Vz again, and the signal charges Q21 sent later are converted into vertical C
When transferring from CD to horizontal CCD, terminal Tx,
Pulses 31' and 32' are applied only to H1 and H numbers.

35を加わえ、端子T2.H2はOFF状態に保つ。35 and terminal T2. Keep H2 in the OFF state.

そしてQ 1 、 aは水平方向のCCD3内の端子H
8につながる電極下に蓄積したまま、Qz、Jを同じ端
子H8につながる水平方向のCCD3’の電極下bzt
・・・bl、Nに移す。この後これに続く水平映像期間
に順次水平方向のCCD内を転送し出力端子4゜4′か
ら読み出す。
And Q 1 , a is the terminal H in the CCD 3 in the horizontal direction
While accumulating under the electrode connected to terminal H8, Qz and J are connected under the electrode bzt of CCD 3' in the horizontal direction connected to the same terminal H8.
...Move to bl, N. Thereafter, in the following horizontal video period, the contents of the CCD in the horizontal direction are sequentially transferred and read out from the output terminal 4°4'.

一方策2フィールドではパルス23’ 、24’によっ
て信号電荷Q 1* tzを水平方向のCCDに転送す
る時、端子T2はオフ状態に保ち代りに端子H4にはパ
ルス35′を加えてオン状態にする。
On the other hand, in field 2, when the signal charge Q 1 * tz is transferred to the horizontal CCD by pulses 23' and 24', terminal T2 is kept off, and instead, pulse 35' is applied to terminal H4 to turn it on. do.

そして端子Txr Hl、Hsに第1フィールドと同じ
パルス31,32.34を加え、初めに転送されで来る
信号電荷Q22、を水平方向のCCD3’の端子H8な
つながる電極下bxz〜bINに転送し蓄積する0次に
端子H4はオフ状態に保ったまま端子T2にパルス33
′を加えてオン状態にし、端子Vg Vxp Tl、H
lのパルス23’、24′。
Then, the same pulses 31, 32, and 34 as in the first field are applied to the terminals Txr Hl and Hs, and the signal charge Q22 that is transferred first is transferred to the terminal H8 of the CCD 3' in the horizontal direction, bxz~bIN under the connected electrodes. To accumulate 0, pulse 33 is applied to terminal T2 while terminal H4 is kept off.
’ to turn it on, and the terminals Vg Vxp Tl, H
l pulses 23', 24'.

30’ 、32’ を加える。そして後から転送されて
来る信号電荷Q a Jを水平方向のCCD3の端子H
δにつながる電極下all〜axN(Qzaが蓄積され
ている電極につながる電極)に転送し蓄積する。
Add 30' and 32'. Then, the signal charge Q a J transferred later is transferred to the terminal H of the CCD 3 in the horizontal direction.
It is transferred and accumulated under the electrodes connected to δ all to axN (electrodes connected to the electrode where Qza is accumulated).

その後これに続く水平映像期間に順次水平方向のCCD
内を転送し出力端子4,4′から読み出す。
Then, in the subsequent horizontal image period, the horizontal CCD
The contents are transferred and read from output terminals 4 and 4'.

この様に第9図の素子ではフィールドごとに2行の信号
電荷を入れ換えて水平方向のCCD内に転送して読み出
すことができるので、例えば第5図の色フィルタを配置
して単板カラー撮像装置を作ると、第1.第2フィール
ドとも信号Sz =・・・+W + Cy + W +
 Cy+・・・は出力端子4から信号 Sx=・=+G+Y e +G十Y e 十−は出力端
子4′から出力することができる。
In this way, with the device shown in Figure 9, the signal charges in two rows can be exchanged for each field and transferred to the CCD in the horizontal direction for readout. After making the device, the first step is to create the device. In both the second field, the signal Sz =...+W + Cy + W +
Cy+... can be output from the output terminal 4, and the signal Sx=.=+G+Ye +G+Ye+- can be output from the output terminal 4'.

そのためこの素子を用いた単板カラー撮像装置の信号処
理回路は第8図同様スイッチ回路8を必要とせず、また
フリッカ−のない画像を得ることができる。
Therefore, the signal processing circuit of a single-chip color imaging device using this element does not require the switch circuit 8 as in FIG. 8, and can obtain flicker-free images.

第12図は本発明によるさらに他の実施例を示す図であ
る6一般に固体撮像素子例えば第1図の素子では、光ダ
イオード2の下に入射光によって電荷が発生する。この
発生した電荷が光ダイオードに吸収蓄積されて信号電荷
Q11.どなるが、発生した電荷の一部は拡散して直接
垂直方向のCCD内に混入する。そして強い光が当たる
点を中心に画面上下方向に白い帯状のスミアの形で現わ
れ画質を劣化させる。第12図の素子は2行分の信号電
荷だけでなく、このスミアの原因になる電荷(以下スミ
ア電荷と記す)も独立に出力し、出力した2行のビデオ
信号からスミア信号を差し引くことによってスミアのな
いテレビ信号を作ろうとするものである。
FIG. 12 is a diagram showing still another embodiment of the present invention. 6 Generally, in a solid-state image pickup device, such as the device shown in FIG. 1, charges are generated under the photodiode 2 by incident light. This generated charge is absorbed and accumulated in the photodiode, and the signal charge Q11. However, some of the generated charges diffuse and directly enter the CCD in the vertical direction. Then, a white band-like smear appears in the vertical direction of the screen centered on the point where strong light hits, degrading the image quality. The device in Figure 12 independently outputs not only the signal charge for two lines, but also the charge that causes this smear (hereinafter referred to as smear charge), and by subtracting the smear signal from the output two lines of video signal. It attempts to create a smear-free television signal.

3種の信号電荷(2行の信号電荷とスミア電荷)を独立
に出力するため、本素子では垂直方向のCCDの電極を
端子v1〜v4で制御する4組の電極群に分け、これを
第13図に模式的に示すように端子v4〜v1を順次オ
ン状態にすることによって行う。また水平方向のCCD
を3本設け、この3つの電荷を独立に転送し出力するよ
うにしている6ただし3本の水平方向のCCDを制御す
る各電極は第9図の素子同様互いに2電極分ずれた電極
につないだ構造にするとともに、常に同じ2本の垂直方
向のCCDの間にありかつ互いにつながれている電極(
第12図では端子H2につながる電極)があるようにす
る。
In order to output three types of signal charges (two rows of signal charges and smear charges) independently, this device divides the vertical CCD electrodes into four groups of electrodes controlled by terminals v1 to v4. This is done by sequentially turning on the terminals v4 to v1 as schematically shown in FIG. Also, horizontal CCD
Three CCDs are provided, and these three charges are transferred and output independently.6 However, the electrodes that control the three horizontal CCDs are connected to electrodes that are offset by two electrodes from each other, similar to the element in Figure 9. In addition to the structure, the electrodes (
In FIG. 12, there is an electrode connected to the terminal H2.

第14図は第12図の素子の駆動パルスタイミングチャ
ートを示したものである。図中41は第13図の駆動方
法によって垂直方向のCCD内にある3つの電荷位置を
各々1段ずつ転送する一連の操作である。すなわちこの
一連のパルスを加える間に、端子Tl、T2.T3.H
l、H3゜H4にパルス42〜48および34を加える
と、垂直方向のCCDの最上部の端子V4につながる電
極下にあったスミア電荷例えばQ n !HJは、水平
方向のCCD3の端子H8につながる電極下にCrs〜
CINに移される。また垂直方向のCCDの上部にある
端子Vs*Vzにつながる電極下にあった信号電荷Q 
3.Je Q4#Jは各々一段ずつ上がり、端子v4と
Vδにつながる電極下に転送される。そしてこの後端子
H2とT3をオフ状態に保ったまま、第9図の素子の駆
動(第11図)と同様の操作を行う。
FIG. 14 shows a drive pulse timing chart for the device shown in FIG. 12. In the figure, reference numeral 41 denotes a series of operations for transferring three charge positions in the CCD in the vertical direction, one stage each, by the driving method shown in FIG. That is, while applying this series of pulses, the terminals Tl, T2 . T3. H
When pulses 42 to 48 and 34 are applied to l, H3° H4, the smear charge that was under the electrode leading to the top terminal V4 of the vertical CCD, e.g. Q n ! HJ is Crs ~ under the electrode connected to terminal H8 of CCD3 in the horizontal direction.
Transferred to CIN. Also, the signal charge Q that was under the electrode connected to the terminal Vs*Vz at the top of the CCD in the vertical direction
3. Je Q4#J are each raised one stage and transferred under the electrodes connected to terminals v4 and Vδ. Thereafter, while keeping the terminals H2 and T3 in the OFF state, the same operation as driving the element in FIG. 9 (FIG. 11) is performed.

この操作においてもスミア電荷は常に水平方向のCC:
D3を通して、また2行の信号電荷はフィールドごとに
入れ換えて水平方向のCCD3’ と3′内に転送して
読み出すことができるので、例えば第5図の色フィルタ
を配置して単板カラー撮像装置を作ると、第1.第2フ
ィールドともにスミア信号は出力端子4から、信号 S1=・・・+W + Cy + W + Cy+・・
・は出力端子4′から、信号 S2.=・・・+G+Y e +G’+Y e +−は
出力端子4“から出力することができる。
Even in this operation, the smear charge is always horizontal CC:
The signal charges in the two rows can be exchanged field by field and transferred to the CCDs 3' and 3' in the horizontal direction and read out through the D3.For example, by arranging the color filters shown in FIG. If you make , the first. In both the second field, the smear signal is from the output terminal 4, and the signal S1=...+W+Cy+W+Cy+...
・ is the signal S2. from the output terminal 4'. =...+G+Y e +G'+Y e +- can be output from the output terminal 4''.

そのためこの素子を用いた単板カラー撮像装置の信号処
理回路では、スイッチ回路を必要とせずまたフリッカ−
のない画像を得ることができる。
Therefore, the signal processing circuit of a single-chip color image pickup device using this element does not require a switch circuit and eliminates flicker.
You can get an image without.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、2本以上の水平方
向のCCDを有し、これを用いて2行の先ダイオード列
に′TJ積されている信号電荷を水平期間ごとに同時に
読み出す電荷転送形固体撮像素子を用いた単板カラー撮
像装置において、インターレース操作を行っても同一色
信号は常に同じ出力端子から出力することができる。そ
のため従来素子を用いた撮像装置において必要だった2
つの出力信号をフィールドごとに入れ換える外部スイッ
チ回路が不用になり回路を簡単化することができる。ま
た各出力信号は各フィールドとも同じ回路を通過させる
ことができるので、フリッカ−のない両像を得ることが
できる。
As explained above, according to the present invention, two or more horizontal CCDs are provided, and the signal charges that are TJ multiplied in the previous diode column of two rows are read out simultaneously in each horizontal period. In a single-chip color imaging device using a transfer type solid-state imaging device, the same color signal can always be output from the same output terminal even if interlace operation is performed. Therefore, in imaging devices using conventional elements, 2
This eliminates the need for an external switch circuit that switches two output signals for each field, and the circuit can be simplified. Furthermore, since each output signal can pass through the same circuit for each field, it is possible to obtain both flicker-free images.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例になる固体撮像装置の回路図
、第2図は従来の2行同時読み出しの電荷転送形固体撮
像装置の回路構成図、第2図〜第5図はその駆動法とフ
ィルタ配置および信号処理回路、第7図〜第8図は第1
図に示した固体撮像装置の構造と駆動法とその信号処理
回路例、第9図〜第11図は他の実施例による固体撮像
装置の構造と駆動法、第12図〜第14図はさらに他の
実施例になる固体撮像装置の回路図とその説明図第1図 r  V2 早 3 口 H1′ 7)H2 亭 7I!1 第8図 第 9 口 早 10 の 第  /l   図 3s′ 第 12  の H3 第 75  In v−74国 手  続  補  正  書(方式) %式% 事件の表示 昭和61年 特許願 第000539号発明の名称  
固体撮像装置 補正をする者 事件との関係   特 許 出 願 人名称(510)
     株式会社 日  立  製  作  新式 
 理  人
FIG. 1 is a circuit diagram of a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional charge transfer solid-state imaging device with simultaneous two-row readout, and FIGS. Driving method, filter arrangement, and signal processing circuit, Figures 7 and 8 are
Examples of the structure and driving method of the solid-state imaging device and its signal processing circuit shown in the figure, FIGS. 9 to 11 show the structure and driving method of the solid-state imaging device according to other embodiments, and FIGS. 12 to 14 show further A circuit diagram of a solid-state imaging device according to another embodiment and its explanatory diagram. Figure 1. 1 Figure 8 Figure 9 Fast-spoken 10th/l Figure 3s' 12th H3 75th Inv-74 National Proceedings Amendment (Method) % Formula % Indication of Case 1985 Patent Application No. 000539 Invention name
Relationship with the case of a person who corrects solid-state imaging devices Patent applicant name (510)
New type manufactured by Hitachi Co., Ltd.
person

Claims (1)

【特許請求の範囲】 1、2次元的に配列された複数個の光電変換素子とそれ
ぞれの光電変換素子に蓄積された信号電荷を垂直方向に
転送する複数の電荷結合素子(以下垂直方向のCCDと
記す)と、該垂直方向の電荷結合素子から受けた信号電
荷を1水平期間で水平方向に読み出す電荷結合素子(以
下水平方向のCCDと記す)から成り、1水平期間に同
時に2行分の信号電荷を読み出せる構造を有する固体撮
像装置において、インターレース操作を行い同時に読み
出す行の組み合わせを変えても、同一行の信号電荷は第
1、第2フィールドとも常に同一出力端子から出力され
るようにしたことを特徴とする固体撮像装置。 2、特許請求の範囲第1項記載の固体撮像装置において
、垂直方向のCCDと水平方向のCCDの間に信号蓄積
部を設け、この蓄積部を使用して垂直方向のCCD内を
転送されてくる信号電荷の順序を入れ換えるようにした
ことを特徴とする固体撮像装置。 3、特許請求の範囲第1項記載の固体撮像装置において
、2本以上の水平方向のCCDを設けるとともに、この
CCDを制御する電極は垂直方向のCCDの横方向の1
周期当り4電極以上設けた構成であること、該異なる水
平方向のCCDの4電極は互いに2電極分ずれた電極に
つながれた構成であることを特徴とする固体撮像装置。 4、特許請求の範囲第3項記載の固体撮像装置において
、該異なる水平方向のCCDの4電極の内少なくとも1
電極は同じ2本の垂直方向のCCDの間にある電極どう
しをつないだ構成であることを特徴とする固体撮像装置
。 5、特許請求の範囲第3項、第4項記載の固体撮像装置
において、垂直方向のCCDを水平期間ごとに転送して
きた2行の信号電荷の順序を、該水平方向のCCD内で
入れ換えることを特徴とする固体撮像装置。 6、特許請求の範囲第4項記載の固体撮像装置において
、該同じ2本の垂直方向のCCDの間にある電極どうし
をつないだ1連の電極の内、少なくとも1電極を、該垂
直方向のCCDから水平方向のCCDに信号電荷を転送
しまた信号電荷の順序を入れ換える間、常にOFF状態
に保つことを特徴とする固体撮像装置。
[Claims] A plurality of photoelectric conversion elements arranged in one or two dimensions and a plurality of charge-coupled devices (hereinafter referred to as vertical CCDs) that vertically transfer signal charges accumulated in each photoelectric conversion element. ) and a charge-coupled device (hereinafter referred to as horizontal CCD) that reads out the signal charge received from the vertical charge-coupled device in the horizontal direction in one horizontal period. In a solid-state imaging device that has a structure in which signal charges can be read out, even if the combination of rows to be read out simultaneously is changed by performing an interlacing operation, the signal charges in the same row are always output from the same output terminal for both the first and second fields. A solid-state imaging device characterized by: 2. In the solid-state imaging device according to claim 1, a signal storage section is provided between the vertical CCD and the horizontal CCD, and the signal is transferred within the vertical CCD using this storage section. 1. A solid-state imaging device characterized in that the order of signal charges is switched. 3. In the solid-state imaging device according to claim 1, two or more horizontal CCDs are provided, and the electrodes for controlling the CCDs are connected to one horizontal CCD of the vertical CCD.
A solid-state imaging device characterized in that it has a configuration in which four or more electrodes are provided per period, and the four electrodes of the CCD in different horizontal directions are connected to electrodes that are shifted by two electrodes from each other. 4. In the solid-state imaging device according to claim 3, at least one of the four electrodes of the CCD in different horizontal directions
A solid-state imaging device characterized in that the electrodes are connected to each other between two CCDs in the same vertical direction. 5. In the solid-state imaging device according to claims 3 and 4, the order of the two rows of signal charges transferred from the vertical CCD in each horizontal period is changed within the horizontal CCD. A solid-state imaging device featuring: 6. In the solid-state imaging device according to claim 4, at least one electrode of a series of electrodes connected between the same two CCDs in the vertical direction is A solid-state imaging device characterized in that it is always kept in an OFF state while transferring signal charges from a CCD to a horizontal CCD and changing the order of the signal charges.
JP61000539A 1986-01-08 1986-01-08 Solid-state imaging device Expired - Fee Related JP2585522B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61000539A JP2585522B2 (en) 1986-01-08 1986-01-08 Solid-state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61000539A JP2585522B2 (en) 1986-01-08 1986-01-08 Solid-state imaging device

Publications (2)

Publication Number Publication Date
JPS62159458A true JPS62159458A (en) 1987-07-15
JP2585522B2 JP2585522B2 (en) 1997-02-26

Family

ID=11476548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61000539A Expired - Fee Related JP2585522B2 (en) 1986-01-08 1986-01-08 Solid-state imaging device

Country Status (1)

Country Link
JP (1) JP2585522B2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59169278A (en) * 1983-03-16 1984-09-25 Hitachi Ltd Solid state image pickup device
JPS60167579A (en) * 1984-02-10 1985-08-30 Hitachi Ltd Charge transfer type solid-state image pickup element
JPH0620275A (en) * 1992-03-19 1994-01-28 Polygram Intern Holding Bv Manufacture of duplicating magnetic playback medium, duplicating device for above manufacture and magnetic duplicating head

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59169278A (en) * 1983-03-16 1984-09-25 Hitachi Ltd Solid state image pickup device
JPS60167579A (en) * 1984-02-10 1985-08-30 Hitachi Ltd Charge transfer type solid-state image pickup element
JPH0620275A (en) * 1992-03-19 1994-01-28 Polygram Intern Holding Bv Manufacture of duplicating magnetic playback medium, duplicating device for above manufacture and magnetic duplicating head

Also Published As

Publication number Publication date
JP2585522B2 (en) 1997-02-26

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