JPS6153717A - Thin film forming device - Google Patents

Thin film forming device

Info

Publication number
JPS6153717A
JPS6153717A JP17508084A JP17508084A JPS6153717A JP S6153717 A JPS6153717 A JP S6153717A JP 17508084 A JP17508084 A JP 17508084A JP 17508084 A JP17508084 A JP 17508084A JP S6153717 A JPS6153717 A JP S6153717A
Authority
JP
Japan
Prior art keywords
thin film
film forming
particles
incident angle
forming apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17508084A
Other languages
Japanese (ja)
Other versions
JPH0652713B2 (en
Inventor
Hideaki Takeuchi
秀明 竹内
Hideo Oikawa
及川 秀男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP59175080A priority Critical patent/JPH0652713B2/en
Publication of JPS6153717A publication Critical patent/JPS6153717A/en
Publication of JPH0652713B2 publication Critical patent/JPH0652713B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

PURPOSE:To form a thin film without any break in a submicron region through making each incident angle predetermined angle by injecting most of particles from a supply source in the first and the second incident angles with a surface. CONSTITUTION:After a particle supply source generating adhering particles 24 and 25 of thin film forming material in a thin film forming device, these particies 24 and 25 are introduced and adhered to a surface of a thin film forming substrate 1 forming a thin film in a target 27. Most of particles 24 and 25 from this particles supply source are used to the surface of the substrate 1 as the first incident angle being an outside erosion region 22 and as the second incident angle being as an inside erosion region 23. This first incident angle is set at a sharper angle with a surface than the second incident angle, and the second incident angle is set at a sharper angle with a vertical direction of the surface than the first incident angle. After the first incident angle is set as about 15 deg. and the second incident angle is set at about 60-90 deg., a thin film is formed without any break in a submicron region.

Description

【発明の詳細な説明】 [技術分野] 本発明は、半導体装置の製造に用いる薄膜形成装置に関
し、特に間隔の狭い段差の間や微細なスルーホールの内
部にも、切れ目のない良好な被覆形状の薄膜を形成する
ことができる装置に関するものである。
Detailed Description of the Invention [Technical Field] The present invention relates to a thin film forming apparatus used in the manufacture of semiconductor devices, and in particular to a thin film forming apparatus that can form a thin film with a good coating shape without any breaks even between narrow steps or inside minute through holes. The present invention relates to an apparatus capable of forming a thin film.

[従来技術〕 半導体装置の製造に用いられている薄膜形成法の主なも
のとしては、スパッタ法、蒸着法およびCVD法がある
。 CVD法は、半導体装置表面等の薄膜を成長させる
面(以下、成長面と記す)付近に導入されたガス状の原
料を成長面上で加熱して反応または分解させて薄膜を形
成する方法である。
[Prior Art] The main thin film forming methods used in the manufacture of semiconductor devices include sputtering, vapor deposition, and CVD. The CVD method is a method in which a gaseous raw material is introduced near the surface on which a thin film is grown (hereinafter referred to as the growth surface), such as the surface of a semiconductor device, and is heated on the growth surface to react or decompose to form a thin film. be.

これに対して、スパッタ法および蒸着法では、薄膜の原
料を、半導体装置の表面に付着する粒子(以下、付着粒
子と記す)として、供給源から成    1長面に直接
に入射させ、その成長面上に付着粒子を付着させて薄膜
を形成する方法であり、成長面の温度がCVD法に比べ
て低くても良好な8口を形成できることから、半導体装
置用の薄膜形成方法として広く用いられている。
On the other hand, in the sputtering method and the vapor deposition method, the raw material for the thin film is directly incident on the long surface of the semiconductor device from the supply source as particles that adhere to the surface of the semiconductor device (hereinafter referred to as adhered particles). This is a method of forming a thin film by depositing particles on a surface, and it is widely used as a thin film forming method for semiconductor devices because it can form good 8-holes even when the temperature of the growth surface is lower than that of the CVD method. ing.

半導体装置表面にこれら薄膜を形成するのは、電極配線
や絶縁膜層を形成するためである。ところで、半導体装
置表面上にはトランジスタ等の素子、分離領域、配線並
びにスルーホールが形成されているので、表面には凹凸
がある。このような凹凸のある表面上に配線を形成する
場合、配線の断線やショートを防ぐためには、半導体装
置表面の凹凸は絶縁膜で滑らかに覆われている必要があ
る。また、配線を形成するための8膜自身も半導体装置
表面の凹凸による段差を滑らかに覆う必要がある。
The reason why these thin films are formed on the surface of a semiconductor device is to form electrode wiring and an insulating film layer. Incidentally, since elements such as transistors, isolation regions, wiring, and through holes are formed on the surface of a semiconductor device, the surface is uneven. When wiring is formed on such an uneven surface, the unevenness on the surface of the semiconductor device needs to be smoothly covered with an insulating film in order to prevent disconnection or short-circuiting of the wiring. In addition, the eight films for forming wirings themselves need to smoothly cover steps caused by unevenness on the surface of the semiconductor device.

スパッタ法や蒸着法では、付着粒子は供給源から成長面
へ直接入射するので、成長面に対して主に高い角度から
付着袢子が入射すると、段差の側壁には付着粒子の到達
数が少なく側壁で成長するS厚が薄くなる。このため、
従来の装置においては、第2図に示すように、薄膜成長
用基板、例えば半導体装置基板1に対する付着粒子2の
入射角度を低くして、段差の側壁にも充分な膜厚の膜が
形成できるようにし、以て滑らかな被覆形状を実現して
、凹凸による配線の断線やショートによる歩留り低下を
防いでいる。
In sputtering and vapor deposition methods, adhered particles are directly incident on the growth surface from the supply source, so if the adhered insulator is incident mainly at a high angle to the growth surface, fewer adhered particles will reach the side walls of the step. The S thickness growing on the sidewall becomes thinner. For this reason,
In the conventional apparatus, as shown in FIG. 2, by lowering the incident angle of the adhered particles 2 onto the thin film growth substrate, for example, the semiconductor device substrate 1, it is possible to form a film with a sufficient thickness even on the side walls of the step. This achieves a smooth coating shape and prevents a drop in yield due to wire breakage or short circuits due to unevenness.

つまり、一般に従来用いられている半導体装置表面の凹
凸による段差の高さは0.5 p−mから1.0 p−
m程度であり、これに対して段差の間隔やスルーホール
の大きさは2ルmから3ルm以上である。従って、段差
と段差との間やスルーホールの底部へ向けて入射してく
る付着粒子のうち付着点周囲の段差またはスルーホール
の側壁に遮蔽されて付着点まで到達しない粒子の割合は
非常に少ない。
In other words, the height of a step due to unevenness on the surface of a conventional semiconductor device generally ranges from 0.5 p-m to 1.0 p-m.
On the other hand, the distance between the steps and the size of the through hole are 2 m to 3 m or more. Therefore, of the adhered particles that enter between the steps or towards the bottom of the through-hole, the percentage of particles that do not reach the attachment point because they are blocked by the steps around the attachment point or the side walls of the through-hole is very small. .

第2図に示したような従来の装置を用いて、第3図に示
すような溝3およびスルーホール4のような比較的間隔
の広い段差を有する半導体装置1の表面に薄膜を形成し
た場合の段差の被覆形状の断面を第4図に示す、本例で
は、付着粒子の入射角度が45°、半導体装置lの表面
と付着粒子の供給源との距1憤は8cmとした。溝3は
深さが0.5 牌m、幅が1ルm、スルーホール4は深
さが0,5牌m、幅が1ルm、奥行きl用mとした。本
例の場合は、段差上部5の膜厚とほぼ同程度の膜厚の薄
膜でl+1ff 3の底部およびスルーホール4の底部
ともに被覆されている。
When a thin film is formed on the surface of a semiconductor device 1 having relatively widely spaced steps such as grooves 3 and through holes 4 as shown in FIG. 3 using a conventional device as shown in FIG. FIG. 4 shows a cross section of the covered shape of the step. In this example, the incident angle of the adhered particles was 45°, and the distance between the surface of the semiconductor device I and the source of the adhered particles was 8 cm. The groove 3 had a depth of 0.5 m, a width of 1 m, and a through hole 4 had a depth of 0.5 m, a width of 1 m, and a depth of l m. In the case of this example, both the bottom of l+1ff 3 and the bottom of the through hole 4 are covered with a thin film having approximately the same thickness as the thickness of the upper part 5 of the step.

しかし、LSIに代表される半導体装置の高密度化およ
び微細化が進むにつれて、配線の間隔、すなわち、段差
の間隔やスルーホールの寸法が小さくなってきている。
However, as the density and miniaturization of semiconductor devices, typified by LSIs, progress, the spacing between interconnections, that is, the spacing between steps and the dimensions of through holes are becoming smaller.

これに対して、配線の厚さやスルーホールの深さは配線
抵抗の抑制、耐圧の低下の抑制、寄生抵抗の抑制の観点
からほとんど小さくすることはできない、このため、付
着粒子が主に斜めの方向(例えば45°位)から入射す
る場合、配線の間隔やスルーホールの寸法が減少するに
つれて、溝やスルーホール内部に飛来する付着粒子の内
、その側壁に遮蔽されるものの割合が多くなり、微細な
スルーホールや溝の内部、特に、底には付着しにくくな
る。この現象は、段差の間隔と深さとの比がほぼlより
小さくなると顕著になり、LSIの歩留り低下の原因の
一つとなっている。
On the other hand, the thickness of the wiring and the depth of the through-hole cannot be reduced from the viewpoint of suppressing wiring resistance, suppressing a drop in breakdown voltage, and suppressing parasitic resistance. When incident from a direction (for example, about 45 degrees), as the spacing between wiring lines and the dimensions of the through hole decrease, the proportion of adhered particles that fly into the groove or through hole that are blocked by the side walls increases. It becomes difficult to adhere to the insides of minute through-holes and grooves, especially the bottoms. This phenomenon becomes noticeable when the ratio of the interval to the depth of the steps becomes smaller than approximately 1, and is one of the causes of a decrease in the yield of LSI.

例えば、第5図に示すような従来のスパッタ薄膜形成装
置を用いて、第6図に示すように、微細な溝およびスル
ーホールのある半導体表面を薄11りで被覆する場合に
ついての薄膜形成の様子を説明する。
For example, as shown in FIG. 6, a conventional sputter thin film forming apparatus as shown in FIG. 5 is used to coat a semiconductor surface with fine grooves and through holes with a thin film. Explain the situation.

第5図において、7はターゲット、8はターゲット7を
スパッタすることにより、ターゲット7の表面に形成さ
れる侵fFl!(二ローション)領域を示し、このエロ
ージョン領域8からの付着粒子9は矢印方向で薄膜を形
成する半導体装置1の表面に入射する。ここで、基板l
の表面とターゲット7との距離は8CI11とし、付着
粒子の半導体装置1の表面への入射角度が45°となる
ようにエロージョン領域8の位置を設定しておいた。半
導体装置lの表面には、第6図に示すように、深さ0.
5pm 、幅0.5 g mの溝10、深さ0.5 p
−rn 、幅0.5gm+ 、奥行き 0.5 p−m
のスルーホール11が形−成されているものとする。
In FIG. 5, 7 is a target, and 8 is an invasion fFl! formed on the surface of the target 7 by sputtering the target 7. The attached particles 9 from this erosion region 8 enter the surface of the semiconductor device 1 on which a thin film is formed in the direction of the arrow. Here, the substrate l
The distance between the surface of the semiconductor device 1 and the target 7 was set to 8CI11, and the position of the erosion region 8 was set so that the incident angle of the attached particles to the surface of the semiconductor device 1 was 45°. As shown in FIG. 6, the surface of the semiconductor device 1 has a depth of 0.
5 pm, width 0.5 g m groove 10, depth 0.5 p
-rn, width 0.5gm+, depth 0.5p-m
It is assumed that a through hole 11 is formed.

この場合、半導体装置1の表面における薄膜の被覆形状
を断面で示すと第7図に示すようになり、段差上部12
には膜は付着しているものの、溝10およびスルーホー
ル11の底部には膜はほとんど付着していない。第4図
と第7図とを比較するとわかるように、従来の薄膜形成
装置を用いたのでは、第8図ふのようなサブミクロン 
オーダーの溝やスルーホールを切れ目なく被覆すること
は困難である。
In this case, the shape of the thin film coating on the surface of the semiconductor device 1 is shown in cross section as shown in FIG.
Although the film is attached to the bottom of the groove 10 and the through hole 11, almost no film is attached to the bottom of the groove 10 and the through hole 11. As can be seen by comparing Fig. 4 and Fig. 7, using the conventional thin film forming equipment, the submicron film as shown in Fig. 8
It is difficult to cover custom-ordered grooves and through-holes without any breaks.

また、最近、バイアススパッタ法により半導体素子やL
SI表面の凹凸を平坦化する技術が多く用いられるよう
になってきている。この方法により凹凸段差上での配線
の断線を防止することができ、LSI歩留り向上に有効
である。バイアススパッタ法は、スパッタ法で、薄膜を
形成すると同時に、t’=’j n’sを形成する成長
面側にもバイアスをかけてArイオンを垂直、に入射さ
せて、エツチングも行う方法である。バイアススパッタ
法で、前述のように平坦化か可能なのは成長面に対して
平行な被エツチング膜の面(以下、平行面と記す)に比
べて、傾斜している被エツチング面(以下、傾斜面と記
す)でのArイオンによるスパッタエツチング速度が大
きいためである0例えば、平行面での膜形成の速度とス
パッタエツチング速度が同じになるようにバイアス条件
を設定すると、傾斜面ではエツチング速度は形成速度よ
り速くなり、その結果、傾斜面は後退し、段差は平坦化
される。
In addition, recently, bias sputtering has been applied to semiconductor devices and
Techniques for flattening the unevenness of the SI surface are increasingly being used. This method can prevent wiring breakage on uneven steps and is effective in improving LSI yield. The bias sputtering method is a sputtering method in which a thin film is formed and at the same time, a bias is applied to the growth surface side where t'='j n's is formed, and Ar ions are incident perpendicularly to perform etching. be. With the bias sputtering method, as mentioned above, it is possible to flatten the surface of the film to be etched that is inclined (hereinafter referred to as the "slanted surface") compared to the surface of the film to be etched that is parallel to the growth surface (hereinafter referred to as the "parallel surface"). For example, if the bias conditions are set so that the film formation speed on a parallel surface is the same as the sputter etching speed on a parallel surface, the etching speed will be lower on an inclined surface. As a result, the slope recedes and the step is flattened.

しかし、前述したように、段差の間隔が狭くなると、底
部には膜は成長しにくくなる。一方、成長面に対してバ
イアススパッタのためにバイアスがかかっていると、A
rイオンは垂直に入射してくる。したがって、狭い段差
の底部は平行面であってもエツチングの方が大きくなり
、前述のような機構では平坦化はできない、これと同様
のことはスルーホールについてもいえる。
However, as described above, when the interval between the steps becomes narrower, it becomes difficult for a film to grow on the bottom. On the other hand, if a bias is applied to the growth surface due to bias sputtering, A
The r ions are incident perpendicularly. Therefore, even if the bottom of a narrow step is a parallel surface, the etching becomes larger and cannot be flattened by the mechanism described above.The same can be said of through holes.

以上に述べたように、段差の被覆性を考慮して付着粒子
が斜めから飛んでくるように設計された従来のスパッタ
装置や蒸着装置を用いたのでは、間隔の狭い断差や寸法
の小さいスルーホールに対しては、良好な被覆を施すこ
とができないことになる。これは、LSIの微細化およ
び高密度化が進むにつれて非常に大きい問題となりつつ
ある。
As mentioned above, when using conventional sputtering equipment or vapor deposition equipment that is designed so that the adhered particles fly diagonally in consideration of the coverage of steps, it is difficult to This means that the through holes cannot be well coated. This is becoming a very serious problem as LSIs become smaller and more dense.

[発明の目的] そこで、本発明の目的は、前述のような微細なスルーホ
ールの底部や配線等の段差により形成される溝底部にも
GFi nQを形成すると共に、段差の側壁にも均一な
薄膜を被覆することのできる薄膜形成装置を提供するこ
とにある。
[Objective of the Invention] Therefore, the object of the present invention is to form GFi nQ also on the bottom of the groove formed by the step of the wiring, etc. and the bottom of the fine through hole as described above, and to form GFi nQ evenly on the sidewall of the step. An object of the present invention is to provide a thin film forming apparatus capable of coating a thin film.

本発明の他の目的は、半導体装置表面に付着する粒子の
半導体装置表面に対する入射角度分布を最適化した薄膜
形成装置を提供することにある。
Another object of the present invention is to provide a thin film forming apparatus in which the incident angle distribution of particles adhering to the surface of a semiconductor device with respect to the surface of the semiconductor device is optimized.

[問題解決の手段] かかる目的を達成するために、本発明は、薄膜形成原料
の粒子を発生する粒子供給源を有し1粒子を、薄膜を成
長させる表面に導いて付着させて、表面に薄膜を形成す
る薄膜形成装置において、供給源からの粒子の大部分を
表面に対して少1、     なくとも第1および第2
の入射角度で入射させるように導くようになし、第1の
入射角度を第2の入射角度よりも表面の側に定め、第2
の入射角度を第1の入射角度よりも表面に対する垂直方
向の側に定めたことを特徴とする。
[Means for Solving the Problem] In order to achieve the above object, the present invention has a particle supply source that generates particles of a thin film forming raw material, and introduces and attaches one particle to a surface on which a thin film is to be grown, so that the particles are deposited on the surface. In a thin film forming apparatus that forms a thin film, most of the particles from the source are applied to the surface in a small amount, at least in the first and second portions.
The first incident angle is set closer to the surface than the second incident angle, and the second
The incident angle of the first incident angle is set to be more perpendicular to the surface than the first incident angle.

[実施例] 以下に図面を参照して本発明の詳細な説明する。[Example] The present invention will be described in detail below with reference to the drawings.

第1図は本発明の基本的構成の一例を示す、この実施例
では、ターゲット21に、付着粒子24の入射方向の分
布を与える外側の二ローション領域22を設け、これに
加えて、半導体装置1の表面に対して垂直な方向に近い
方向で付着粒子25を入射させる内側のエロージョン領
域23を外側の二ローション領域22とほぼ同心円状に
リング状に設ける。
FIG. 1 shows an example of the basic configuration of the present invention. In this embodiment, a target 21 is provided with two outer lotion regions 22 that provide a distribution in the incident direction of attached particles 24, and in addition, a semiconductor device An inner erosion region 23 into which adhered particles 25 are incident in a direction close to perpendicular to the first surface is provided in a ring shape approximately concentrically with the outer two lotion regions 22.

本例において、膜の形成中に、ターゲット21と成長面
1とを互いに平行に保ったまま、相互の位置を矢印28
および27で示すように変動させることにより、成長面
1上での付着粒子の入射角度分布のバラツキを低減させ
ることができる。         iここで、第6図
示の半導体装置の表面へ、第1図示の装置によって被覆
を行った場合の被覆形状の断面を第8図に示す、この場
合には、薄膜を形成する半導体装置1の表面とターゲッ
ト21との距離は第5図と同じ(8c+aとした。外側
のエロージョン領域22を、付着粒子24の入射角度が
45°になるように定め、内側のエロージョン領域23
を、付着粒子25の入射角度が75°となるように定め
た。第8図に示すように、溝10の底部では段差上部1
2の70%以上の膜厚、スルーホール11の底部では同
じ<60%以上の膜厚が得られており、均一な薄膜の形
成が第7図の従来例より著しく改善された。
In this example, while the target 21 and the growth surface 1 are kept parallel to each other during film formation, their mutual positions are indicated by the arrow 28.
By varying the angle as shown in and 27, variations in the incident angle distribution of the attached particles on the growth surface 1 can be reduced. i Here, FIG. 8 shows a cross section of the coating shape when the surface of the semiconductor device shown in FIG. 6 is coated with the apparatus shown in FIG. The distance between the surface and the target 21 is the same as in FIG.
was determined so that the incident angle of the attached particles 25 was 75°. As shown in FIG. 8, at the bottom of the groove 10,
A film thickness of 70% or more of 2 and a film thickness of <60% or more at the bottom of the through hole 11 were obtained, and the formation of a uniform thin film was significantly improved over the conventional example shown in FIG.

第1図の実施例の装置を用いて、ターゲット21の外側
のエロージョン領域22を入射角度が45°となるよう
に定め、内側のエロージョン領域23の位置を変えた場
合の、内側のエロージョン領域23からの付着粒子25
の入射角度と溝10またはスルーホール11の底部の膜
厚と段差上部12の膜厚との比との関係を第9図に示す
Using the apparatus of the embodiment shown in FIG. 1, the outer erosion region 22 of the target 21 is set so that the incident angle is 45°, and the inner erosion region 23 is changed in position. Adhesive particles 25 from
FIG. 9 shows the relationship between the incident angle and the ratio of the film thickness at the bottom of the groove 10 or through hole 11 to the film thickness at the top 12 of the step.

ここで、内側のエロージョン領域23からの付着粒子2
5の入射角度が高くなるほど溝lOおよびスルーホール
11の底部でのPQ厚は厚くできる9例えば、この入射
角度が456付近では粒子はスルーホール11の底部に
はほとんど付着せず、また溝lOの底部においても30
%程度である。入射角度が60゜になると、溝lOの底
部では40%、スルーホール11の底部では10%はど
粒子が付着する。更に入射角度を高くして行き、75°
にすると、溝10の底部で70%、スルーホール11の
底部で60%以上粒子が付着するようになる。
Here, the attached particles 2 from the inner erosion region 23
The higher the incident angle of the groove 10, the thicker the PQ thickness at the bottom of the through hole 11.9For example, when the incident angle is around 456, particles hardly adhere to the bottom of the through hole 11, 30 also at the bottom
It is about %. When the incident angle is 60°, 40% of the particles adhere to the bottom of the groove 1O and 10% of the particles adhere to the bottom of the through hole 11. The incident angle was further increased to 75°.
In this case, 70% of the particles will adhere to the bottom of the groove 10 and 60% or more of the particles will adhere to the bottom of the through hole 11.

なお、内側のエロージョン領域23の真下から殖れた位
置はど高い入射角度から入射してくる付着粒子の割合は
減少してくる。従って、内側の二ローション領域23の
位置は、Pj、膜を形成する半導体装置等の薄膜を成長
させる基板1の大きさと許容される溝10の底部または
スルーホール11の底部との間の膜厚のバラツキから決
定すればよい。
Note that the proportion of adhered particles that are incident from a high angle of incidence decreases at a position extending from just below the inner erosion region 23. Therefore, the position of the inner two lotion regions 23 is determined based on Pj, the size of the substrate 1 on which a thin film such as a semiconductor device is grown, and the allowable film thickness between the bottom of the groove 10 or the bottom of the through hole 11. It can be determined based on the variation in .

以上に述べた実施例では、エロージョン領域22および
23を回心円状に分布させて二重リングの形態としてい
るが、更にリングの数を増やしてもよいし、あるいはま
た、二ローション領域をリング状でなく、例えばマトリ
クス状などの形態で点状に分布させてもよい。
In the embodiment described above, the erosion regions 22 and 23 are distributed in a circular shape to form a double ring, but the number of rings may be further increased, or alternatively, the two lotion regions may be Instead of a shape, the particles may be distributed in a dotted manner, for example, in a matrix shape.

以上の実施例の場合、斜めからの入射粒子成分24と高
い角度からの入射粒子成分25がほぼl:1となるよう
にすれば、二ローション領域分布は入射角度から適当に
定めることができる。なお、ここで、1:1という割合
は必ずしも必要ではなく、この割合は、種々の条件に応
じて変えることができる。前述の実施例のように、高い
入射角度と低い入射角度から同時にほぼ同量の付着粒子
を入射させる代わりに、それぞれの方向から交互に付着
粒子を入射させてもほぼ同様の結果が得られる。その場
合、両方からの単位時間当たりの付着粒子の入射量をそ
れぞれ異ならせてもよい。その場合には、各方向からの
付着粒子の量は各方向からの入射時間で調整することが
できる。このように、前述の角度関係と入射量との関係
さえ満足されれば、上述のような入射方向および入射量
の制御は種/7の形態で行うことができる。
In the case of the above embodiment, if the ratio of the obliquely incident particle component 24 and the high angle incident particle component 25 is approximately 1:1, the two lotion area distribution can be appropriately determined from the incident angle. Note that the ratio of 1:1 is not necessarily required here, and this ratio can be changed depending on various conditions. Almost the same result can be obtained by making the adhered particles alternately incident from each direction, instead of making almost the same amount of adhered particles incident at the same time from a high incidence angle and a low incidence angle as in the above-described embodiment. In that case, the amount of incident particles per unit time from both may be made different. In that case, the amount of attached particles from each direction can be adjusted by adjusting the incident time from each direction. In this way, as long as the above-described relationship between the angle relationship and the incident amount is satisfied, the above-described control of the incident direction and incident amount can be performed in the type/7 form.

以上の実施例では、二ローション領域の分布を適切に定
めることにより入射粒子の入射角度を制御するようにし
たが、次に薄膜の成長面の前面、例えば、成長前面に適
当な遮蔽機構を設けて、入射角度を制御するようにした
本発明の実施例を第1O図および第11図に示す。なお
、木実施例は、付着粒子の供給方法には依存しないので
、スパッタデポジションだけでなく、1に着法にも適用
することができる。
In the above example, the incident angle of the incident particles was controlled by appropriately determining the distribution of the two lotion regions.Next, an appropriate shielding mechanism was provided in front of the growth surface of the thin film, e.g. An embodiment of the present invention in which the incident angle is controlled is shown in FIGS. 1O and 11. Incidentally, since the wood embodiment does not depend on the method of supplying the deposited particles, it can be applied not only to sputter deposition but also to the 1-layer deposition method.

第10図は低い角度からの入射成分が多い原料供給源に
対して好適なこの種実施例を示す、ここでは、薄膜成長
基板1の表面から適当な距ladだけ離れてターゲット
側に厚さt2の遮蔽板31を配設する。この遮蔽板31
には、間隔t3で、直径tlの貫通孔32をあけておく
。なお、これら貫通孔32はマトリクス状あるいは同心
円状に散在させたものとすることができる。あるいはま
た、貫通孔32は円形の他に、方形としてもよいし、さ
らには、同心円状のリング形状の開口、またはスリット
やストラ     、iイブ並置による形態の細長い開
口としてもよい。
FIG. 10 shows an embodiment of this kind suitable for a raw material supply source with many incident components from a low angle. A shielding plate 31 is provided. This shielding plate 31
, through holes 32 with a diameter tl are opened at intervals t3. Note that these through holes 32 can be arranged in a matrix or concentrically. Alternatively, the through hole 32 may be rectangular instead of circular, or may be a concentric ring-shaped opening, or an elongated opening formed by juxtaposing slits, struts, or ribs.

第1O図の実施例において、基板1の表面に対して垂直
な方向から入射して来る付着粒子33は基板1の成長面
に到達するが、入射角度が低い付着粒子34および35
は、遮蔽板31の厚さt2が、貫通孔32の大きさtl
に比べて大きくなればなるほど、成長面に到達する割合
か少なくなり、従って、相対的に高い角度からの入射成
分を増やすことができ、それにより、第1図示の実施例
と同様の効果か得られる。
In the embodiment shown in FIG. 1O, the attached particles 33 that are incident from a direction perpendicular to the surface of the substrate 1 reach the growth surface of the substrate 1, but the attached particles 34 and 35 whose incident angle is low
The thickness t2 of the shielding plate 31 is the size tl of the through hole 32.
The larger the angle is, the smaller the proportion reaching the growth surface, and therefore the incident component from a relatively high angle can be increased, thereby achieving the same effect as the embodiment shown in Figure 1. It will be done.

第11図は高い角度からの入射成分が多い原料供給源に
対して有効な実施例を示す、本例では、基板1の表面か
ら適当な距離dlだけ離れてターゲット側に第1の遮蔽
板41を配設し、さらにこの第1遮蔽板41から距#1
d2だげ離れてターゲット側に第2の遮蔽板42を配設
する。遮蔽板41および42には、それぞれ、間隔t4
およびt5で、直径t6およびt7の貫通孔43および
44を互い違いになるようにおから入来してくる付着粒
子45は2枚の遮蔽板415よび42によって基板1の
表面に到達するのを阻止されるが、斜めから入射してく
る付着粒子46や47は基板1の表面に入射できる。遮
蔽板41と42との距f4d2が小さいほど、また両頁
通孔43と44との間の重なり七8が大きいほど、斜め
からの入射成分46や47を相対的に増大させることが
でき、以て、第1図の実施例と同様の効果が得られる。
FIG. 11 shows an embodiment that is effective for a raw material supply source with many incident components from high angles. In this example, a first shielding plate 41 is placed on the target side at an appropriate distance dl from the surface of the substrate 1. and a distance #1 from this first shielding plate 41.
A second shielding plate 42 is disposed on the target side at a distance of d2. The shielding plates 41 and 42 each have a distance t4.
At t5, the adhered particles 45 entering the through holes 43 and 44 with diameters t6 and t7 alternately are prevented from reaching the surface of the substrate 1 by two shielding plates 415 and 42. However, the attached particles 46 and 47 that are incident obliquely can enter the surface of the substrate 1. The smaller the distance f4d2 between the shielding plates 41 and 42, and the larger the overlap 78 between the page through holes 43 and 44, the more obliquely incident components 46 and 47 can be relatively increased. Thus, the same effects as the embodiment shown in FIG. 1 can be obtained.

第10図および第11図の実施例においては、成長面、
ターゲット等の原料供給源および遮蔽板の相対的位置関
係は固定してもよいが、膜の形成中に、基板l、遮蔽板
31または41と42およびターゲットなどの原料供給
源の相対的位置関係を矢印26および27のように変動
させることもできる。このように薄膜形成中に相対位置
関係を変動させる  ゛ことにより、原料粒子が基板1
の成長面上の各位置に入射する角度の分布を平均化し、
成長面上のいずれの位置においても第8図に示したよう
な被覆形状を得ることができる。
In the embodiments of FIGS. 10 and 11, the growth surface,
Although the relative positional relationship between the raw material supply source such as the target and the shielding plate may be fixed, the relative positional relationship between the substrate l, the shielding plates 31 or 41 and 42, and the raw material supply source such as the target may be changed during film formation. can also be varied as shown by arrows 26 and 27. By varying the relative positional relationship during thin film formation in this way, the raw material particles are
Average the distribution of angles incident on each position on the growth surface of
A coating shape as shown in FIG. 8 can be obtained at any position on the growth surface.

[発明の効果] 以上説明したように、本発明によれば、微細なスルーホ
ールの内部や微細な溝の間も良好に被覆できるスパッタ
装置、蒸着装価゛などの薄膜形成装1写を提供すること
ができる。特に、本発明は、スルーホールおよび1i1
5の幅がその深さより小さくなる領域、具体的にはサブ
ミクロン領域で薄膜を切れ目なく形成することができる
というより大きい効果を発揮する。従って、サブミクロ
ンLSIの薄++q形成工程に本発明を導入することに
よって、配線の歩留り向上が従来装置を使用する場合に
比べてより多く期待できる。
[Effects of the Invention] As explained above, the present invention provides a thin film forming device such as a sputtering device and a vapor deposition device that can coat the inside of a minute through hole or between a minute groove well. can do. In particular, the present invention provides through-hole and
A greater effect is exhibited in that a thin film can be seamlessly formed in a region where the width of the film is smaller than its depth, specifically, in a submicron region. Therefore, by introducing the present invention into the thin ++q formation process of submicron LSI, it is expected that the yield of wiring will be improved more than when using conventional equipment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明薄膜形成装置の一実施例を示す線図、 第2図は従来の薄膜形成装置において、半導体装置表面
等の薄膜を成長させる面への付着粒子が斜めから入射し
ている様子を模式的に示す図。 第3図は半導体表面の溝およびスルーホールを斜め上か
ら眺めて示す斜視図、 11      第4図は第2図示の装置により第3図
に示したi          よ う 4 □えよ 
i: Wj h!  やイ寸着 、え よ 、。薄膜。 ヵ覆形状を第3図のAB線で切って示す断面図、第5図
は従来から用いられているスパッタ装置のターゲットと
薄膜成長用基板との関係を模式的に示す線図、 第6図は半導体表面のサブミクロン オーターの溝およ
びスルーホールを斜め上から眺めて示す斜視図。 第7図は第5図示の従来装置を用いて第6図の溝および
スルーホール上に薄膜を形成した場合の被覆形状を第6
図のAB線で切って示す断面図、第8図は第1図示の実
施例を用いて第6図示の半導体装置表面に薄膜を形成し
た場合の段差の被覆形状を第6図のAB線で切って示す
断面図、第9図は斜めからの入射角度を45°とした場
合の高い角度からの入射角度に対する溝またはスルーホ
ールの(底部におCする■り厚)/(段差上部における
膜厚)比の依存性を示す特性曲線図、第10図は斜めか
らの付着粒子が多い原料供給源を有する薄膜形成装置に
用いた本発明の他の実施市 例を示す断面図、 第11図は垂直方向からの付着粒子が多い原料供給源を
有する薄膜形成装置に用いた本発明の実施例を示す断面
図である。 l・・・78J膜成長用基板、例えば半導体装置、2・
・・付着粒子、 3・・・溝、 4・・・スルーホール、 5・・・段差の上部、 7・・・ターゲット、 8・・・エロージョン領域、 3・・・付着粒子、′ 10・・・l+1ff、 +1・・・スルーホール、 12・・・段差の上部、 21・・・ターゲット、 22・・・外側二ローション領域、 23・・・内側エロージョン領域、 24.25・・・付着粒子、 26.27・・・ターゲット、成長面、遮蔽板の変動を
模式的に示す矢印、 31.41.42・・・遮蔽板、 32.43.44・・・貫通孔、 33.34,35,45.4ft 、 4?・・・付着
粒子。
Figure 1 is a diagram showing an embodiment of the thin film forming apparatus of the present invention, and Figure 2 is a diagram showing a conventional thin film forming apparatus in which particles attached to a surface on which a thin film is grown, such as the surface of a semiconductor device, are incident obliquely. A diagram schematically showing the situation. Figure 3 is a perspective view showing grooves and through-holes on the semiconductor surface viewed diagonally from above.
i: Wj h! Yes, it's a perfect fit. Thin film. A cross-sectional view showing the cover shape taken along line AB in Figure 3, Figure 5 is a line diagram schematically showing the relationship between the target of a conventional sputtering device and a substrate for thin film growth, and Figure 6. is a perspective view showing submicron grooves and through-holes on the surface of a semiconductor, viewed diagonally from above. Figure 7 shows the coating shape when a thin film is formed on the grooves and through holes in Figure 6 using the conventional device shown in Figure 5.
8 is a cross-sectional view taken along line AB in the figure, and FIG. 8 is a cross-sectional view taken along line AB in FIG. The cross-sectional view shown in Figure 9 shows the relationship between (thickness at the bottom)/(film thickness at the top of the step) of the groove or through-hole for a high incident angle when the oblique incident angle is 45°. Fig. 10 is a cross-sectional view showing another example of the present invention used in a thin film forming apparatus having a raw material supply source with many obliquely attached particles; Fig. 11 FIG. 2 is a cross-sectional view showing an embodiment of the present invention used in a thin film forming apparatus having a raw material supply source with many particles adhering from the vertical direction. l...78J film growth substrate, e.g. semiconductor device, 2.
... Adhering particle, 3... Groove, 4... Through hole, 5... Upper part of step, 7... Target, 8... Erosion area, 3... Adhering particle, ' 10...・l+1ff, +1...Through hole, 12...Top of step, 21...Target, 22...Outer two lotion areas, 23...Inner erosion area, 24.25...Adhesive particles, 26.27...Arrows schematically showing variations in the target, growth surface, and shielding plate, 31.41.42...Shielding plate, 32.43.44...Through hole, 33.34,35, 45.4ft, 4? ... Adhesive particles.

Claims (1)

【特許請求の範囲】 1)薄膜形成原料の粒子を発生する粒子供給源を有し、
前記粒子を、薄膜を成長させる表面に導いて付着させて
、前記表面に薄膜を形成する薄膜形成装置において、前
記供給源からの粒子の大部分を前記表面に対して少なく
とも第1および第2の入射角度で入射させるように導く
ようになし、前記第1の入射角度を前記第2の入射角度
よりも前記表面の側に定め、前記第2の入射角度を前記
第1の入射角度よりも前記表面に対する垂直方向の側に
定めたことを特徴とする薄膜形成装置。 2)特許請求の範囲第1項記載の薄膜形成装置において
、前記第1の入射角度は約45°、前記第2の入射角度
は60°〜90°であることを特徴とする薄膜形成装置
。 3)特許請求の範囲第1項または第2項に記載の薄膜形
成装置において、前記供給源は前記薄膜形成原料により
形成したターゲットを有し、該ターゲットをスパッタす
ることにより前記粒子を発生させ、そのスパッタリング
により前記ターゲットの表面に複数の侵蝕領域を形成し
、該侵蝕領域を、その発生粒子が前記表面に対して少く
とも前記第1および第2の入射角度で入射するように分
布させたことを特徴とする薄膜形成装置。 4)特許請求の範囲第1項ないし第3項のいずれかの項
に記載の薄膜形成装置において、薄膜形成中に、前記表
面と前記粒子供給源との相対的位置関係を互いに平行な
方向に連続的に変動させて、前記表面に入射する粒子の
入射角度を変動させるようにしたことを特徴とする薄膜
形成装置。 5)特許請求の範囲第1項または第2項に記載の薄膜形
成装置において、前記粒子供給源と前記表面との間に、
前記粒子を通過させる複数の貫通孔を有する遮蔽板を配
設したことを特徴とする薄膜形成装置。 6)特許請求の範囲第5項記載の薄膜形成装置において
、前記遮蔽板を前記表面に対して平行に複数枚配置し、
各遮蔽板の貫通孔が互い違いに配置されるようにしたこ
とを特徴とする薄膜形成装置。 7)特許請求の範囲第5項または第6項に記載の薄膜形
成装置において、前記粒子供給源、前記遮蔽板および前
記表面の相対的位置関係を互いに平行な方向に連続的に
変動させて、前記表面に入射する粒子の入射角度を変動
させるようにしたことを特徴とする薄膜形成装置。
[Claims] 1) having a particle supply source that generates particles of a thin film forming raw material;
In a thin film forming apparatus for introducing and depositing the particles onto a surface on which a thin film is to be grown to form a thin film on the surface, a majority of the particles from the source are directed to at least a first and a second layer on the surface. the first incident angle is set closer to the surface than the second incident angle, and the second incident angle is set closer to the surface than the first incident angle. A thin film forming apparatus characterized in that the film is formed on a side perpendicular to a surface. 2) The thin film forming apparatus according to claim 1, wherein the first incident angle is approximately 45 degrees and the second incident angle is between 60 degrees and 90 degrees. 3) In the thin film forming apparatus according to claim 1 or 2, the supply source has a target formed from the thin film forming raw material, and the particles are generated by sputtering the target; A plurality of eroded regions are formed on the surface of the target by the sputtering, and the eroded regions are distributed such that the generated particles are incident on the surface at least at the first and second incident angles. A thin film forming device featuring: 4) In the thin film forming apparatus according to any one of claims 1 to 3, the relative positional relationship between the surface and the particle supply source is made parallel to each other during thin film formation. A thin film forming apparatus characterized in that the incident angle of particles incident on the surface is varied by continuously changing the incident angle. 5) In the thin film forming apparatus according to claim 1 or 2, between the particle supply source and the surface,
A thin film forming apparatus comprising a shielding plate having a plurality of through holes through which the particles pass. 6) In the thin film forming apparatus according to claim 5, a plurality of the shielding plates are arranged parallel to the surface,
A thin film forming apparatus characterized in that the through holes of each shielding plate are arranged alternately. 7) In the thin film forming apparatus according to claim 5 or 6, the relative positional relationship of the particle supply source, the shielding plate, and the surface is continuously varied in directions parallel to each other, A thin film forming apparatus characterized in that the incident angle of particles incident on the surface is varied.
JP59175080A 1984-08-24 1984-08-24 Semiconductor thin film forming method Expired - Lifetime JPH0652713B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59175080A JPH0652713B2 (en) 1984-08-24 1984-08-24 Semiconductor thin film forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59175080A JPH0652713B2 (en) 1984-08-24 1984-08-24 Semiconductor thin film forming method

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JPS6153717A true JPS6153717A (en) 1986-03-17
JPH0652713B2 JPH0652713B2 (en) 1994-07-06

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6299461A (en) * 1985-10-25 1987-05-08 Hitachi Ltd Thin film forming device
JPS62199768A (en) * 1986-02-27 1987-09-03 Agency Of Ind Science & Technol Thin film forming device
JPH0492548U (en) * 1990-12-27 1992-08-12
JPH0741943A (en) * 1993-07-27 1995-02-10 Nec Corp Sputtering device
JP2016089224A (en) * 2014-11-05 2016-05-23 株式会社東芝 Processing apparatus and collimator
JP6039117B1 (en) * 2016-01-25 2016-12-07 株式会社東芝 Processing device and collimator

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5552672U (en) * 1978-09-30 1980-04-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5552672U (en) * 1978-09-30 1980-04-08

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6299461A (en) * 1985-10-25 1987-05-08 Hitachi Ltd Thin film forming device
JPS62199768A (en) * 1986-02-27 1987-09-03 Agency Of Ind Science & Technol Thin film forming device
JPH0492548U (en) * 1990-12-27 1992-08-12
JPH0741943A (en) * 1993-07-27 1995-02-10 Nec Corp Sputtering device
JP2016089224A (en) * 2014-11-05 2016-05-23 株式会社東芝 Processing apparatus and collimator
US10147589B2 (en) 2014-11-05 2018-12-04 Kabushiki Kaisha Toshiba Processing apparatus and collimator
US10755904B2 (en) 2014-11-05 2020-08-25 Kabushiki Kaisha Toshiba Processing apparatus and collimator
JP6039117B1 (en) * 2016-01-25 2016-12-07 株式会社東芝 Processing device and collimator
JP2017133047A (en) * 2016-01-25 2017-08-03 株式会社東芝 Processing apparatus and collimator

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