JPS61274440A - Eliminating circuit for cross polarized wave interference - Google Patents

Abstract

PURPOSE:To improve the eliminating action of a cross polarized wave interference signal by performing a subtraction process action by the coupled output of the second receiving signal outputted from a variable coupled circuit against the first receiving signal and providing a subtraction circuit which outputs a prescribed corrected receiving signal and sends out it to the first demodulator. CONSTITUTION:The cross polarized wave interference signal from a vertically polarized wave route is intervened in the receiving signal of a horizontally polarized wave route and at a subtraction circuit 1, a subtraction process is executed by the receiving signal of the vertically polarized wave route which is inputted through a variable coupled circuit 2 with being controlled by a control signal ec sent from a control signal generating circuit 5 so that the tolerance polarized wave interference signal is eliminated. The corrected receiving signal which is outputted from a subtraction circuit 1 and includes the receiving signal of a horizontally polarized wave and an error signal generated by the subtraction process is inputted to and demodulated at a demodulator 8. On the other hand, the receiving signal of the vertically polarized wave route inputted from a terminal 52 is sent to the subtraction circuit 1 through the variable coupled circuit 2 and also, is inputted to and demodulated at a demodulator 9 and data signals DP(v) and DQ(v) are outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a cross-polarization interference removal circuit, and in particular, in a digital wireless communication system using two orthogonal waves. This invention relates to improvements in cross-polarization interference removal circuits used to remove interference waves.

[Conventional technology]

Conventionally, in digital wireless communication systems that use two mutually orthogonal polarized waves with the intention of making effective use of frequencies,
As a means for removing the cross-polarization interference that occurs between the two side waves due to the anisotropy of the medium in the radio wave propagation path, a cross-polarization interference removal circuit shown in FIG. 3 is used as an example. There are n. This conventional example is an example of a cross-polarization interference removal circuit when applying cross-polarization interference to horizontally polarized and vertically polarized received signals input from terminals 55 and 56, respectively. As shown in the figure, the cross-polarization interference removal circuit 24 includes a subtraction circuit 19 and a variable coupling circuit 2.
0 and a control signal generation circuit 23 including an integrator 21 and a correlator 22.

In FIG. 3, under the control of the control signal ec input from the control signal generation circuit 23, in the variable coupling circuit 20, the received signal of the vertical polarization route input from the terminal 56 is controlled to a predetermined coupling amount. Adjusted subtraction circuit 19
sent to. Needless to say, the received signal on the vertical polarization route is simultaneously sent to the demodulator 26 and demodulated, and the data signal Dp('v) is output. In the subtraction circuit 19, subtraction processing is performed using the received signal of the vertical polarization route sent from the variable coupling circuit 20 with respect to the received signal of the horizontal polarization route inputted via the terminal -F55, and its output is The signal is sent to demodulator 25. Due to the subtraction processing effect in the subtraction circuit 19, the cross-polarization interference signal caused by the vertical polarization with respect to the horizontal polarization is attenuated, and the output signal of the above-mentioned subtraction circuit 19 includes the horizontal polarization reception signal and the cross-polarization interference signal. The residual error signal of the signal coexists. In the demodulator 25, the horizontally polarized received signal and the residual error signal of the cross-polarized interference signal are demodulated into data signals Dp(H
) and Dq(Ml, error signals Ep(H) and Eq(
It is output as Ml.

The error signal BF (Hl and EqTH) is sent to the correlator 22, but the correlator 22 receives the data signal D from the demodulator 26.
p(v) and DQ(Vl are also sent, and data signals DP(V) and DQ(Vl) and error signal Ep( Correlation processing is performed between l() and EQ(H), and its output is passed through an integrator 21 to a control signal ec
The signal is sent to the variable coupling circuit 20 as a signal. Variable coupling circuit 2
The effect of 0 has already been described above. Through this type of feedback, the vertically polarized cross-polarization interference signal intervening in the horizontally polarized received signal is removed, and the algorithm is well known as the maximum slope method.
The details are described in, for example, Japanese Patent Application No. 54-24764, Japanese Patent Application No. 54-24765, Japanese Patent Application No. 54-24768, and Japanese Patent Application No. 54-76542, and will therefore be omitted. In FIG. 3, the clock signal input to the correlator 22 is the clock signal t (Ml) output from the demodulator 25 corresponding to horizontal polarization in this conventional example; As the signal, a clock signal output from the demodulator 26 corresponding to vertical polarization is also used.

[Problem that the invention seeks to solve]

In the above-mentioned conventional cross-polarization interference cancellation circuit, as described above, the control signal e for canceling the cross-polarization interference signal is
In the control signal generation circuit 23 that generates the horizontal polarization route error signal EP()(+ and Eq(vl),
Vertical polarization route data signals DP(v) and DQ(H
), the correlator 22 uses relatively low-speed information extraction means (for example, clip/flocker is used to extract information related to the above-mentioned error signal and data signal.

However, in general, the information extraction means in the correlator z2 is In,
Impossibility of simultaneously extracting the information of the six error signals EP (Ml and Eq(H) and data signals Dpm and Dq(V) in a predetermined time slot via the clock signal t(H)) An uncertain time width always exists in relation to the existence of data transition points.In order to properly remove cross-polarization interference signals, it is necessary to reduce this uncertain time width as much as possible and control it. It is necessary to further normalize the control signal ec output from the signal generation circuit 23, but in the conventional cross-polarization interference removal circuit, as described above, both information extraction in the correlator 22 is relatively slow. Since this is performed by slow means, there is a limit to compressing the uncertain time width set stochastically, and there is a problem that there is a potential deterioration factor for the cross-polarization interference removal effect. Note that FIGS. 4(a) and 4(b) are conceptual diagrams showing the correspondence between data transition points and uncertain time widths in information where the length of 1 bit is T (nanoseconds). In the case of the above-mentioned conventional cross-polarization interference cancellation circuit, as shown in FIG. 4(b), the uncertainty time width is 2 (
ΔT'), which occupies a relatively long time portion with respect to the bit length T, and is the cause of the above-mentioned problem.

[Failure to solve the problem]

In order to solve the above-mentioned problems, the cross-polarization interference circuit of the present invention has two reception systems, the first and second, corresponding to two mutually orthogonal polarizations. In a digital wireless communication system having a demodulation system, from a second demodulator in the second reception demodulation system via a first clock signal output from a first demodulator in the first reception demodulation system. a high-speed flip-flop circuit that extracts the output second demodulated signal at high speed; a specific error signal output from the first demodulator; a control signal generation circuit that generates and outputs a predetermined coupler control signal through correlation processing between the second demodulated signal extraction output and the second received signal in the second receiving demodulation system; a variable coupling circuit that controls and adjusts a coupling amount of a second received signal using the coupler control signal and outputs the second received signal in order to couple it to the first received signal in the first reception demodulation system; The demodulator is provided at the front stage of the demodulator, and performs a subtraction processing operation on the first received signal by the combined output of the second received signal outputted from the variable coupling circuit, and outputs a predetermined modified received signal. and a subtraction circuit for sending data to the first demodulator.

Further, in the second invention of the cross-polarization interference canceling circuit of the present invention, a digital wireless communication system having two reception demodulation systems, first and '4c2, corresponding to two mutually orthogonal polarizations is provided. A specific error signal output from the first demodulator in the first reception demodulation system is transmitted via a second clock signal output from the second demodulator in the second reception demodulation system. Correlation between a high-speed flip-flop circuit that extracts at a high speed, a second demodulated signal output from the second demodulator, and a specific error signal extraction output output from the high-speed flip-flop circuit. A control signal generation circuit that generates and outputs a predetermined coupler control signal through a processing action, and a control signal generation circuit that generates and outputs a predetermined coupler control signal;
a variable coupling circuit that controls and adjusts the coupling amount of the second received signal using the coupler control signal and outputs the second received signal in order to couple it to the received signal of the first demodulator;
A subtraction process is performed on the first received signal by the combined output of the second received signal output from the variable coupling circuit, and a predetermined modified received signal is output and selected as the first demodulator. It is equipped with a circuit.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing the main parts of an embodiment of the first aspect of the present invention. As shown in FIG. 1, the cross-polarization interference cancellation circuit 7 of the present invention includes a demodulator 8 of the reception demodulation system for the related horizontal polarization route, and a demodulator 9 of the reception demodulation system for the vertical polarization route. Corresponding to this, the control signal generation circuit 5 includes a subtraction circuit 1, a variable coupling circuit 2, an integrator 3 and a correlator 4, and a high-speed flip/70 tube circuit 6. Note that the cross-polarization interference removal circuit 7 shown in FIG. However, even when a cross-polarization interference signal from the horizontal polarization route intervenes in the received signal of the reception demodulation system of the vertical polarization route, a cross-polarization interference removal circuit can be configured in the same way. Needless to say.

In FIG. 1, from terminals 51 and 52, n
A received signal on the horizontal polarization route and a received signal on the vertical polarization route are input. In this case, as mentioned above, the cross-polarization interference signal from the vertical polarization route intervenes in the received signal of the horizontal polarization route and the received signal of the vertical polarization route, and the subtraction circuit 1, the vertically polarized wave input via the variable coupling circuit 2 is controlled by the control signal ec sent from the control signal generating circuit 5 so that the cross-polarized interference signal is removed. Subtraction processing is performed using the root received signal. The corrected received signal output from the subtraction circuit 1 and including the horizontally polarized received signal and the error signal generated by the subtraction process is input to the demodulator 8 and demodulated to generate data signals Dp(H) and DQ. (Hl and error signal IP
(H) and IQ(H) are output.

On the other hand, the received signal of the vertical polarization route inputted from the terminal 52 is sent to the subtraction circuit 1 via the variable coupling circuit 2 as described above.
It is sent to the demodulator 9 and demodulated,
Data signals DPm and Dq(Vl) are outputted. These data signals Dp(v) and DQ(Vl) are outputted as data signals and inputted to the high-speed flip-flop circuit 6.

In the high-speed flip-flop circuit 6, the vertical polarization route data signals DP(v) and Dq(V) sent from the demodulator 9 are processed via the clock signal t(H) input from the demodulator 8. The signals are extracted at high speed in predetermined time slots and sent to the correlator 4. The main point of the present invention is that in this embodiment, the data signal DPff) and DQ(
Vl is extracted and sent to the correlator 4, and in the correlator 4,
Error signal Ep (H) and EQ input from demodulator 8
(H). The high-speed information extraction action by the high-speed flip-flop circuit 6 relatively compresses the aforementioned uncertain time width in information extraction related to the existence of data transition points in the data signal. The reason for this is that high-speed information extraction allows information to be extracted temporally effectively even in the vicinity of data transition points, increasing the probability of the degree of information extraction within the time T corresponding to one bit. What is shown in FIG. 4(a) is a conceptual diagram showing the correspondence between data transition points and uncertain time widths in the present invention.
) is significantly reduced compared to the uncertainty time width 2 (ΔT') in the conventional cross-polarization interference removal circuit shown in FIG. 4).

In the correlator 4, error signals EP (■) and EQ (H) are sent via the clock signal t (H) sent from the demodulator 8, and data extracted via the high-speed flip-flop circuit 6. Correlation processing with the signals I)p(v) and DQ(V) is performed, and the variable coupling circuit 2
A control signal eJ'' is generated for the control signal eJ''.The functions of the variable coupling circuit 2, subtraction circuit 1, etc. are as described above.

Next, the second invention of the present invention will be explained.

FIG. 2 is a block diagram showing the main parts of an embodiment of the second invention. As shown in FIG. 2, the cross-polarization interference cancellation circuit 16 of the present invention includes a demodulator 17 of the reception demodulation system for the related horizontal polarization route, and a demodulator 18 of the reception demodulation system for the vertical polarization route. Corresponding to this, a subtraction circuit 10, a variable coupling circuit 11, a control signal generation circuit 14 including an integrator 12 and a correlator 13, and a high-speed flip-flop circuit 15 are provided. In the case of this embodiment, as in the case of the embodiment of the first invention described above, the cross-polarization interference signal from the vertical polarization route intervenes in the received signal of the reception demodulation system of the horizontal polarization route. This is a configuration example in case.

In FIG. 2, terminals 53 and 54 input a horizontally polarized route received signal and a vertically polarized route received signal, respectively. □The difference from the embodiment of the first invention shown in FIG.
and IQ(H) via the clock signal tCn output from the demodulator 18 of the reception demodulation system of the vertical polarization route,
The data signals DPm and Dq (Vl) extracted at high speed in the high-speed flip-flop circuit 15 and outputted from the demodulator 18 are correlated with the data signals DPm and Dq (Vl) in the correlator 13. That is, the high-speed 7 flip-flop circuit In the case of the first invention, the targets of high-speed information extraction of the circuit are the data signals Dp (v) and Dq (V) output from the demodulator 9 of the vertical polarization route reception demodulation system, and In the case of the second invention, the demodulator 1 of the horizontal polarization route reception demodulation system
Error signals EP(H) and &q(H>
It is to be. Further, in the case of the first invention, the clock signal input to the high-speed 7-rig flop circuit is the clock signal t()i) output from the demodulator 8 of the reception demodulation system of the horizontal polarization route, Another difference between the first and second inventions is that in the case of the second invention, the clock signal tm is output from the demodulator 18 of the vertically polarized wave route reception demodulation system. Other operations are the same for both inventions, and in FIG. The received signal of the vertical polarization route is input to the subtraction circuit 10 via the subtraction circuit 10, and subtraction processing is performed in the subtraction circuit 10. Subtraction circuit 10° demodulator 17, high-speed flip/70 tube circuit 15, control signal generation circuit 14, and variable coupling circuit 1
As in the case of the first invention, the cross-polarization interference signal intervening in the received signal of the horizontal polarization route is removed by the feedback form formed by 1.

In the case of this second invention, the error signals Epoo and Kq (Hl) output from the demodulator 17 are extracted at high speed in the high-speed 7-lip-flop circuit 15 and input to the correlator 13. As in the case of the first invention, as shown in FIG. 4(a), the uncertainty time width 2 (ΔT) around the data transition point is significantly reduced compared to the case of the conventional example. As a result, the probability of the degree of information extraction within the time T corresponding to one bit is increased, the control signal ec is more normalized, and the function of cross-polarization interference cancellation is improved.

In addition, in the description of the above first and second inventions,
Although the operation has been described in the case where a cross-polarized interference signal intervenes from the vertically polarized route into the horizontally polarized route, the scope of application of the present invention is not limited to the above case; This method also applies to cases where a cross-polarized interference signal intervenes in the horizontal harmonic route, and when a cross-polarized interference signal intervenes in other mutually corresponding polarization routes from both polarization routes. It goes without saying that the invention can be applied.

〔Effect of the invention〕

As described in detail above, the present invention is applied to a cross-polarization interference removal circuit for a digital wireless communication system using two orthogonal waves, and is related to correlation processing in a control signal generation circuit including a correlator. By increasing the speed of information extraction, the uncertainty time width corresponding to the vicinity of the data displacement point is reduced, and the effect of eliminating cross-polarization interference signals is improved.

[Brief explanation of drawings]

1 and 2 are block diagrams showing the main parts of each embodiment in the first and second aspects of the present invention, respectively, and FIG. 3 is an example of a conventional cross-polarization interference removal circuit. FIG. 4 is a block diagram showing the main parts and a conceptual diagram showing the correspondence between data transition points and uncertain time widths. In the figure, 1, 10.19...subtraction circuit, 2
, 11゜20...--Variable coupling circuit, 3, 12.2
1...Integrator, 4, 13, 21...
・Integrator, 5, 14.23... Control signal generation circuit, 6.15... High speed 7 rip/70 tube circuit, 7, 16.24... Cross deviation wave interference removal circuit,
8゜9.17, 18, 25, 26. ...Demodulator.・′、・Kamiji's agent Patent attorney Susumu Uchihara ゛1Figure 3Figure 4

Claims (2)

[Claims] (1) In a digital wireless communication system having two reception demodulation systems, a first and a second, corresponding to two mutually orthogonal polarized waves, from a first demodulator in the first reception demodulation system. a high-speed flip-flop circuit that extracts at high speed a second demodulated signal outputted from a second demodulator in the second reception demodulation system via an outputted first clock signal; A predetermined combiner control signal is generated through a correlation processing operation between a specific error signal output from the demodulator and a second demodulated signal extraction output output from the high-speed flip-flop circuit. a control signal generating circuit that outputs a control signal using the combiner control signal to couple a second received signal in the second reception demodulation system to a first reception signal in the first reception demodulation system; a variable coupling circuit that controls and adjusts the amount of coupling of a second received signal and outputs the resultant signal; 1. A cross-polarization interference removal circuit comprising: a subtraction circuit that performs a subtraction process using a combined output of two received signals, outputs a predetermined corrected received signal, and sends it to a first demodulator. (2) In a digital wireless communication system having two reception demodulation systems, a first and a second, corresponding to two mutually orthogonal polarized waves, from a second demodulator in the second reception demodulation system. a high-speed flip-flop circuit that extracts at high speed a specific error signal output from a first demodulator in the first reception demodulation system via a second output clock signal; A predetermined combined control signal is generated and outputted through a correlation processing operation between the second demodulated signal outputted from the demodulator and the specific error signal extraction output outputted from the high-speed flip-flop circuit. a control signal generation circuit that uses the combined control signal to combine a second received signal in the second reception demodulation system with a first reception signal in the first reception demodulation system; a variable coupling circuit that controls and adjusts the coupling amount of the received signal and outputs the signal; and a second receiving circuit that is provided before the first demodulator and outputs from the variable coupling circuit with respect to the first received signal. 1. A cross-polarization interference removal circuit comprising: a subtraction circuit that performs a subtraction process using a combined output of signals and outputs a predetermined modified received signal and sends it to a first demodulator.