JPS61267408A - Display device - Google Patents

Abstract

PURPOSE:To inform quickly and surely the occurrence of a fault to the user by providing a memory, a signal processing circuit and a display means displaying a fault and displaying a fault immediately if a data transferred between the memory and the signal processing circuit has an error. CONSTITUTION:When the end key 'ENTER' is keyed in, the signal processing circuit 14 starts the program, reads a frequency data from a memory area of a nonvolatile memory 24 corresponding a channel data inputted by a ten-key and discriminates whether or not the frequency data is coincident with a collation data stored in a collation data register 25. When the affirmative result is obtained, the signal processing circuit 14 discriminates it as the presence of an error in the frequency data (that is, an error takes place in the nonvolatile memory 24 sending the frequency data) and displays an IC (integrated circuit) number representing the nonvolatile memory 24, e.g., 'IC701'.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to display devices, such as DBS (direCt
-broadcast 5atellite) In devices such as receivers, it can be applied to devices that display abnormalities in memory and its peripheral elements.

B Summary of the Invention The present invention provides a display device for electronic equipment or electrical equipment that transfers data between a memory and a signal processing circuit, in which data read from the memory or data written to the memory is collation data for abnormality detection. By displaying an abnormality when there is a match, the user can quickly recognize the occurrence of an abnormality and take prompt measures.

C Conventional technology With DBS broadcasting, receivers scattered over a wide area can directly receive broadcast waves arriving from artificial satellites using small parabolic antennas. It is being considered that the system could be used as a means of transmitting information from the center to each branch via receivers installed at branches scattered throughout the region. In this case, the user can specify any frequency included in the available broadcast band and preset a channel on which information can be transmitted, thus transmitting multiple pieces of information simultaneously using multiple channels. , utilization efficiency can be increased.

Problem to be Solved by the Invention By the way, in order to preset the frequency of each channel, a channel frequency memory having a memory area for storing the frequency of each channel is prepared in advance in the receiver, and for example, a numeric keypad is used. The frequency assigned to each channel is stored as tuning data (hereinafter referred to as frequency data) in a channel frequency memory.

Therefore, when selecting a channel, the frequency data of the channel specified by the numeric keypad is successively outputted from the channel frequency memory, thereby making it possible to select the channel.

However, the frequency data read out from the memory in this way may become abnormal.

For example, this may occur if the memory is destroyed, if the power supply voltage supplied to the memory becomes abnormal, or if noise is mixed in when frequency data is transferred to or from the memory.

Even if the frequency data becomes abnormal in this way, in the case of general television broadcasting and underground geo broadcasting, the frequency difference between adjacent channels is set at a predetermined interval, so it is difficult to read the frequency data of other channels. However, in the case of DBS broadcasting, the frequency of each channel is determined randomly, so if the frequency data becomes abnormal, it will no longer be possible to activate the channel selection operation, and the receiver will go down. state. Therefore, in this case, it is desirable to promptly notify the user of the abnormality.

In particular, in DBS broadcasting, the broadcast band is rented, so it is rare for the same information to be transmitted repeatedly. Therefore, it is desirable to keep the situation in which reception is not possible for as short a time as possible. It is desirable to display the error immediately and to quickly restore normality.

The present invention has been made in consideration of the above points, and when an abnormality occurs in data accessed to memory,
The purpose is to provide a display device that can display images.

E Means for Solving Problems In order to solve these problems, the present invention provides a memory 24 in which data can be freely read and written;
A signal processing circuit 14 that controls the reading and writing operations of the memory 24 and has collation data for abnormality detection, and a signal processing circuit 14 that controls reading and writing operations of the memory 24 and has reference data for abnormality detection; Display means (22, 23) are provided for displaying an abnormality based on a command from the signal processing circuit 14 when the data match the verification data.

The F effect signal processing circuit 14 turns on the verification data for abnormality detection, and determines whether the data to be written into the memory 24 or the data successively output from the memory 24 matches the verification data;
If they match, the display means (22, 23) are operated to display the abnormality.

As a result, the user can quickly and reliably recognize abnormal pressure generation and can take prompt measures.

Embodiment G An embodiment in which the present invention is applied to a DBS receiver will be described in detail below with reference to the drawings. In FIG. 1, broadcast waves received by an antenna 11 are supplied to an information reproducing circuit 13 of a broadcast wave receiver 12, and the information reproducing circuit 13 selects a channel corresponding to a channel selection signal S1 given from a channel selection circuit 15. Receive broadcast waves.

The channel selection circuit 15 is controlled by a channel selection signal S2 generated in a signal processing circuit 14 having a microcomputer configuration, for example, and sends out a channel selection signal S1 corresponding to the channel selection command signal S2.

As shown in FIG. 4, the signal processing circuit 14 has signals from "O" to "
A numeric keypad with a ``9'' key and an end key rENTERJ
A key matrix 21 including an input device 1 having a preset mode specifying key "5TOREJ" is connected, and when each key of the key matrix 21 is selectively operated, corresponding data is provided to the signal processing circuit 14. It will be done.

In this embodiment, the signal processing circuit 14 executes the preset operation when data corresponding to the preset mode designation key rsTOREJ is given.

When presetting the channel number, press the end key rE after the numeric keypad is operated several times (for example, 111i1U or twice)
When NTERJ is operated, the signal processing circuit 14 outputs a 3-bit command line L connected to the non-volatile generation memory 24.
1 to L3 are given an address designation mode command signal COM, and the address data corresponding to the numeric keypad is sent through the data line L5 in synchronization with the transfer clock CLK given to the memory 24 via the clock line L4.
give. This specifies the memory area in which the frequency data will be stored.

Further, when presetting the frequency numerical value, when the end key "ENTERJ" is operated after the numeric keypad has been operated several times (for example, 5 times), the signal processing circuit 14 outputs the command signal C.
While setting the OM to write mode, the frequency data is sent to the memory 2 through the data line L5 in synchronization with the transfer clock.
Give to 4.

In the case of this embodiment, when the end key rENTERJ is pressed immediately after the numeric keypad is pressed several times (for example, 1.2 times), the signal processing circuit 14 selects the channel corresponding to the numeric keystroke manually. Determine that the mode has been specified. At this time, the signal processing circuit 14 first sets the command signal COM to an address specification mode, gives address data corresponding to the manual input of the numeric keypad to the memory 24 to designate a predetermined memory area, and then sets the command signal COM to a read mode to the memory 24. The frequency data stored in the area is taken out, and a channel selection command signal S2 based on this data is given to the broadcast wave receiving section 12 to cause it to select a channel.

Further, when numerical data is entered one digit at a time using the numeric keypad as described above, the signal processing circuit 14 operates the character generating means 22 based on the data taken in one digit at a time, and selects a predetermined digit, for example, five digits. Characters corresponding to the input data are displayed on the data display 23.

Furthermore, the signal processing circuit 14 also includes a verification data register 2.
5 is built-in, and by storing verification data in the verification data register 25 and comparing this verification data with frequency data, an abnormality in the memory 24 or the signal processing circuit 14 itself is detected. Here, as verification data, frequency data changes when the memory 24 is destroyed, when the power supply voltage becomes abnormal, or when noise enters the command lines L1 to L3, the data line 5, etc. The logical levels that can be taken are many, that is, all
0'' and all 1's can be used.

In the above configuration, the signal processing circuit 14 executes abnormality detection and abnormality display processing in the channel selection mode according to the processing procedure shown in FIG.

That is, after pressing the numeric keypad several times, the end key rE
When NTERJ is input, it is determined that the channel selection mode has been designated, and the program is started in step SPI, and the process moves to the next step SP2, where the non-volatile generation memory 24 corresponding to the channel data entered manually using the numeric keypad is stored.
Read frequency data from the memory area.

Thereafter, the signal processing circuit 14 moves to step SP3 and determines whether the read frequency data matches the verification data stored in the verification data register 25.

If a negative result is obtained in this step SP3,
Assuming that there is no abnormality in the read frequency data (i.e.
Assuming that there is no abnormality in the non-volatile generation memory 24), the abnormality detection and abnormality display processing program is ended in step SP5.

On the other hand, if a positive result is obtained in step SP3, the signal processing circuit 14 determines that there is an abnormality in the frequency data (that is, the non-volatile generation memory 2 that sent the frequency data
Since the system identifies the circuit element that is likely to have caused the abnormality (4) and performs signal processing, it is possible for the user to take appropriate measures in order to be able to recover quickly. In addition, the input device
In the above description, the display device of the present invention is referred to as a DB-n.

Although we have described an example in which it is applied to an S receiver,
1...The scope of use is not limited to this, but can be widely applied to memory and signal processing circuits...electronic equipment and electrical equipment that transfer data. 3.

25...
・Effects of the H invention As described above, according to the present invention, if there is an abnormality in the data transferred between the memory and the signal processing circuit, it is immediately displayed, thereby reliably and quickly notifying the user of the occurrence of the abnormality. be able to. In this way, the user can quickly take measures against the abnormality.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the display device according to the present invention, FIGS. 2 and 3 are flowcharts showing the procedure of one circuit in the channel selection mode and in the preset mode, respectively, and FIG. Figure 5 is a route map showing abnormality indications. ... Input device, 12 ... Broadcast wave receiving section, No. 14 processing circuit, 21 ... Key matrix, 2-meter display, 24 ... Misfortune occurrence memory, ...Verification data register.

Claims (1)

[Scope of Claims] A memory in which data can be freely read and written; a signal processing circuit that controls reading and writing operations of the memory and has collation data for abnormality detection; A display means for displaying an abnormality based on a command from the signal processing circuit when read data or data written into the memory from the signal processing circuit matches the verification data. display device.