JPS603189A - Method of connecting lead wire - Google Patents
Method of connecting lead wireInfo
- Publication number
- JPS603189A JPS603189A JP58111245A JP11124583A JPS603189A JP S603189 A JPS603189 A JP S603189A JP 58111245 A JP58111245 A JP 58111245A JP 11124583 A JP11124583 A JP 11124583A JP S603189 A JPS603189 A JP S603189A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- thin
- aluminum
- electrode body
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05082—Two-layer arrangements
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48491—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/85424—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、アルミニウム細線全部品接続に合理的に利用
できるようにした混成集積回路等のリード線の接続方法
に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for connecting lead wires of hybrid integrated circuits, etc., which can be rationally used to connect all components using thin aluminum wires.
従来例の構成とその問題点
混成集積回路においては半導体チップと基板導電路を電
気的に接続するのに一般的に金細線あるいはアルミニウ
ム細線が用いられてきているが、経済的な観点からもア
ルミニウム細線を用いる方向が強く志向されてきている
。Conventional configurations and their problems In hybrid integrated circuits, thin gold wires or thin aluminum wires are generally used to electrically connect semiconductor chips and conductive paths on the substrate. There is a strong trend toward using thin wires.
以下に従来の混成集積回路におけるアルミニウム細線の
接続方法について説明する。第１図は従来の混成集積回
路において用いられている接続後の状態図であり、１は
絶縁基板あるいは絶縁層、２はその絶縁層上に設けられ
た導電路である。A method of connecting thin aluminum wires in a conventional hybrid integrated circuit will be described below. FIG. 1 is a state diagram after connection used in a conventional hybrid integrated circuit, where 1 is an insulating substrate or an insulating layer, and 2 is a conductive path provided on the insulating layer.
この導電路２は銅箔あるいは銀ペーストなと全焼成して
設けられている。この導電路２上にアルミニウム細線３
を超音波振動法によって直接接続することは銅箔表面層
の酸化その他の理由により不可能であり、そのため従来
の混成集積回路においては、導電路２上のアルミニウム
細線接続部分に第１図の４に示すごとくニッケルメッキ
層、あるいはアルミニウム金属薄層を形成し、そこにア
ルミニウム細線３を超音波振動法によ−・で接続する方
法がとられていた。This conductive path 2 is provided by completely firing copper foil or silver paste. A thin aluminum wire 3 is placed on this conductive path 2.
It is impossible to connect directly using the ultrasonic vibration method due to oxidation of the surface layer of the copper foil and other reasons. Therefore, in conventional hybrid integrated circuits, the thin aluminum wire connection portion on the conductive path 2 is As shown in Fig. 1, a method has been adopted in which a nickel plating layer or a thin aluminum metal layer is formed and a thin aluminum wire 3 is connected thereto by an ultrasonic vibration method.
ところが、従来の方法では、ニッケルメッキ層４を設け
る場合では、メッキ層を部分的に設けることが必要であ
り、またアルミニウム金属薄層を形成する場合では、銅
箔とアルミニウム焔が貼り合された箔から銅箔部分、ア
ルミニウム金属薄層部分と別々にゴッチング形成するこ
とが必要であり、それぞれ、設備的にも、寸だ工程的と
も実に複雑な手段をとる必要があった。However, in the conventional method, when providing the nickel plating layer 4, it is necessary to provide the plating layer partially, and when forming the aluminum metal thin layer, the copper foil and the aluminum flame are bonded together. It was necessary to separately form the copper foil part and the aluminum metal thin layer part by Gotching from the foil, and it was necessary to take very complicated measures in terms of equipment and process for each.
発明の目的
本発明は、上記従来の問題点を解消するものであり、混
成集積回路等の回路基板上の導電路にアルミニウム細線
を超音波振動法によって接続することを合理的かつ容易
に可能にするり一ド線の接続方法を提供することを目的
とする。Purpose of the Invention The present invention solves the above-mentioned conventional problems, and makes it possible to rationally and easily connect thin aluminum wires to conductive paths on circuit boards such as hybrid integrated circuits by ultrasonic vibration method. The purpose of this invention is to provide a method for connecting single-wire lines.
発明の構成
本発明は、導電路上に一方の主面がアルミニウノ、金属
薄層で他方の主面が鉄あるいは鉄の合金からなる電極体
を半田によって形成し、その後超音波振動法によってア
ルミニウム細線を電極体に容易にかつ合理的に接続でき
るようにしたものである。Structure of the Invention The present invention involves forming an electrode body on a conductive surface with one main surface made of aluminum UNO, a thin metal layer, and the other main surface made of iron or an iron alloy, and then using an ultrasonic vibration method to form a thin aluminum wire. This allows for easy and rational connection to the electrode body.
実施例の説明
第２図は本発明の一実施例における混成集積回路のアル
ミニウム細線の接続方法の接続図を示すものである。５
ｒｒ１．絶縁基板あるいは絶縁層、６はその絶縁層上に
設けられた導電路、７はその一面にアルミニウム金属薄
層８を有する鉄あるいはその合金より成る電極体、９は
一導電路６と電極体７を接続する半田層であり、この半
１１層９は、混成集積回路を構成する半導体チップ、チ
ップ抵抗等を導電路６に接続するのに用いる半田と同様
に、ペースト状半田にて基板５上に印刷し、電極体７を
含めた構成部品を装着稜加熱溶融することにより形成す
るものである。DESCRIPTION OF THE EMBODIMENTS FIG. 2 shows a connection diagram of a method for connecting thin aluminum wires in a hybrid integrated circuit according to an embodiment of the present invention. 5
rr1. An insulating substrate or an insulating layer, 6 a conductive path provided on the insulating layer, 7 an electrode body made of iron or an alloy thereof having a thin aluminum metal layer 8 on one surface, 9 a conductive path 6 and an electrode body 7 This half-eleven layer 9 is a solder layer that connects the semiconductor chips, chip resistors, etc. constituting the hybrid integrated circuit to the conductive paths 6, and the half-11 layer 9 is a solder layer that is soldered on the substrate 5 with paste solder, similar to the solder used to connect the semiconductor chips, chip resistors, etc. that constitute the hybrid integrated circuit to the conductive paths 6. The electrode body 7 and other components are heated and melted at the mounting edge.
本発明で用いた電極体７は鉄とニッケルの合金より成る
もので、半田による接続性は非常に良好なものである。The electrode body 7 used in the present invention is made of an alloy of iron and nickel, and has very good solder connectivity.
この電極伸子は例えは−面にアルミニウム金属薄層８を
重ねた鉄−ニッケルのテープ状のものを打ち抜くことに
より簡単に作ることが可能である。このように形成した
電極体７ばその表面がアルミニウム金属薄層８であり、
超音波振動によってアルミニウム線を接続するには最も
良好な特性を示すものである。第２図では電極体７の一
面に形成されたアルミニウム金属薄層８に混成集積回路
の回路接続用のアルミニウム細線１０が超音波振動法に
より接続される。This electrode stretcher can be easily made, for example, by punching out an iron-nickel tape having a thin aluminum layer 8 on its negative side. The surface of the electrode body 7 thus formed is an aluminum metal thin layer 8,
It shows the best characteristics for connecting aluminum wires using ultrasonic vibration. In FIG. 2, a thin aluminum wire 10 for circuit connection of a hybrid integrated circuit is connected to a thin aluminum layer 8 formed on one surface of an electrode body 7 by an ultrasonic vibration method.
発明の効果
以上のように本発明によれば、導電路上にアルミニウム
層と鉄せたはその合金からなる電極体が形成されるため
、混成集積回路等におけるアルミニウム細線の超音波振
動法による接続を、メッキ。Effects of the Invention As described above, according to the present invention, since an electrode body made of an aluminum layer and iron or an alloy thereof is formed on a conductive surface, it is possible to connect thin aluminum wires in hybrid integrated circuits etc. using the ultrasonic vibration method. ,plating.
エツチング等の複雑な処理を行うことなく、上記の電極
体を集積回路を構成する他の部品と同時に容易に取付形
成して可能にすることができ、接続部の接続強度も向上
する。The above-mentioned electrode body can be easily attached and formed at the same time as other components constituting an integrated circuit without performing complicated processing such as etching, and the connection strength of the connection portion is also improved.
第１図は従来の混成集積回路におけるリード線の接続方
法を説明するための接続部断面図、第２図は本発明の一
実施例におけるリード線の接続方法状態を示す接続部断
面図である。
５・・・・・・絶縁基板、６・・・・・・導電路、７・
・・・・・電極体、８・・・・・・アルミニウム金属薄
層、９・・・・・・半田、１゜・・・・・・アルミニウ
ム細線。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第２図FIG. 1 is a cross-sectional view of a connecting portion for explaining a method of connecting lead wires in a conventional hybrid integrated circuit, and FIG. 2 is a cross-sectional view of a connecting portion showing a method of connecting lead wires in an embodiment of the present invention. . 5... Insulating substrate, 6... Conductive path, 7.
... Electrode body, 8 ... Aluminum metal thin layer, 9 ... Solder, 1° ... Aluminum thin wire. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2
Claims (1)
らなり、他方の主面が鉄または鉄の合金からなる電磁体
の前記他方の主面を半田によって形成し、前記電極体の
アルミニウム層に超音波振動法によってアルミニウム細
線からなるリード純金接続することを特徴とするリード
線の接続方法。On the conductive surface of the circuit board, the other main surface of an electromagnetic body, one main surface of which is made of an aluminum layer and the other main surface of which is made of iron or an iron alloy, is formed by soldering to the aluminum layer of the electrode body. A lead wire connection method characterized by connecting pure gold leads made of thin aluminum wires using an ultrasonic vibration method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58111245A JPS603189A (en) | 1983-06-20 | 1983-06-20 | Method of connecting lead wire |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58111245A JPS603189A (en) | 1983-06-20 | 1983-06-20 | Method of connecting lead wire |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS603189A true JPS603189A (en) | 1985-01-09 |
Family
ID=14556263
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58111245A Pending JPS603189A (en) | 1983-06-20 | 1983-06-20 | Method of connecting lead wire |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS603189A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5651494A (en) * | 1995-03-17 | 1997-07-29 | Nippondenso Co., Ltd. | Method of ultrasonic welding of different metals |
| GB2338200B (en) * | 1997-06-05 | 2003-04-09 | Ford Motor Co | Method of soldering materials supported on low-melting substrates |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5396667A (en) * | 1977-02-04 | 1978-08-24 | Hitachi Ltd | Wire bonding method |
| JPS587338B2 (en) * | 1975-03-10 | 1983-02-09 | 旭化成株式会社 | New polymer-supported adsorbent |
-
1983
- 1983-06-20 JP JP58111245A patent/JPS603189A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS587338B2 (en) * | 1975-03-10 | 1983-02-09 | 旭化成株式会社 | New polymer-supported adsorbent |
| JPS5396667A (en) * | 1977-02-04 | 1978-08-24 | Hitachi Ltd | Wire bonding method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5651494A (en) * | 1995-03-17 | 1997-07-29 | Nippondenso Co., Ltd. | Method of ultrasonic welding of different metals |
| GB2338200B (en) * | 1997-06-05 | 2003-04-09 | Ford Motor Co | Method of soldering materials supported on low-melting substrates |
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