JPS60209884A - Ic card - Google Patents
Ic cardInfo
- Publication number
- JPS60209884A JPS60209884A JP59066351A JP6635184A JPS60209884A JP S60209884 A JPS60209884 A JP S60209884A JP 59066351 A JP59066351 A JP 59066351A JP 6635184 A JP6635184 A JP 6635184A JP S60209884 A JPS60209884 A JP S60209884A
- Authority
- JP
- Japan
- Prior art keywords
- input
- circuit board
- card
- output terminals
- card substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229920003002 synthetic resin Polymers 0.000 claims abstract description 10
- 239000000057 synthetic resin Substances 0.000 claims abstract description 10
- 229920001169 thermoplastic Polymers 0.000 claims abstract description 6
- 239000004416 thermosoftening plastic Substances 0.000 claims abstract description 6
- 238000010438 heat treatment Methods 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 abstract description 22
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical compound ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 abstract description 3
- 229920005989 resin Polymers 0.000 abstract description 3
- 239000011347 resin Substances 0.000 abstract description 3
- 239000011111 cardboard Substances 0.000 description 13
- 239000004020 conductor Substances 0.000 description 9
- 238000003825 pressing Methods 0.000 description 6
- 238000003860 storage Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
- Credit Cards Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の技術分野］
本発明は電気絶縁性の合成樹脂製のカード基材の内部に
情報の記憶および処理を行なうＩＣチップを実装し、表
面に入出力端子を露出させてなるＩＣカードに関する。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention mounts an IC chip for storing and processing information inside a card base material made of electrically insulating synthetic resin, and exposes input/output terminals on the surface. Regarding IC cards.
［発明の技術的背景とその問題点］
従来から、例えば金融機関における金銭出入れ時の証明
用のデータカード等とし゛（、塩化ビニル樹脂等の合成
樹脂製のカード基材の表面にストライプ状に磁気コート
を施し、この磁気ストライプに口座番号や暗唱番号等の
各種データを磁気記録した、いわゆる磁気カードが広く
用いられている。[Technical background of the invention and its problems] Conventionally, for example, data cards used for proof of money withdrawals and withdrawals at financial institutions, etc., have been used as card base materials made of synthetic resin such as vinyl chloride resin. So-called magnetic cards, which are coated with a magnetic coating and have various data such as an account number and a password number magnetically recorded on the magnetic stripe, are widely used.
この磁気カードは構造が単純で耐久性が高く、しかも大
量生産に向い−（いることからザービス産業分野等にお
い（広く用いられている。This magnetic card has a simple structure, high durability, and is suitable for mass production, so it is widely used in the service industry.
しかしながらこのような磁気カードは、情報の記憶容量
が小さいために、口座番号、暗唱番号等、ごく少数の情
報しか記録することができず、したがつＣ例え、ば預金
の預は入れ、引出しの記録等の多種類の情報の記録は金
融機関における預金通帳の如く別に記録台帳を設ける必
要があり、情報処理の高能率化に対する障害となってい
た。However, since such magnetic cards have a small information storage capacity, they can only record a small amount of information such as account numbers and PIN numbers. Recording of various types of information such as records of information requires separate recording ledgers such as bankbooks in financial institutions, which has been an obstacle to increasing the efficiency of information processing.
さらに、この磁気カードは、外部から情報を比較的簡単
に読取れるため、気密保持や盗用防止等の点で問題があ
った。Furthermore, since information on this magnetic card can be read relatively easily from the outside, there are problems in maintaining airtightness and preventing theft.
このような事情から、近年カード内部に記憶素子および
その制御素子を内蔵させて情報の記憶容量を飛躍的に向
上させた、ＩＣカードと呼ばれるデータカードが開発さ
れつつある。Under these circumstances, in recent years, data cards called IC cards have been developed, which have a storage element and its control element built into the card to dramatically improve its information storage capacity.
このＩＣカードは、電気絶縁性の合成樹脂製のカード基
板の内部に情報の記憶および処理を行なうＩＣチップを
実装し、入出力端子をカード表面から露出させたもので
、金融機関等に設置されたカードリーダー／ライターの
カード処理部にセットすることにより、カード処理部内
の入出力端子とＩＣカードの入出力端子とを電気的に接
続して、内蔵するＩＣチップへの情報の書込みまたは読
出しを可能としたものである。This IC card has an IC chip for storing and processing information mounted inside an electrically insulating synthetic resin card board, and has input/output terminals exposed from the card surface, and is installed in financial institutions, etc. By setting it in the card processing section of a card reader/writer, it electrically connects the input/output terminals in the card processing section and the input/output terminals of the IC card, allowing information to be written or read from the built-in IC chip. This made it possible.
ところで、上述したようなＩＣカードは、磁気カードと
同様に常時携帯される場合が多く、外力および環境変化
に対して相当の耐久力が要求される。特に入出力端子は
、ＩＣカードをカードリーダー／ライターの入出力端子
と正確に接触させる必要があるために、カードの所定の
位置にカード表面と同一平面上に配置され、しかもその
絶縁性合成樹脂との境界部が完全に密着している必要が
あり、製造が非常に難しいという問題があった。Incidentally, the above-mentioned IC cards are often carried around all the time, like magnetic cards, and are required to have considerable durability against external forces and environmental changes. In particular, the input/output terminals are placed on the same plane as the card surface at a predetermined position on the card, and the insulating synthetic resin There was a problem in that the boundary between the two parts had to be in perfect contact with each other, making manufacturing extremely difficult.
また、このようなＩＣカードは、ＩＣチップの搭載され
た絶縁基板上にカバーシートを被覆し、これらを加熱加
圧により一体に融着させて製造されるが、その際、ＩＣ
チップが絶縁基板上から突出しているため、ＩＣチップ
上に過大な圧力が加えられ、導体パターンとＩＣチップ
のインナーリードとの接続部が不安定となるおそれがあ
った。In addition, such an IC card is manufactured by covering an insulating substrate on which an IC chip is mounted with a cover sheet and fusing them together by heat and pressure.
Since the chip protrudes from above the insulating substrate, excessive pressure is applied onto the IC chip, which may make the connection between the conductor pattern and the inner lead of the IC chip unstable.
［発明の目的コ
本発明はこのような事情によりなされたもので、ＩＣチ
ップと導体パターン間の電気的接続の信頼性が向上した
表面平滑なＩＣカードの提供を目的としている。[Purpose of the Invention] The present invention was made in view of the above circumstances, and an object thereof is to provide an IC card with a smooth surface and improved reliability of electrical connection between an IC chip and a conductor pattern.
［発明の概要］
すなわち本発明のＩＣカードは、絶縁基板の表面に導体
パターンが形成され、この導体パターンと電気的に接続
された複数個の入出力端子が突設され、さらに前記導体
パターンと電気的に接続されたＩＣチップが同一平面と
なるように埋設されてなる回路基板上に、この回路基板
の入出力端子に対応させてこれらを嵌合可能な貫通孔を
形成させた熱可塑性合成樹脂性のカバーシートを、前記
入出力端子が前記貫通孔に嵌合するようにして被覆し、
これらを加熱加圧により一体に融着させて成ることを特
徴としている。[Summary of the Invention] That is, the IC card of the present invention has a conductor pattern formed on the surface of an insulating substrate, a plurality of input/output terminals electrically connected to the conductor pattern, and a plurality of protruding input/output terminals electrically connected to the conductor pattern. A thermoplastic composite on which electrically connected IC chips are embedded on the same plane, and through-holes are formed to fit them in correspondence with the input/output terminals of the circuit board. Covering the input/output terminal with a resinous cover sheet so as to fit into the through hole,
It is characterized in that these are fused together by heating and pressurizing.
［発明の実施例］
第１図は、本発明の一実施例のＩＣカードの構成をを示
す分解斜視図である。[Embodiment of the Invention] FIG. 1 is an exploded perspective view showing the structure of an IC card according to an embodiment of the invention.
本発明のＩＣカードは、中央部の回路基板１を挟んでそ
の表面に、表側カード基板２、裏側カード基板３を配置
し、加熱加圧により一体に融着させて構成されている。The IC card of the present invention is constructed by arranging a front card board 2 and a back card board 3 on the front surface of a central circuit board 1, which are fused together by heat and pressure.
中央部の回路基板１のベースの絶縁基板１ａには、第２
図に示すように、ＩＣチップ４が嵌合する四部５が形成
され、ＩＣチップ４はこの凹部５に上面が絶縁基板１ａ
の面と同一平面となるように埋設され導体パターン６は
このＩＣチップの上面のインナーリードから絶縁基板上
にかけて形成されている。The insulating substrate 1a of the base of the circuit board 1 in the center has a second
As shown in the figure, a four part 5 into which the IC chip 4 fits is formed, and the IC chip 4 is placed in this recess 5 with the upper surface of the insulating substrate 1a.
The conductive pattern 6 is buried so as to be flush with the surface of the IC chip, and is formed from the inner leads on the upper surface of the IC chip to the insulating substrate.
なお絶縁基板１ａ上の四部５はフＡトレジストを用いて
形成したり、加熱金型を押圧して形成してもよく、さら
に加熱軟化された絶縁基板上にＩＣチップ自体を押倒け
て形成さゼてもよい。The four parts 5 on the insulating substrate 1a may be formed using a photoresist, or by pressing a heated mold, or may be formed by pressing the IC chip itself onto the insulating substrate that has been softened by heating. It is okay to ze.
また、導体パターン６は、ＩＣチップ４を絶縁基板１ａ
中に埋設した後、ｌＣチップ４の基板上から絶縁！Ｊ板
１ａ上に７Ｊｋ ４ノで形成してもよく、予め絶縁基板
１ａ上に形成しておいて、ＩＣチップ４を埋設した後イ
ンナーリードと導電ペースト等により接続させるように
してもよい。Further, the conductor pattern 6 connects the IC chip 4 to the insulating substrate 1a.
After embedding it inside, insulate it from the top of the LC chip 4 substrate! It may be formed in 7Jk 4 on the J board 1a, or it may be formed in advance on the insulating substrate 1a, and after embedding the IC chip 4, it may be connected to the inner leads by conductive paste or the like.
この回路基板１の、導体パターン６上には、さらに板面
に直角方向に突出する矩形の入出力端子７が配設されて
いる。この入出力端子７の厚さは、表側カード基板２の
厚さとほぼ同一の厚さとなっている。On the conductor pattern 6 of the circuit board 1, a rectangular input/output terminal 7 is further provided that projects perpendicularly to the board surface. The thickness of the input/output terminal 7 is approximately the same as the thickness of the front card board 2.
表側カード基板２および裏側カード基板３は共に塩化ビ
ニル樹脂等の電気絶縁性の熱可塑性合成樹脂からなり、
表側カード基板２の入出力端子７に対応する位置には、
これらの入出力端子７と同形状でこれらを１■合可能な
貫通孔２ａが穿設されている。Both the front card board 2 and the back card board 3 are made of electrically insulating thermoplastic synthetic resin such as vinyl chloride resin.
At the position corresponding to the input/output terminal 7 of the front card board 2,
A through hole 2a having the same shape as these input/output terminals 7 and capable of connecting them together is provided.
これらの表側カード基板２、回路基板１および裏側カー
ド基板３は、表側カード基板２の貫通孔に回路基板１上
の入出力端子２ａを嵌合させて積層した後、プレス加工
により加熱加圧される。These front card board 2, circuit board 1, and back card board 3 are stacked by fitting the input/output terminals 2a on the circuit board 1 into the through holes of the front card board 2, and then heated and pressurized by press processing. Ru.
このようにすると、第３図に示ずように、入出力端子７
の頂部が表側カード基板２の表面から露出した状態で全
体が一体に融着され、表面が平滑なＩＣカードが得られ
る。この後必要に応じて周辺の不整部分が打抜きにより
除去される。In this way, as shown in FIG. 3, the input/output terminal 7
The whole is fused together with the top part exposed from the surface of the front card substrate 2, thereby obtaining an IC card with a smooth surface. Thereafter, peripheral irregularities are removed by punching if necessary.
このように構成されたＩＣカードでは、ＩＣチップ４が
絶縁基板１ａ中に表面が同一平面となるように埋設され
た状態でプレス加工が行なわれるので、プレス時の圧力
はこの面に均等に加えられ、ＩＣチップ４と導体パター
ン６間の電気的接続が不安定になるようなことはない。In the IC card configured in this way, pressing is performed with the IC chip 4 buried in the insulating substrate 1a so that the surfaces thereof are flush with each other, so that pressure during pressing is applied evenly to this surface. Therefore, the electrical connection between the IC chip 4 and the conductive pattern 6 will not become unstable.
さらにまた、表側カード基板２の貫通孔に入出力端子が
嵌合した状態でプレスが行なわれるので、表面にもプレ
ス時の圧力が均等に作用し、合成樹脂の流れが均一に行
なわれ、表面平滑で、かつ入出力端子７ど表側カード基
板２との境界が密着したＩＣカードが得られる。Furthermore, since pressing is performed with the input/output terminals fitted into the through holes of the front card board 2, the pressure during pressing is applied evenly to the surface, and the synthetic resin flows uniformly to the surface. An IC card that is smooth and has input/output terminals 7 and the front card substrate 2 in close contact can be obtained.
［発明の効果］
以上説明したように本発明のＩＣカードは、回路基板の
複数の入出力端子に対応さＵて、これらを嵌合可能な貫
通孔を形成してなる熱可塑性合成樹脂性のカバーシート
と、ＩＣチップをその表面が同一面となるよう埋設した
回路基板どを、前記入出力端子が前記貫通孔に嵌合する
ようにして積層し、これらを加熱加圧により一体に融着
させて構成したから、ＩＣチップと導体パターン間の電
気的接続の信頼性が向上し、表面平滑なＩＣカードが得
られる。[Effects of the Invention] As explained above, the IC card of the present invention is made of thermoplastic synthetic resin that corresponds to a plurality of input/output terminals of a circuit board and has through holes into which these can be fitted. A cover sheet and a circuit board on which an IC chip is embedded so that their surfaces are flush are stacked so that the input/output terminals fit into the through holes, and they are fused together by heat and pressure. Because of this structure, the reliability of the electrical connection between the IC chip and the conductor pattern is improved, and an IC card with a smooth surface can be obtained.
第１図は本発明のＩＣカードの一実施例を示す分解斜視
面図、第２図はその要部を示す部分断面図、第３図はそ
の横断面図である。
１・・・・・・・・・・・・フレギシブル回路基板１ａ
・・・・・・・・・絶縁基板
２・・・・・・・・・・・・表側カード基板３・・・・
・・・・・・・・裏側カード基板４・・・・・・・・・
・・・ＩＣチップ５・・・・・・・・・・・・凹 部
６・・・・・・・・・・・・導体パターン７・・・・・
・・・・・・・入出力端子代理人弁理士 須 山 佐
−
第１図FIG. 1 is an exploded perspective view showing an embodiment of the IC card of the present invention, FIG. 2 is a partial cross-sectional view showing the main parts thereof, and FIG. 3 is a cross-sectional view thereof. 1...Flexible circuit board 1a
......Insulating board 2...Front side card board 3...
・・・・・・・・・Back side card board 4・・・・・・・・・
...IC chip 5...Concave portion 6...Conductor pattern 7...
・・・・・・Input/output terminal agent Patent attorney Satoshi Suyama
- Figure 1
Claims (1)
導体パターンと電気的に接続された複数個の入出力端子
が突設され、さらに前記導体パターンと電気的に接続さ
れたＩＣチップが同一平面となるように埋設されてなる
回路基板上に、この回路基板の入出力端子に対応させて
これらを嵌合可能な貫通孔を形成させた熱可塑性合成樹
脂性のカバーシートを、前記入出力端子が前記貫通孔に
嵌合するようにして被覆し、これらを加熱加圧により一
体に融盾させて成ることを特徴とするｌＣカード。(1) A conductive pattern is formed on the surface of a completely round board, a plurality of input/output terminals are protrudingly connected to the conductive pattern, and an IC chip is further electrically connected to the conductive pattern. A cover sheet made of thermoplastic synthetic resin is formed on the circuit board buried so as to be flush with each other, and has through holes formed therein to fit the input and output terminals of the circuit board. An IC card characterized in that the output terminal is covered so as to fit into the through hole, and these are fused together by heating and pressurizing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59066351A JPS60209884A (en) | 1984-04-02 | 1984-04-02 | Ic card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59066351A JPS60209884A (en) | 1984-04-02 | 1984-04-02 | Ic card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60209884A true JPS60209884A (en) | 1985-10-22 |
Family
ID=13313349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59066351A Pending JPS60209884A (en) | 1984-04-02 | 1984-04-02 | Ic card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60209884A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5543008A (en) * | 1992-06-30 | 1996-08-06 | Cerberus Ag | Method of manufacture of a protective coating on an electronic assembly |
| WO2005122659A1 (en) * | 2004-06-07 | 2005-12-22 | E.G.O. Control Systems Gmbh | Method for coating one side of a printed circuit board, coated printed circuit board and coating material |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5748175A (en) * | 1980-07-09 | 1982-03-19 | Philips Nv | Portable identifying structure |
| JPS5827287A (en) * | 1981-07-30 | 1983-02-17 | シ−メンス・アクチエンゲゼルシヤフト | Portable card for processing information |
-
1984
- 1984-04-02 JP JP59066351A patent/JPS60209884A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5748175A (en) * | 1980-07-09 | 1982-03-19 | Philips Nv | Portable identifying structure |
| JPS5827287A (en) * | 1981-07-30 | 1983-02-17 | シ−メンス・アクチエンゲゼルシヤフト | Portable card for processing information |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5543008A (en) * | 1992-06-30 | 1996-08-06 | Cerberus Ag | Method of manufacture of a protective coating on an electronic assembly |
| WO2005122659A1 (en) * | 2004-06-07 | 2005-12-22 | E.G.O. Control Systems Gmbh | Method for coating one side of a printed circuit board, coated printed circuit board and coating material |
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