JPS60163474A - Diode array - Google Patents

Abstract

PURPOSE:To facilitate the manufacture by reduction in number of connections by a method wherein the same electrodes of adjacent diodes are connected alternately right and left with a piece of lead. CONSTITUTION:Restriction of the number of light emitting dots contained in a chip and that of chips constituting an LED array enables two chips 200A and 200B to fix to the common substrate so that the light emitting may come to a straight line and equal pitches. The numeral 31 represents the joint of chips. The first cathode 27 is not connected to the outside, but only the second cathode 28 and an anode 29 are connected to the external circuit, which is an example for operation of the second light emitting P-N junction. For connection to the external circuit, conductors 32 short-circuiting two adjacent electrodes are connected alternately in every anode 29 and every cathode 28 in staggered form. As the method of short circuiting, Au fine wires having ball tips are put in bonding over adjacent electrodes by the ultrasonic thermal compression bonding method. The Au fine wire can be used for connection to the external circuit as it is. The leads short-circuiting the two electrodes are connected to a power source 35 through switches 33 and 34.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a diode array suitable for a high-density and high-integration light emitting diode array and a high-density and high-integration multi-diode array.

High-density light emitting diode arrays have recently been attracting attention as an effective method for improving cost performance and reducing the size and weight of devices as light sources for T5 electrophotographic printers. Furthermore, high-density photodiode arrays are used for sensors such as facsimile document reading, and are expected to have the same advantages as light-emitting diode arrays. All arrays are required to have high resolution, high speed, and low cost for printing or reading.1. There is an urgent need to respond.

The present invention has been made in view of these demands, and it is an object of the present invention to provide a novel diode array that achieves higher resolution, higher output or sensitivity, lower cost, etc. than conventional ones. First, a conventional light emitting diode array will be explained as an example.

Figure 1 shows a conventional light emitting diode (LED) array chip (100), a is its top view, and IJ is C in figure a.
A longitudinal cross-sectional view taken along the line -C' is shown. 2 is a U-type G fL A s layer which is a crystal substrate, 2 is an 11-type GaAsP layer grown by vapor phase epitaxial growth on the substrate, and 3 is an 11-type 0
A P-type GaAsP layer formed by selectively diffusing zinc (Z n ) from the surface of the aASP layer (2), 4 protects the light-emitting 1/1 junction consisting of 2 and 3, 11 protects the p 11 junction, and 1 on the surface of the P-type Ga As I' layer (3)
This is a silicon oxide film that covers the entire surface except for the parts. 12 is II
IO) IA Ohmic contact 1- on almost the entire surface with the s layer
Gold alloy (A u -N i -G c ) at the cathode forming
It is made by double evaporating gold on top. 13 is P type G HA
This is an anode that makes ohmic contact with the S13 layer, and is made by vapor depositing aluminum (A1). Anode 13
has a large bonding pad (14) for connecting with the thin gold wire towards the edge of the LED array chip. P-type 0aAsP layers separated from each other with the same dimensions (3)
constitute a common II type (L + As (evening layer (2) [many arranged in a region with a constant pitch (P) L E]) array.Each light emitting eye and one junction (4) constituting the array
emits light by passing a forward current through each anode (18) and a common cathode (12). IO is P type G
This is a light emitting surface that emits light from the aAsP layer (3) through the transparent silicon oxide film 11. All of the light emitting surfaces have the same dimensions and are arranged in a line with a constant pitch P.

For example, if the resolution is 10 lines/gate, the width of the light emitting surface is 60 mm.
The length is 80 μm and the pitch is 100/l+π.

The light-emitting surfaces (light-emitting dots) are arranged in a line according to the size of the paper on which printing is to be performed. Since there is a limit to the number of light emitting dots that can be made into one chip, the chip is fixed using a large number of chinos so that the light emitting dots are lined up at a constant pitch. For example, the number of light emitting dots per 1 chip is 12.
In the case of 8 dots, 16 chips are arranged in a row for a paper size of 44, making the total number of light emitting dots 2048. In such a high-density, highly integrated light emitting diode array, major challenges arise in chip dimensional accuracy, chip positioning accuracy, and connection between the anode and its corresponding external terminal.

Dimensional accuracy of the chip in one direction is very important. Unless the distance between the ends of the chip and the center of the light-emitting dots located at the ends is less than the pitch of the light-emitting dots, the pitch between the light-emitting dots at the joint of the chips will be larger than the pitch within the chip. In the above example, the distance must be 50 μm or less. However, since the width of the light emitting dot is 60 μm, the cut surface of the chip approaches within 20 μm from the end of the light emitting dot. If this cut surface comes too close to the light emitting dot, the light emitting 1) 11 junction 4 will be destroyed, and a portion of the anode will also be damaged, making wire bonding impossible.

Thin gold wires are used to connect the chip's electrodes to external circuits. These gold wires are bonded to thick-film gold interconnects on a ceramic substrate that are arranged at the same pitch as the chip's electrodes. This thick film wiring is also becoming difficult to manufacture as the density and integration become higher.

Currently, in the case of L JED arrays for printers,
With the increasing demand for a resolution of 16 lines/*m, it is almost impossible to meet this demand using conventional methods.

The present invention is a novel diode array that solves these problems, and will be explained in detail below using examples.

FIG. 2 shows a surface-separated light emitting diode (LED) array chip 200 that represents one embodiment of the present invention. a is a plan view, b is a longitudinal sectional view taken along the line CC' in the plan view a, and e and d are side views of the chip 200, respectively. Chip 200 has one light-emitting dot due to the paper size.
Although only 0 or 6 are shown in the figure, a printer is made with, for example, 128 in line. First, we will discuss the structure of this chip and its manufacturing method.

In Figure 2, 20 is a +1 type 0 doped with silicon.
Starting with one wafer with 1 LAs substrate layer. Its carrier concentration is 1 x 1018cm''% thickness is 350μ
It is m. P-type Ga 1-x Alx A doped with zinc on its upper surface by liquid phase epitaxial growth method.
Grow a light-emitting layer of s. 21 is its P type Oa+-xA (
! , in the rAs layer, the X value is about 0.35,
Carrier concentration is approximately IXI 017ern, 3 thickness is approximately 2
It is 0 μm. 22 is the first 11 consisting of 2o and valley
It is an n-junction. Subsequently, a tellurium-doped 601-x Alx As layer of type 11 is grown on this layer by liquid phase epitaxial growth. 23 is that! Type 1 Ga 1-, x A
The lJxA s layer has an X value of about 0.7, a carrier concentration of about 2X1017c2r3, and a thickness of about 5μTn. 2
4 is a second old 1 junction consisting of 22 and 23, and the band gap of 23 is narrower than that of 22, making it a heterojunction. For this reason, the ratio of electrons being injected into the 1) type layer which emits light is greater than that of holes being injected into the +1 type layer which does not emit light, and the luminous efficiency can be increased. Also, since the layer 23 has a large band cap, it does not absorb the red light emitted by the layer 11. Next, the ■-shaped Ga1-xJxhs layer 23
A silicon nitride film is deposited on the surface of the substrate, and a predetermined portion is removed by photolithography. This wafer is then placed in a quartz ampoule together with zinc and the like, sealed in vacuum, and heated to diffuse zinc from the surface from which the silicon nitride film has been removed, forming a P-swelled diffusion layer. surface. No 1. The concentration is about I x 1019. The depth of the P swelling diffusion layer formed by -3 zinc diffusion is approximately girm from the surface.

25 is the P swelling diffusion layer, which is zinc +1 type 0+th -xAI2
P-type Ga I-x AlJx A beyond the xAs layer 23
It is diffused into the ss layer 1. P-type G2-xA(lx'
The s-diffusion layer is made of Ga converted to P type as shown by the dashed line.
r-xAe, r; 1'-type 0+i s -x A1. r
: Straddles the As layer. 26 is a homozygous l) 1+ junction formed on the side with a larger X value.

After the zinc-diffused wafer undergoes a suitable surface treatment, a suitable metal is deposited on both the top and bottom surfaces for electrode attachment. 27 is the first cathode in low resistance contact with the S substrate layer 2o to the II type G+L, and 28 is the 11 type Oa+ -xaII x A s layer 2
3 and the second cathode in low resistance contact with All-0c.
-Ni and All are vacuum-deposited to a thickness of approximately m. 29 is 1゛ form (3+i+zA to x A s
The anode is in low-resistance contact with the diffusion layer 25 and is made by vacuum-depositing 1) Au to a thickness of about 1/Im. Between the second cathode 28 and the anode 29, there is a homozygous 1 junction 2 with a large X value.
The surface of 6 will be the next day, and the first and second 111+joint 22
．． There is a window 11 for emitting light emitted from 23 to the outside.
The CJ is placed on the surface of the G-XAl)xAs. The distance between the two electrodes 28 and 29 is approximately 100 am, and the homojunction 2
6 and the second cathode 28 is approximately F3Q nm1;
For the window, an appropriate metal mask is used during vacuum deposition.The electrode material is vacuum deposited on the entire surface of the wafer, and a window is created on the deposition surface using photolithography technology.After all electrodes are formed, Then, the wafer is heat treated (sintered) at an appropriate temperature to obtain a low resistance contact.Then, the first and second 1111 junctions 22' and 24 are sintered at a required pitch using a dicing saw to completely separate them. A separation groove is provided, and the surface of each 1) junction exposed in the groove is etched and subjected to an inactivation treatment, and finally it is divided into depths containing a required number of second 1) 11 junctions 24.

200 in FIG. 2 is one of several chips divided in this manner. 30 is the first and second 1111 junction 2
This is a separation groove that separates 2 and 24, and its width is approximately 31 μm1.
The depth is approximately 30 μm from the top surface of the chip. In the figure, only six second 1111 junctions are included in one chip due to space constraints. An actual L, E, I) array chip for a printer includes, for example, 128 second gate junctions (light-emitting junctions) per chip. If the resolution is 16 lines/tomo, the pitch of the separation groove or light emitting surface is approximately 63tt.
m, the length of the chip is about 8.0640, and the width is about 1
．． 2(lljl).

The first and second 1)1) junctions included in the chip can cause forward current to flow through their respective electrodes to emit light. In other words, when a forward current is applied by applying a voltage that makes the anode 29 positive and the first cathode 27 negative, when a forward current is passed from the first 1)11 junction, the P-type near the second old) junction Ga1
-xAlxAs layer 21 emits light, and red light (peak wavelength 56 Qam) is emitted from the light emitting surface 10. The dimensions of their luminescent F y l□ are about aoxiooμm, and the pitch of the luminescent dots is 63μm. In a light emitting diode including the first group I junction 22, the first cathode 27 serves as a common electrode for each light emitting diode. But the second old 1 junction 2
4, each light emitting diode has an independent electrode and is electrically insulated from each other by the separation groove 30. A printer mm LED array can be fabricated by arranging a large number of chips including such light emitting diodes. However, it is extremely difficult to connect each electrode independently to an external circuit. An example of solving this problem will be explained below.

Figure 3 shows chip 2 of the L E I) array shown in Figure 2.
This diagram schematically shows a connection diagram for arranging two 00A and 200111 to form an L1ε1] array and emitting red light from each second 1111 junction 24.

Both 20OA and 200B are chips of an array made as described above, and the same parts are denoted by the same reference numerals. Due to space constraints, the number of light-emitting dots included in one chip and the number of chips constituting the array are limited in illustration.

When actually using A4 size paper as a printer, 27 Nisso chips each containing 128 light-emitting dots are arranged in a row as described above. The method shown in FIG. 3 is shown in a simplified manner since it can also be applied to such an expanded L E I) array. In the figure, two chips 200A and 200B are fixed to a common substrate (not shown) so that the light emitting dots are in a straight line and at equal pitches.

31 represents the joint between the chip and the chisso. In the connection shown in this figure, the first cathode 27 is not connected to the outside, and only the second cathode 28 and the anode 29 are connected to the external circuit, so that the second light emission 1) ■ junction is operated. As a method of connection to an external circuit, as shown in the figure, conductors 32 that short-circuit two adjacent electrodes are connected one by one, and each anode 29 and each cathode 28 are connected in a staggered manner.

As a short circuit method, use a thin gold wire with a spherical tip (diameter 30
[mu]m) can be bonded across adjacent electrodes using the ultra-H wave '4 crimping method. The thin gold wire can then be used as is for connection to an external circuit. Alternatively, a solder bump is provided on the electrode, and one part of the film carrier is attached to this.
You can short-circuit the book lead by bonding it to two solder buffers and connect it to an external circuit at the same time. Short-circuit the two electrodes and switch 33 as shown in Figure 3.
．． It is connected to the power supply 35 through 34.

The light-emitting dots of the cheer-j'l are numbered A1 to A5, and the light-emitting dots of the chip box are numbered B1 to B5, as shown. The positions of the changeover switches that light up each light emitting dot are as follows.

In the wiring shown in Figure 3, each light emitting dowel 1 is
- Can only be lit one by one?Instead of a changeover switch, a plurality of light emitting dots can be lit at the same time by using individual switches that can each be individually connected to a power source.

In this way, the same electrodes of adjacent light emitting diodes are
By skipping one lead and connecting the left and right leads alternately, an advantage can be obtained that the number of lead connections to the chip and the outside can be reduced. In addition, it can be twice as large as the conventional method, and the difficulty of connecting the relays due to higher resolution can be alleviated.

Furthermore, by organizing the connections on the cathode side of each light emitting tie in the chip into two groups .

In the conventional method shown in FIG. 1, the cathode is common to each LED in one chip, so it is necessary to take out independent leads from the anode of each LED. In the case of IQI resolution 16 lines/#Im, the space for lead bonding is extremely small.
(mi [3 layers μm) It is almost impossible to conduct wire bonding or lead bonding of film carriers. Further, a changeover switch is required for each LED, and the number of LEDs connected to the switch is also larger than in the embodiment of the present invention. Furthermore, in the case of an LED twinter that uses a large number of chips arranged in a row, the cathode of each chip may be connected to a separate wiring system and driven separately. In this case, each chip must be bonded to a cathode bonding butt provided for each chip on an insulating plate such as a ceramic substrate. However, in the present invention, the back side of the chip is directly bonded to a metal plate with heat dissipation ability. Even with bonding, the second 111 junctions are independent of each other, so even with the circuit connection as shown in FIG. 3, each light emitting dot can be lit one by one.

In addition, in the connection shown in Fig. 3, if the second old) junction is used to emit light, a power supply may be connected between the first cathode and the anode as necessary, and the anode may be used as a common source to connect two adjacent LEDs. It is possible to simultaneously light up the first January l junction. In this case, the emission spectrum has a longer peak wavelength than that from the first one-layer 11 junction, and one chip can obtain light of two wavelengths.

FIG. 4 shows a diffusion separation type 1.0 which shows another embodiment of the present invention.
El) Array chip 1. The figure shows six light-emitting dots arranged in a straight line. ) l is a plan view, II
is a vertical cross-sectional view at e-(2'), and C is a vertical cross-sectional view at l-1'.

The same or equivalent parts as in FIG. 1 are indicated by the same reference numerals.

1' is composed of P-type GJIA s, which is a crystal substrate, and U++ As 1-xl' The thickness is 30 μm.

2 Type II (r) 011 A s o, e ]'
The thickness is approximately IQltm with 0.4 layers.

5 is a P-type diffusion separation region IIIO2) IA s O,6
This is made by diffusing zinc to a thickness of about 15 μm from the surface of the PO,4 layer 2 by selective diffusion method.This separates the 11 type GnlAs0.6PO,4 layer 2 of each light emitting diode. 31. t P type OaA s o61'0.4 emitting layer, type II G++ Ax O,6 separated from each other
This is a layer in which zinc is diffused onto a limited surface of J'o41 cup 2 to a depth of about 5 μm by selective diffusion method. 4
is a light-emitting 1111 junction consisting of 2 and 3. 10 is a light emitting dot, 11 is a silicon nitride film, and 12' and 13' are a cathode and an anode that extend over the adjacent electrodes of LEI, respectively, as shown in the figure. In this example, the light emitting diode auto array chip collection includes 6 LEDs, or about 32 to 256 LEDs when used as a printer Jfj LED array. As an example, resolution 16
In the case of book/Mm, the pitch of light emitting tones 1 to 10 is 63μ
! If n is the example in Figure 2 (exactly the same as 30 x 100
128 pieces to 2 on a p m light emitting device y1.10 or l chip
56 pieces can be formed. Depending on the recording width, a large number of these can be fixed to a heat dissipation plate or the like while maintaining equal width in one row. The cathode, anode 12', and anode 131 in FIG. 4 are provided alternately in a staggered manner between adjacent LEDs, except for the ends of the chinozo tube, as in FIG. 3. When a large number of these chimneys are arranged in a row to form a large array, bonding may be performed with one lead across the electrodes of both chips at the joint of the chips 300.

By bonding in this manner, a large electrode bonding space can be secured, and external lead connections of a high-density, high-integration LED array can be easily performed. This can also be connected and operated as shown in Figure 3.

The embodiments of this invention have been described above regarding two light-emitting diode arrays, the groove-separated type shown in FIG. 2 and the diffusion-separated type shown in FIG. 4. In both cases, J(
The diodes are provided on the same (j a s & board) and are connected to the board through a 1/1 junction. Each diode is electrically insulated by this 1/1 junction. However, the 2nd diode
In FIG.
It is possible to electrically isolate each diode by replacing it with an a AS highly insulating substrate.

The present invention is not limited to light emitting diodes as in the above embodiments. , it goes without saying that it is a phototransistor. In this case, the array may be fabricated by selecting a semiconductor material that is highly efficient with respect to the incident light spectrum, for example, using a non-conductor material that has a wide range of sensitivity from visible light to infrared light.

Silicon photodiode arrays are useful in facsimile reading sections and as various sensors.

This invention makes it easier to manufacture an array in which two or more chips are lined up to form an 8-density, high-integration diode array, as described above, compared to the conventional one. has significant advantages. Furthermore, electrical independence of each light-emitting dot can be obtained even if the chip is directly attached to a metal with high thermal capacity. Another advantage is that the drive circuit can be freely selected, compared to conventional chips in which the cathode and iJ anode are all common.

This can also be understood from the example of combining t into two, such as tL and m in FIG. Due to this circuit connection, in order to drive 10 light emitting diodes, the number of leads connected to the switch on the sill is 7, whereas in the conventional type, the number is 1. In σ1, E s) arrays for printers, it is extremely important in manufacturing to minimize the number of thin wire connections and to avoid increasing the printed wiring density on the insulating board, and this invention satisfies these demands. It has the advantage of being

The light emitting diode array of the embodiment shown in FIG.
) is separated by a groove formed by a dicing saw.This method does not require separation and diffusion as in the example shown in Fig. 4, and the manufacturing process is simple.
Depends on the method: Since it is made by telojunction, high efficiency and high output can be obtained.

As described in detail above, the present invention facilitates the manufacture of particularly long light-emitting or light-receiving arrays with high resolution and a large number of chips, and is useful for improving the performance and reliability of products using the same. It is something.

14. Brief Description of the Drawings Fig. 1 is a diagram showing a chip of a conventional light emitting diode array, and Fig. 2 is a diagram showing a chip of a groove-separated valve light diode array according to an embodiment of the present invention. . Figure 3 shows the connection of the light emitting diode array consisting of two chips shown in Figure 25. It is.

1, 1'--crystal substrate, 2'+2'-i1 type GaAsP layer, 3--P type Oa As P layer, 4-
Light emitting 111'l junction 1, 5...P type diffusion separation region, 1
0... Light emitting surface, 12, 12'... Cathode, 13,1
3°... Anode, 20-... N-type 0aAs substrate, 21-
= P type (h+ l -x A (1゛xA layer, 22-first 1) + 1 junction, 23-・-u type e11+-xAlx
AS layer, 24...277th) +1 +1 junction, 25...
...P swelling diffusion layer, 27...first cathode, 28...
・・Second cathode, 29・・Anode, 30−・Separation groove,
3I... Chip joint, 32... Conductor, 33.34... Changeover switch, 35...
・Power supply, 300 ・・・・・−, L E D
Array chips.

Patent applicant: Kyoto Semiconductor Co., Ltd. No. 10 (C) (revised) (revised)

Claims (1)

[Claims] (1) A first January-born junction is formed by providing a plurality of first semiconductor layers having a second conductivity type separated from each other on a common semiconductor substrate having a first conductivity type. A second semiconductor layer is formed in a predetermined region on the first semiconductor layer, and a second semiconductor layer is formed on the first semiconductor layer.
First and second electrodes forming a junction and making low resistance contact with the surfaces of the first and second semiconductor layers separated from each other, respectively, constitute a tie-auto array and each diode lζ constituting the tie-auto array. Oi゛The C%ClO2 electrode is electrically short-circuited to the first electrode of one adjacent diode and the second electrode is electrically short-circuited to the second electrode of the other adjacent diode, and is connected to the outside through the short-circuited electrode. A diode array capable of emitting light or receiving light, or both, characterized in that it is connected to a circuit. (2. In the diode array according to claim 1, the third electrode is provided in low-resistance contact with the semiconductor substrate of the common first conductivity type, and the third electrode is connected to the second electrode to emit or receive light. (3) In the diode array according to claim 1, an insulating semiconductor substrate is used instead of the common first conduction type semiconductor substrate. , a tie-out array characterized in that a junction for blocking current is provided between the second semiconductor layer and the second semiconductor layer.